0% found this document useful (0 votes)
5 views40 pages

08 Architecture of 8085

The document provides a detailed overview of the architecture and operations of the 8085 microprocessor, including its components such as the Arithmetic and Logic Unit (ALU), register unit, and control unit. It explains the microprocessor's operations, including memory read/write, internal operations, and peripheral initiated operations, as well as the bus system and pin descriptions. Additionally, it covers Binary Coded Decimal (BCD) representation, advantages and limitations, and the handling of interrupts in microprocessor operations.

Uploaded by

jinay.s5
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
0% found this document useful (0 votes)
5 views40 pages

08 Architecture of 8085

The document provides a detailed overview of the architecture and operations of the 8085 microprocessor, including its components such as the Arithmetic and Logic Unit (ALU), register unit, and control unit. It explains the microprocessor's operations, including memory read/write, internal operations, and peripheral initiated operations, as well as the bus system and pin descriptions. Additionally, it covers Binary Coded Decimal (BCD) representation, advantages and limitations, and the handling of interrupts in microprocessor operations.

Uploaded by

jinay.s5
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
You are on page 1/ 40

DIGITAL ELECTRONICS AND

MICROPROCESSORS
ENR107

Microprocessor 8085 Architecture

By Ashok Ranade/Maryam Kaveshagr


Microprocessor

Arithmetic and Logic Unit,


characterised by speed, word length,
Register unit
architecture and instruction set.
Control unit
ALU
The ALU performs the actual numerical and logical operation such as `add', `subtract',
`AND', `OR', etc. ALU uses data from memory and from accumulator to perform the
arithmetic operations and always stores the result of the operation in accumulator.
The ALU consists of accumulator, flag register and temporary register.

Accumulator: Flags:
The accumulator is an 8-bit 5 flip flops
register that is a part of 1- zero (Z),
arithmetic/logic unit (ALU). 2-carry (CY),
This register is used to store 8- 3-sign (S),
bit data and perform 4-parity (P)
arithmetical and logical 5-auxiliary carry (AC)
operations. The result of an
operation is stored in the
accumulator. The accumulator
is also identified as register A.
Register Unit
The register unit consists of six general purpose data registers B, C, D, E, H and L, two
internal registers W and Z, two 16-bit address registers PC and SP, one
increment/decrement counter register and one MUX/DEMUX.

W Z
Register Unit
MUX/DEMUX Unit
This unit is used to select a
register out of all the available
registers.
It behaves as a MUX when data
is going from the register to the
internal data bus.
It behaves as a DEMUX when
data is coming to a register from
the internal data bus of the
microprocessor.
The register select will behave as
the function selection lines of the
MUX/ DEMUX.
Control Unit
The control unit generates signals within microprocessor to carry out the instruction,
which has been decoded. In reality it causes certain connections between blocks of
the microprocessor to be opened or closed, so that the data goes where it is required
and the ALU operations occur.
The control unit itself consists of three parts;
1- the instructions register (IR),
This register holds the machine code of the instruction. When microprocessor executes a
program it reads the opcode from the memory, this opcode is stored in the instruction
register.
2- instruction decoder and machine cycle encoder,
The IR sends the machine code to this unit. This unit decodes the opcode and finds out
what is to be done in response of the coming opcode and how many machine cycles are
required to execute this instruction.
3- control and timing unit,
The control unit generates signals within microprocessor to carry out the instruction,
which has been decoded. In reality, it causes certain connections between blocks of the
microprocessor to be opened or closed, so that the data goes where it is required and the
ALU operations occur.
Control unit
Instruction register
Stores the Opcode
Instruction decoder
Decodes the instruction and hence decodes the
number of cycles required
Control and timing unit
Generates the signals to carry out the instruction

Opcode in the 8085 microprocessor is an 8-bit


binary value that represents an
instruction. The term opcode is short for
operation code.
Microprocessor Operations
Microprocessor
initiated operations:
These are the operations
which are initiated by
the microprocessor itself
and the peripheral
devices will execute Internal operations: Peripheral initiated
these operations. operations

1.Memory read
2.Memory write
3.IOR
4.IOW
8085 Bus system
Bus

Address bus: Data bus: Control bus:


It carries the address of It is used to transfer It is used to carry control
a memory location or data between the signals between MPU and
I/O devices that the processor and memory various devices
MPU wants to access. It and I/O devices. It is bi- connected to it. It also
is a unidirectional bus directional in nature. In carries synchronisation
(from MPU to microprocessor 8085, and timing signals.
peripheral) generally there are 8 data lines
denoted by A0 to A15. denoted by Do to D7.
In MP 8085, it is 16-bit
wide.
Microprocessor Operations
Microprocessor Internal operations:
initiated operations: These are the operations
These are the operations which are internally
which are initiated by performed by the
the microprocessor itself microprocessor.
and the peripheral
devices will execute 1.Store 8-bit data. 2.Perform
Peripheral initiated
these operations. arithmetic and logic operations
operations. 3.Test for the
conditions. 4.Sequence the
1.Memory read
execution of instructions.
2.Memory write 5.Store data temporarily
3.IOR during the execution in the
4.IOW defined R/W memory
locations called the stack.
Internal Operations
2.Perform arithmetic and logic
1.Store 8-bit data. operations.
Register Unit: ALU and Register Accumulator A
8 bit,
4. Sequence the execution of instructions.
B, C, D, E, H, L
Register: Programme Counter (PC)
If 16 bit: B&C, D&E, H&L
16 bit,
Registers are programmable
The function of the program counter is to point the
memory address from which the next byte is to be
3.Test for the
fetched.
conditions.
Flag register 5.Store data temporarily during the
Carry flag, Zero flag, execution in the defined R/W memory
Sign flag, Parity flag, locations.
Auxiliary flag Register: Stack pointer (SP)
16 bit (Useful in subroutine)
Points at the memory location in R/W
memory.
Registers
Flag register

When the result of an arithmetic operation exceeds 8


bits the carry flag CY is set to 1
When the result of an arithmetic operation results in a
zero , zero flag Z is set to 1
BCD CODE
 BCD, or Binary Coded Decimal, is a binary encoding of decimal numbers where each decimal digit is
represented by its 4-bit binary equivalent.

 Provides a straightforward way to represent decimal digits in digital systems.

 BCD can represent values from 0 to 9, using 0000 to 1001 in binary.

 Conversion is much easier.

 Examples – 1410 – 0001 0100


25610 – 0010 0101 0110
13.7910 – 0001 0011. 0111 1001

 Six 4-bit combinations (1010, 1011, 1100, 1101, 1110, 1111) are unused.
BCD CODE
Decimal BCD Code
0 0000
1 0001
2 0010
3 0011
4 0100
5 0101
6 0110
7 0111
8 1000
9 1001
10 0001 0000
BCD CODE
 Advantages:
i) Ease of Conversion: Simple and no complex calculations are required.

ii) Direct Display: Can be directly displayed on numeric displays without the need for additional
conversion.

 Limitations:
i) Inefficient storage: Requires more bits to represent a value in comparison to binary representation.

ii) Limited range

 BCD is used with real-time clocks or RTC chips.


BCD ADDITION
 Similar to Binary addition.

 Correction required when the nibble is an invalid combination (>9) or there is a carry from the
previous nibble. 0110 is added for correction.

 Examples

2310 + 4610 2310 + 4810 2810 + 5010


1
23 0010 0011 23 0010 0011 28 0010 1000
46 0100 0110 48 0100 1000 59 0101 1001
0110 1001 0110 1011(>9) 1000 0001
+ 0110 +0110
0111 0001 1000 0111
Auxiliary carry
Is set to 1 when carry is generated from D3 to D4
Microprocessor Operations
Peripheral initiated
Microprocessor Internal operations: operations:
initiated operations: These are the operations
These are the operations which are internally
External devices can
which are initiated by performed by the initiate the
the microprocessor itself microprocessor. operations for which
and the peripheral there are individual
devices will execute 1.Store 8-bit data. 2.Perform pins on the
these operations. arithmetic and logic
microprocessor.
operations. 3.Test for the
conditions. 4.Sequence the 1- Reset
1.Memory read
execution of instructions. 2- Interrupt
2.Memory write 5.Store data temporarily
3.IOR 3- Ready
during the execution in the
4.IOW defined R/W memory 4- Hold
locations called the stack.
Peripheral initiated operations
Reset: When reset pin is activated all internal operations are stopped and the
program counter is reset to 0000. Program execution again begins from zero
memory address.
Interrupt: The microprocessor's current operation is suspended and the
microprocessor executes some emergency task called Interrupt Service Routine
(ISR). After the execution of the ISR, the microprocessor returns to its previous
operations and continues.
Ready: The 8085 has a pin called READY. This pin is used by external devices to
synchronize the speed of microprocessor with the slower peripherals. As long as
the READY pin is low, the microprocessor will be in a `wait' state.
Hold: The 8085 has a pin called HOLD. This pin is used by external devices to gain
control of the buses. When the HOLD signal is activated by an external device, the
8085 suspend current execution and stops using the buses. This would allow
external devices to control the information on the buses, such as, direct memory
access (DMA).
I/O device interface
Input Output Element details
Output elements
Interface (Typically a latch)
Device (LED for example)
Input elements
Interface (A to D converter with Tristate buffer)
Device (Potentiometer for example)
Tristate for input devices
8085 pin description
Microprocessor 8085 is a 40-pin IC
operates on +5 V power supply
3 MHz frequency.
These 40 pins are divided into six
groups according to their
functions.
1.Frequency and power
supply signals

2.Higher order address bus

3.Multiplexed address/data
bus

4.Control and status signals

5. Serial IO signals

6. Externally or peripheral
initiated signals.
Group 1: Power Supply and Frequency Signals

Internal clock
X1, X2 (Input) two input lines across which a Crystal or R/C oscillator
circuit is connected to provide the required clock frequency to the
microprocessor. The frequency generated by the oscillator is divided by 2 to
give the internal operating frequency of the microprocessor. The input
frequency is divided by 2 because the frequency is applied to the system
through a T flip-flop which divides the incoming frequency by 2
Group 2: Higher Order Address Bus (Output)

(A8-A15) Instead of having 24 pins for address and


data lines, 8085 has only 16 pins.
8 pins are used to carry the higher order address
8 pins are multiplexed to carry the address as well as
the data.

This multiplexing is done to keep the number of pin as


minimum as possible. The most significant 8 bits of the
memory address or the 8 bits of the I/O address is
carried by these lines. These lines are tri-stated during
Hold and Halt modes.
Group 3: Multiplexed Address/Data Bus

(ADO-AD7) The 8085A uses a multiplexed data bus. These lines are time
multiplexed with the lower 8-lines of the address bus. Lower 8-bits of the
memory address or I/O address appear on the bus during the T1 state of a
machine cycle. It then becomes

16 bit address bus


A8 to A15 : Higher order 8 bits
AD0 to AD7 : Lower order 8 bits
AD0 to AD7 also act as data bits
AD0 to AD7 is a multiplexed bus
Group 4: Control and Status Signal
ALE
Address latch enable
Activated during state T1
Read
Active low to Read
WR
Active low to write
IO/M
High for IO and Low for memory
So, S1 (status signal) (output) These are the two data bus status signals. The
four combinations of these signals give the information of what the
microprocessor is doing or the encoded status of the bus cycle
Group 5: Serial IO Signal

Serial Input data line (SID)


When an instruction called RIM is executed. The data on this line goes to D7
of accumulator.
RIM :
Remote
Infrastructure
Management,
which is a service
that allows for the
remote
management of IT
infrastructure.
Serial output data line (SOD)
When instruction SIM is executed data from D7 of the accumulator goes on
SOD

SIM:
Set Interrupt Mask
instruction, controls
hardware interrupts by
setting masking bits to
enable or disable them
Group 6: Externally or Peripheral Initiated Signals
TRAP (Input) Trap is a nonmaskable interrupt which have the highest
priority. It is recognized at the same time as INTR. This interrupt cannot be
masked or disabled. This is a vectored interrupt. It is edge as well as level
triggered.
RST 5.5, RST 6.5, RST 7.5: RESTART interrupt (inputs) These three inputs
have the same timing as INTR except they cause an internal RESTART to be
automatically inserted. These interrupts are maskable. The mask can be set
to any of these interrupts by SIM instruction.
INTR (interrupt request) (input) INTR is used as a general purpose interrupt.
INTA (interrupt acknowledge) (output) This signal is generated by
microprocessor in response to the INTR.
….
Interrupts
Example
A temperature monitoring system
Main program keeps on sampling the temperature
and storing it.
A button is provided which when pressed allows
you to print ,say the latest 20 temperature values
Polling every time will waste time
Interrupt will save time
Interrupt- one more example
Can be used to provide battery low warning
Multiple interrupt lines
Priority policy required
Highest priority for critical operations
Low power indications for example
8085 interrupt lines will be studied in some detail later
Use of external IC for demultiplexing
Use of external IC for demultiplexing
Generation of control signals

You might also like