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Microcontroller Assignment -2

This document is an assignment for the course 'Microcontrollers' at PES Institute of Technology and Management, focusing on ARM processor exceptions, interrupt handling, and cache memory architecture. It includes a series of questions covering topics such as exception priorities, interrupt latency, firmware execution, and cache memory relationships. The assignment is due for submission on 18/05/2025, having been assigned on 11/05/2025.

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4 views

Microcontroller Assignment -2

This document is an assignment for the course 'Microcontrollers' at PES Institute of Technology and Management, focusing on ARM processor exceptions, interrupt handling, and cache memory architecture. It includes a series of questions covering topics such as exception priorities, interrupt latency, firmware execution, and cache memory relationships. The assignment is due for submission on 18/05/2025, having been assigned on 11/05/2025.

Uploaded by

gloryrp58
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
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Prerana Educational and Social Trust (R.

)
PES INSTITUTE OF TECHNOLOGY AND MANAGEMENT
NH-206, Sagar Road, Shivamogga-577204, Karnataka, India.
Affiliated to VTU, Belagavi, Approved by AICTE, New Delhi, Recognised by Govt. of Karnataka

Department of Computer Science &Engineering (Data Science)

MICROCONTROLLERS (BCS402)
ASSIGNMENT-2

Assigned Date: 11/05/2025


Submission Date: 18/05/2025

ANSWER ALL QUESTIONS

Qn. MODULE-4
1. With a neat diagram explain ARM processor exceptions and modes. Write IVT.
2. Write a note on exception priorities and link register offset with neat figures.
3. Explain interrupt latency w.r.t Nested interrupt handler and prioritization.
4. Explain what happens when an IRQ and FIQ exception is raised with an ARM processor.
5. Write a code for enabling and disabling IRQ and FIQ interrupts.
6. Explain Basic Interrupt Stack Design and Implementation.
7. What is Firmware? Explain firmware execution flow.
8. Explain ARM Firmware Suite with examples. (μHAL and Angel)
9. Explain Sandstone directory layout along with sandstone execution flow.
MODULE-5
10. Show where Cache and write buffer fit in memory hierarchy with neat diagram.
11. Explain the relationship that a cache has with main memory system and the processor
core with neat diagram.
12. Distinguish between logical and Physical Caches with neat diagram. (MMU)
13. Explain the basic architecture of cache memory with neat diagram.
14. Explain how main memory maps to a cache memory with neat figure.
15. With a neat block diagram explain associative cache.
16. Briefly explain cache line replacement policies.

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