0% found this document useful (0 votes)
26 views13 pages

DLCO QuestionBank

The document outlines the course structure for 'Digital Logic and Computer Organization' for II B.Tech. students, detailing course objectives, outcomes, and a comprehensive question bank categorized by Bloom's Taxonomy levels. It includes units covering data representation, digital circuits, computer arithmetic, memory organization, and input/output systems, along with corresponding questions for assessment. Textbooks and online resources are also provided to support learning in this subject.

Uploaded by

sreedhar_vk
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
0% found this document useful (0 votes)
26 views13 pages

DLCO QuestionBank

The document outlines the course structure for 'Digital Logic and Computer Organization' for II B.Tech. students, detailing course objectives, outcomes, and a comprehensive question bank categorized by Bloom's Taxonomy levels. It includes units covering data representation, digital circuits, computer arithmetic, memory organization, and input/output systems, along with corresponding questions for assessment. Textbooks and online resources are also provided to support learning in this subject.

Uploaded by

sreedhar_vk
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
You are on page 1/ 13

Question Bank with Blooms Taxonomy Level (BTL)

Subject Name with code: DIGITAL LOGIC AND COMPUTER ORGANIZATION


(23ECT04)
Class: II YEAR /I SEM/B.TECH
Name of the Faculty Member : V.K.Sreedhar Academic Year: 2024-25

II B.Tech. SEMESTER - I
(23ECT04) DIGITAL LOGIC AND COMPUTER ORGANIZATION

Int. Ext. Total


Marks Marks Marks L T P C

30 70 100 3 0 0 3

Course Objectives:
The main objectives of the course is to
 Provide students with a comprehensive understanding of digital logic
design principles and computer organization fundamentals
 Describe memory hierarchy concepts
 Explain input/output (I/O) systems and their interaction with the CPU,
memory, and peripheral devices
Course Outcomes:
After completion of the course, students will be able to
1. Differentiate between combinational and sequential circuits based on
their characteristics and functionalities. Design Sequential and
Combinational circuits (L2)
2. Demonstrate an understanding of computer functional units. (L2)
3. Analyze the design and operation of processors, including instruction
execution, pipelining, and control unit mechanisms, to comprehend their
role in computer systems. (L3)
4. Describe memory hierarchy concepts, including cache memory, virtual
memory, and secondary storage, and evaluate their impact on system
performance and scalability. (L3)
5. Explain input/output (I/O) systems and their interaction with the CPU,
memory, and peripheral devices, including interrupts, DMA, and I/O
mapping techniques. (L3)
UNIT – I:
Data Representation: Binary Numbers, Fixed Point Representation. Floating
Point Representation. Number base conversions, Octal and Hexadecimal
Numbers, components, Signed binary numbers, Binary codes
Digital Logic Circuits-I: Basic Logic Functions, Logic gates, universal logic
gates, Minimization of Logic expressions. K-Map Simplification, Combinational
Circuits, Decoders, Multiplexers

UNIT – II:
Digital Logic Circuits-II: Sequential Circuits, Flip-Flops, Binary counters,
Registers, Shift Registers, Ripple counters
Basic Structure of Computers: Computer Types, Functional units, Basic
operational concepts, Bus structures, Software, Performance, multiprocessors
and multi computers, Computer Generations, Von- Neumann Architecture

UNIT – III:
Computer Arithmetic: Addition and Subtraction of Signed Numbers, Design of
Fast Adders, Multiplication of Positive Numbers, Signed-operand
Multiplication, Fast Multiplication, Integer Division, Floating-Point Numbers
and Operations
Processor Organization: Fundamental Concepts, Execution of a Complete
Instruction, Multiple-Bus Organization, Hardwired Control and Multi
programmed Control

UNIT – IV:
The Memory Organization: Basic Concepts, Semiconductor RAM Memories,
Read-Only Memories, Speed, Size and Cost, Cache Memories, Performance
Considerations, Virtual Memories, Memory Management Requirements,
Secondary Storage

UNIT – V:
Input/Output Organization: Accessing I/O Devices, Interrupts, Processor
Examples, Direct Memory Access, Buses, Interface Circuits, Standard I/O
Interfaces

Textbooks:
1. Computer Organization, Carl Hamacher, Zvonko Vranesic, Safwat Zaky,
6th edition, McGraw Hill
2. Digital Design, 6th Edition, M. Morris Mano, Pearson Education.
Reference Books:
1. Computer Organization and Architecture, William Stallings,
11thEdition, Pearson.
2. Computer Systems Architecture, M.Moris Mano, 3rdEdition, Pearson
3. Computer Organization and Design, David A. Paterson, John L.
Hennessy, Elsevier
4. Fundamentals of Logic Design, Roth, 5thEdition, Thomson
Online Learning Resources:
1. https://nptel.ac.in/courses/106/103/106103068/
Blooms Taxonomy Levels (BTL)
1. Remembering
2. Understanding
3. Applying
4. Analyzing
5. Evaluating
6. Creating
S.No Questions Marks Blooms CO’s
Taxonomy
Level
UNIT-I

PART-A
Write short notes on binary number systems. 2
1 L1 CO1

Discuss 1‟s and 2‟s complement methods of subtraction. 2 L1


2 CO1
Discuss octal number system 2 L1
3 CO1
State and prove transposition theorem. 2 L1
4 CO1

Show how do you convert AND logic to NAND logic? 2 L1


5 CO1
Describe a short note on five bit bcd codes. 2 L1
6 CO1
Illustrate about unit –distance code? State where they are used. 2 L2
7 CO1
State about logic design and what do you mean by positive logic system 2 L1
8 CO1
Define K-map? 2 L1
9 CO1
Write the block diagram of 2-4 and 3-8 decoders? 2 L1
10 CO1
Define magnitude comparator? 2 L1 CO1
11
Simplify the Boolean function x′yz + x′yz′ + xy′z′ + xy′z using K-map 2 L1 CO1
12
How combinatorial circuits differ from sequential circuits? 2 L1 CO1
13
Define the importance of prime implications. 2 L1 CO1
14
Find the minters in a three variable map for f=∑m(0,1,5,7) 2 L1 CO1
15

PART-B
a) Perform the subtraction with the following unsigned binary numbers by 10
taking the 2's complement of the subtrahend

1 i. 100 – 110000 ii. 11010 - 1101. L2 CO1


b) Write short notes on binary number systems.

(a)Perform arithmetic operation indicated below. Follow signed bit notation: 10


i. 001110 + 110010 ii. 101011 - 100110.
2 b) Explain the importance of gray code L2 CO1

Find (3250 - 72532)10 using 10's complement 10


3 L1 CO1

(a) What is the gray code equivalent of the Hex Number 3A7 10
(b) Find 9's complement (25.639)10
4 L1 CO1

State and prove any 4 Boolean theorems with examples 10


5 L5 CO1

Simplify to a sum of 3 terms: 10


a) A'C'D' +AC' +BCD + A'CD' + A'BC + AB'C'
6 b) Given AB' + AB = C, Show that AC' + A'C = B L2 CO1

Write the steps involved in unsigned binary subtraction using complements 10

7 with examples L2 CO1

Differentiate between binary code and BCD code? 10


8 L2 CO1

Convert f(x)= x + y'z into canonical form 10


9 L1 CO1

Implement Half adder using 4 NAND gates. 10


10 L2 CO1

Implement the Boolean function F = AB + CD + E using NAND gates only. 10


11 L2 CO1
Simplify the Boolean function F(w, x, y, z) = Σ(1, 3, 7, 11, 15) + d(w, x, y, z)
= Σ(0. 2, 5)
12 L3 CO1

10

Realize the logic diagram of a full subtractor using only 2-input NAND gates
13 10
L2 CO1

Construct a 4 to 16 line decoder using 2 to 4 line decoders 10


14 L2 CO1

Convert the following: 10

15 i) (41.6875)10to Hexadecimal number L2 CO1


ii) (11001101.0101)2 to base-8

Simplify the given Boolean function using K-MAP and 10

16 Draw the logic diagram. F (A, B, C,D) = πM (3,5,6,7,11,13,14,15) and L2 CO1


d(9,10,12)

Design and draw a full adder circuit. [ 10


17 L6 CO1

a)What is a Magnitude comparator? 10


18 L1 CO1
b) Design and implement a 2-bit Magnitude comparator.

a)What is a Decoder? List its advantages. 10


19 L1 CO1
b) Implement Full Adder using a Decoder and an OR gate.

a) Design 1:8 demultiplexer with neat diagram. 10

20 b) Design 8:1 multiplexer with neat diagram. L6 CO1

UNIT-II
PART-A
What do you mean a stable state? 2
1 L1 CO2
What is a Flip-Flop? 2 L1
2 CO2
What are the applications of Flip-Flops? 2 L1
3 CO2
Express your view about synchronous latch? 2 L1
4 CO2
How do you build a latch using universal gates? 2 L1
5 CO2
What is the flip-flop memory characteristic? 2 L1
6 CO2

Distinguish between synchronous and asynchronous latch? 2 L4


7 CO2

What is meant by clocked flip-flop? 2 L1


8 CO2
Why a gated D latch is called a transparent latch? 2 L1
9 CO2
What are the two types of flip-flops? 2 L1
10 CO2
What are Shift registers? 2 L1
11 CO2
Distinguish between a shift register and counter? 2 L4
12 CO2

What are the applications of shift registers? 2 L1


13 CO2

Discuss about a bidirectional shift register? 2 L6


14 CO2
Summarize about a dynamic shift register? 2 L1
15 CO2
Classify of counters? 2 L2
16 CO2
What are the advantages and disadvantages of ripple counters? 2 L1
17 CO2
What is race-around condition? 2 L1
18 CO2

Draw the basic functional units of a computer. 2 L1


19 CO2

Give short notes on system software. 2 L1 CO2


20
Write the basic performance equation? 2 L2 CO2
21
Define clock rate. 2 L1 CO2
22
What is the role of MAR and MDR? 2 L1 CO2
23
Explain Fixed point representation. 2 L2 CO2
24
Define the term Computer Architecture. 2 L1 CO2
25
What is meant by instruction? 2 L1 CO2
26
Define Multiprocessing. 2 L1 CO2
27

What is Bus? Draw the single bus structure. 2 L1 CO2


28

Briefly explain Primary storage and secondary storage. 2 L2 CO2


29
Define Pipeline processing. 2 L1 CO2
30
Briefly explain Primary storage and secondary storage. 2 L2 CO2
31
What is register? 2 L1 CO2
32
Write down the operation of control unit? 2 L1 CO2
33

Suggest about Program counter 2 L1 CO2


34

PART-B
Analyze the clocked sequential circuits. 10
1 L2 CO2

Examine with the help of a block diagram, the basic components of a Sequential 10 L2
2 Circuit? CO2
Compare RS and JK flip-flops. 10 L2
3 CO2
Describe about T – Flip-flop with the help of a logic diagram and characteristic 10 L2
4 table. Derive a T-flip-flop from JK and D flip-flops. CO2
Define Latch. Explain about Different types of Latches in detail 10 L1
5 CO2

Explain about all flip flops in detail with diagram 10 L2 CO2


6
Derive the characteristic equations for all Flip-Flops. 10 L2 CO2
7

Differentiate combinational and sequential circuits 10 L2 CO2


8
Explain the working principle of JK Flip-Flop in detail. 10 L2 CO2
9
Explain the operation of SR Flip-Flop using asynchronous inputs with truth 10 L2 CO2
10 table.
Discuss the applications of flip-flops 10 L2 CO2
11
Define a Register. Explain in detail about various Shift Registers. 10 L1 CO2
12
a)What is a counter? List the applications of counters. 10 L2 CO2
13 b) Explain in detail about 3-bit ripple Up-counter using suitable diagram.
a) Differentiate synchronous and asynchronous counters. 10 L2 CO2
14 b) Design a 3-bit Synchronous UP/DOWN Counter.
What is bus explain it in detail? 10 L1 CO2
15
Explain the different functional units of a computer 10 L2 CO2
16
Describe the operational concepts between the processor and memory 10 L1 CO2
17

UNIT-III

PART-A
Write the 2’s complement of 1011011 2
1 L1 CO3

Represent (70)10 in a signed magnitude format and One’s Complement form 2 L1


2 CO3

Perform the 2’s complement subtraction of smaller number(101011) from larger 2 L1


3 number(111001). CO3

When can you say that a number is normalized? 2 L1


4 CO3

Define Multi computing 2 L1


5 CO3

Discuss the principle behind the Booth’s algorithm? 2 L1


6 CO3

When performing signed division, the sign of the remainder should be the same 2 L1
7 as the sign of the dividend. Why? CO3

What is a Instruction Code? 2 L1


8 CO3

What is a Operation Code (Opcode)? 2 L1


9 CO3
Define Instruction Format. 2 L1
10 CO3

Specify the sequence of operation involved when an instruction is executed. 2 L1 CO3


11

What are the Most Common Fields Of An Instruction Format? 2 L1 CO3


12

What is Addressing Modes? 2 L1 CO3


13

What are the different types of addressing Modes? 2 L1 CO3


14

Define Register mode and Absolute Mode with examples. 2 L1 CO3


15

State the principle of operation of a carry look-ahead adder 2 L1 CO3


16

What are the main features of Booth’s algorithm? 2 L1 CO3


17

How can we speed up the multiplication process? 2 L1 CO3


18

Write the Add/subtract rule for floating point numbers 2 L1 CO3


19

In floating point numbers when so you say that an underflow or overflow has 2 L1 CO3
20 occurred?

Write the algorithm for non restoring division. 2 L1 CO3


21

What is a Immediate addressing Mode? 2 L1 CO3


22

Define Indirect addressing Mode. 2 L1 CO3


23

What is a Relative Addressing mode? 2 L1 CO3


24

Write the multiply rule for floating point numbers. 2 L1 CO3


25

Compare hardwired and micro programmed controls 2 L2 CO3


26

Write the register transfer sequence to read a word from memory 2 L1 CO3
27

What is a micro program sequencer? 2 L1 CO3


28

Write the register transfer sequence for storing a word in memory 2 L1 CO3
29
What is hard-wired control? How is it different from micro-programmed 2 L1 CO3
30 control?

Under what situations the micro program counter is not incremented after a new 2 L1 CO3
31 instruction is fetched from micro program memory?

Write down the control sequence for Move (R1), R2. 2 L1 CO3
32

Define microprogrammed control. 2 L1 CO3


33

What is control Word and control address registers? 2 L1 CO3


34

Explain address sequencer. 2 L2 CO3


35

PART-B
Explain Fixed point representation. L2
1 10 CO3

a.What are the various ways of representing negative numbers? Explain with 10 L2
2 example b. Distinguish between Fixed point and Floating point representation of CO3
a given number
Perform the arithmetic operation in binary using 2’s complement representation 10 L2
3 (i). (+42) + (-13) (ii) (-42) – (-13). b. Convert the following numbers with the CO3
indicated bases to decimal. (i) (12121)3 (ii) (4310)5 (iii) (50)7
a. Draw and explain the flowchart of instruction cycle. b. Explain any three 10 L2
4 addressing modes with example CO3

a.Draw the flowchart and explain about booths algorithm b. Multiply 100111 10 L2
5 with 11011 using booths algorithm CO3

Explain in detail the different instruction formats with examples 10 L2


6 CO3

What are addressing modes? Explain the various addressing modes with 10 L2
7 examples. CO3

Explain different types of instructions with examples. Compare their relative 10 L2


8 merits and demerits CO3

Explain with an example how to multiply two unsigned binary numbers 10 L2


9 CO3

Derive and explain an algorithm for adding and subtracting two floating point 10 L2
10 binary numbers CO3

With examples explain the Data transfer, Logic and Program Control 10 L2
11 Instructions? CO3
Describe the algorithm for integer division with suitable examples 10 L2 CO3
12

Explain the following: i. Address sequencing in control memory. ii. Micro 10 L2 CO3
13 program sequencer

Explain the design of micro-programmed control unit in detail 10 L2 CO3


14

Explain how control signals are generated using micro-programmed control. 10 L2 CO3
15

What are logical micro operations? Explain about applications of logical micro 10 L1 CO3
16 operation

Explain different types of computer registers with common bus system with a 10 L2 CO3
17 neat sketch.

Explain about shift micro operation 10 L2 CO3


18

What is control memory? Explain with address sequence 10 L1 CO3


19

Discuss in detail about the hardwired control unit with block diagram 10 L2 CO3
20

Explain the design of ALU in detail 10 L2 CO3


21

UNIT-IV
PART-A
Define Memory Access Time?
1 02 L1 CO4

Define memory cycle time. 02 L1


2 CO4

What is cache memory? 02 L1


3 CO4

Explain virtual memory. 02 L2


4 CO4

What is the mapping procedures adopted in the organization of a Cache L1


5 02 CO4
Memory?

Define Hit and Miss? 02 L1 CO4


6

Write the formula for the average access time experienced by the processor in a L1 CO4
7 02
system with two levels of caches
What are the enhancements used in the memory management? 02 L1 CO4
8

What do you mean by seek time? 02 L1 CO4


9

How the data is organized in the disk? 02 L1 CO4


10

Define latency time. 02 L1 CO4


11

PART-B
Draw the neat sketch of memory hierarchy and explain the need of cache 10
1 memory? L2 CO4

Explain about direct and set associative map technique in cache. 10 L2


2 CO4
a)Explain briefly about Memory Hierarchy with neat sketch? 10 L2
3 b) Discuss briefly about synchronous DRAMs? CO4

What is Main Memory and what are the types in it, Explain in detail. 10 L2
4 CO4

Describe the semiconductor RAM and its types in detail? 10 L2


5 CO4

Write briefly about ROM and its types? 10 L2 CO4


6

a)Define track and sector? What is the importance of auxiliary memory? 10 L2 CO4
7 b) Discuss various types of Auxiliary memory.
a) Explain about hit and miss in the memory?] L2 CO4
10
8 b) Define Cache Memory? Explain in detail its mapping functions.

What is Virtual Memory? Discuss how paging helps in implementing virtual L2 CO4
10
9 memory.

a) Differentiate between RAM & ROM? L2 CO4


10 10
b) Distinguish between SRAM & DRAM?

UNIT-V

PART-A
Why IO devices cannot be directly be connected to the system bus?
1 02 L1 CO5
What are the major functions of IO system? 02
2 L1 CO5
What is an I/O Interface? 02
3 L1 CO5
Write the factors considered in designing an I/O subsystem? 02
4 L1 CO5

Explain Direct Memory Access. 02


5 L1 CO5

Define DMA controller. 02


6 L1 CO5

What is a Priority Interrupt? 02 CO5


7 L2

Define asynchronous bus. 02 CO5


8 L1

What do you mean by memory mapped I/O? 02 CO5


9 L2

PART-B
a.What is DMA? Explain 10
1 b. Write about daisy chaining priority L2 CO5
a.Write about asynchronous data transfer. 10 L2
2 b. Explain about serial communication CO5
What is IO Interface? Discuss the differences that exist between central 10 L2
3 computer and Peripherals. CO5

Explain source initiated asynchronous data transfer procedure with necessary 10 L2


4 diagram. CO5

a. What is I/O interface and explain it with block diagram. 10 L2


5 b. Draw the block diagram of DMA controller CO5
Explain how I/O devices can be interfaced with a block diagram 10 L2
6 CO5
How data transfers can be controlled using handshaking technique? 10 L2
7 CO5
Explain the following a) Memory mapped I/O L2
8 b) I/O Registers 10 CO5
c) Hardware Interrupts

Signature of the Course Coordinator

Name: V.K.Sreedhar.

You might also like