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Grade 10 Unit 04 Logic Gates

The document is a lesson on logic gates and Boolean functions for Grade 10, covering basic gates like NOT, AND, and OR, as well as combinational gates such as NAND and NOR. It includes truth tables and circuit diagrams for each gate, along with examples of logical expressions and their simplifications. The lesson aims to provide foundational knowledge in digital logic design.

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0% found this document useful (0 votes)
21 views12 pages

Grade 10 Unit 04 Logic Gates

The document is a lesson on logic gates and Boolean functions for Grade 10, covering basic gates like NOT, AND, and OR, as well as combinational gates such as NAND and NOR. It includes truth tables and circuit diagrams for each gate, along with examples of logical expressions and their simplifications. The lesson aims to provide foundational knowledge in digital logic design.

Uploaded by

nayomi
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as PDF, TXT or read online on Scribd
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Grade 10 - Lesson4

Logic Gates with Boolean functions


;d¾lsl oajdr iu. nQ,Sh ùc ;¾lh
;d¾lsl oajdr iu. nQ,Sh ùc ;¾lh

;d¾lsl oajdr (Logic Gates)


(

 oaúuh ixLHd wkqidrfhka hï hï ;¾l ;;a;aj f.dv kexùug;a ta wkqj hï hï ;SrK


.ekSug;a yels jk mßm: ;d¾lsl mßm: (Logic Circuits) f,i yeÈkafõ'
 mß.Klhla iE§ we;af;a ixlS¾K ixLHdxl mßm: rdYshl tl;=fjks'
 fuu bf,lafg%dksl mßm: ks¾udKh fldg we;af;a ;d¾lsl oajdr keue;s uQ,sl ;d¾lsl mßm:
rdYshla wjYH mßÈ tlsfklg iïnkaO lsÍfuks'
 uOH ieliqï tAllh (CPU) iE§ we;af;a ;d¾lsl oajdr w;súYd, ixLHdjla tl;= ùfuනි.
 ;d¾lsl oajdrhla u.ska isÿ flfrkafka th fj; wdodkh flfrk wdodkhla fyda wdodk
lsysmhla i,ld ne,Sfuka miq wod< m%;sodkhla ,nd §uhs'
 ;d¾lsl oajdr ksmoùfï § tys wNHka;r mßm:h g%dkaisiagr" vfhdav iy m%;sfrdaO wd§
wx.j,ska iukaú; fõ'

1. uQ,sl ;d¾lsl oajdr (Basic Logic Gates)

 NOT
 AND
 OR

NOT Gate

..............................................................................................................................
..............................................................................................................................
..............................................................................................................................
..............................................................................................................................
Truth Table Circuit Diagram

A F=A
̅
F

..............................................................................................................................
..............................................................................................................................
..............................................................................................................................

Harsha Rajakaruna (Bsc in Applied Science BSc (Hons)in IT, MSc in Cyber security (reading)
Tel:+94 74 2508652 WhatsApp:+94 76 2548515 Email: [email protected] 2
AND Gate

..............................................................................................................................
..............................................................................................................................
..............................................................................................................................
..............................................................................................................................

Truth Table Circuit Diagram

A B
A B F=A.B
F

..............................................................................................................................
..............................................................................................................................

ප්‍රතිදාන 3 ක් ඇතිදවිට ,
A B C F=A.B.C

F = A.B.C

Harsha Rajakaruna (Bsc in Applied Science BSc (Hons)in IT, MSc in Cyber security (reading)
Tel:+94 74 2508652 WhatsApp:+94 76 2548515 Email: [email protected] 3
OR Gate

..............................................................................................................................
..............................................................................................................................
..............................................................................................................................
Truth Table Curcuit Diagram

A B F=A+B

..............................................................................................................................
..............................................................................................................................
ප්‍රතිදාන 3 ක් ඇතිදවිට ,

A B C F=A+B+C
A
B F=A + B + C
C

Harsha Rajakaruna (Bsc in Applied Science BSc (Hons)in IT, MSc in Cyber security (reading)
Tel:+94 74 2508652 WhatsApp:+94 76 2548515 Email: [email protected] 4
ixhqla; ;d¾lsl oajdr (Combinational gates)
uQ,sl ;d¾lsl oajdr Ndú;fhka fuu ixhqla; ;d¾lsl oajdr ks¾udKh l< yel

NAND gate

 NAND AND+NOT
Symbol

A A
F F
B B

..............................................................................................................................
..............................................................................................................................
Truth Table

A B F = ̅𝐴̅. ̅𝐵̅

NAND Gate ප්‍රතිදාන 3 ක් ඇතිදවිට,

A B C

A
B
C

Harsha Rajakaruna (Bsc in Applied Science BSc (Hons)in IT, MSc in Cyber security (reading)
Tel:+94 74 2508652 WhatsApp:+94 76 2548515 Email: [email protected] 5
NOR gate
 NOR NOT + OR
Symbol

A A
F F
B B

..............................................................................................................................
..............................................................................................................................
..............................................................................................................................
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Truth Table
A B

NOR Gate ප්‍රතිදාන 3 ක් ඇතිදවිට,

Truth table

A B C
A
B
C

Harsha Rajakaruna (Bsc in Applied Science BSc (Hons)in IT, MSc in Cyber security (reading)
Tel:+94 74 2508652 WhatsApp:+94 76 2548515 Email: [email protected] 6
nq,Sh m%ldYkhg wod< ;d¾lsl mßm: ks¾udKh

Ex 1 F = (X. Z) + Y. Z + X. Y. Z X Y Z
 Three inputs as X, Y, Z
 First drawing and
 Finally, connect using OR gates

X
Y
Z F

Ex 2 Q =(A. B).(A + B).C

A B C


Ex3 Q = A.(A+B)+B
A B A+B A.(A+B)




Harsha Rajakaruna (Bsc in Applied Science BSc (Hons)in IT, MSc in Cyber security (reading)
Tel:+94 74 2508652 WhatsApp:+94 76 2548515 Email: [email protected] 7
my; nQ,Sh m%ldYkj,g wod< ixLHdxl mßm:h we| wod< i;H;d j.= f.dvk.kak'
(a) A+A.B
(b) A.(A+B)
(c) (A+B).(A.C )






































Harsha Rajakaruna (Bsc in Applied Science BSc (Hons)in IT, MSc in Cyber security (reading)
Tel:+94 74 2508652 WhatsApp:+94 76 2548515 Email: [email protected] 8
ixLHdxl mßm:j,g wod< nQ,Sh m%ldYkl ලිවීම
Ex1. 
Let’s consider the following curcuit.

F
B

Let’s build a truth table for the above expression

A B A B AB AB F = AB + AB

0 0 1 1 0 0 0

0 1 1 0 1 0 1

1 0 0 1 0 1 1

1 1 0 0 0 0 0

Ex2.

Harsha Rajakaruna (Bsc in Applied Science BSc (Hons)in IT, MSc in Cyber security (reading)
Tel:+94 74 2508652 WhatsApp:+94 76 2548515 Email: [email protected] 9
my; ixLHdxl mßm:j,g wod< nQ,Sh m%ldYk ,shd Bg wod< i;H;d j.= f.dvk.kak'

1.

2.

3.

4.

5.

Harsha Rajakaruna (Bsc in Applied Science BSc (Hons)in IT, MSc in Cyber security (reading)
Tel:+94 74 2508652 WhatsApp:+94 76 2548515 Email: [email protected] 10
ix.Dys; mßm: (Integrated Circuits)

 ix.Dys; mßm:hla hkq g%dkaisiagr (Transistors), m%;sfrdaOl (Resistors), Odß;%l (Capacitors) yd


vfhdav (Diodes) jeks Wmdx.hkaf.ka ieÿï ,;a hï ksYaÑ; l%shdjla fjkqfjka u ksmojqKq mßm:
úfYaIhls'
 bf,lafg%dksl mßm:hla f.dvke.Sfï § wjYH Wmdx.hla f,i ix.Dys; mßm:hla fyj;a whs'iS'
tlla ye¢kaවේ
 wkql,s; mßm:(IC ) ;=< ;d¾lsl oajdr mßm: wka;¾.; h

Exercise 1

Exercise 2

Harsha Rajakaruna (Bsc in Applied Science BSc (Hons)in IT, MSc in Cyber security (reading)
Tel:+94 74 2508652 WhatsApp:+94 76 2548515 Email: [email protected] 11
;d¾lsl oajdrj, m%dfhda.sl fhojqï

 .

 .

 .

 .

Mulimedia Logic (MM Logic) uDÿldx.h Ndú;fhka mßm: ඇදීම

Harsha Rajakaruna (Bsc in Applied Science BSc (Hons)in IT, MSc in Cyber security (reading)
Tel:+94 74 2508652 WhatsApp:+94 76 2548515 Email: [email protected] 12

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