Assembly Manual
Assembly Manual
QADEER AHMAD
ROLL NO.
19-CS-18
MANUAL SUBMITTED TO
SIR ASIM MUBARAK
DEPARTMENT OF COMPUTER SCIENCE
1.1Section Review
(Basic Concepts of Assembly Language)
Question#1:
Question#5:
Is the assembly language for x86 processors the same as
those for computer systems such as the Vax or Motorola 68x00?
No. Each assembly language is based on either a processor family or a specific computer.
Question#6:
Question#5:
Question#10:
Question#4:
Question#7:
Question#10:
Question#13:
Question#14:
What is the binary representation of the following
hexadecimal numbers?
a. 0126F9D4 b. 6ACDFA95 c. F69BDC2A
(a) 0000 0001 0010 0110 1111 1001 1101 0100
(b) 0110 1010 1100 1101 1111 1010 1001 0101
(c) 1111 0110 1001 1011 1101 1100 0010 1010
Question#15:
Question#16:
Question#20:
Question#23:
Question#26:
Challenge: What is the largest positive value you can represent using a
256-bit signed integer?
+2^255 - 1.
1.4 Section Review
(Boolean Operations)
Question#1:
F∨ T=T
¬F ∨ ¬T=T
Answer will be T.
Question#6:
A B (A ∨ Β) ¬(A ∨ Β)
0 0 0 1
0 1 1 0
1 0 1 0
1 1 1 0
Question#7:
A B ¬A ¬B (¬A ∧ ¬B)
0 0 1 1 1
0 1 1 0 0
1 0 0 1 0
1 1 0 0 0
Question#8:
Question#9:
CHAPTER # 2
(x86 Processor Architecture)
2.1 section review
Question#1:
The central processor unit (CPU) contains registers and what other basic
elements?
Control Unit, Arithmetic Logic Unit, and the clock.
Question#2:
Question#5:
Question#6:
Define multitasking?
The CPU executes multiple tasks (programs) by rapidly switching from one program to the
next. This gives the impression that all programs are executing at the same time.
Question#9:
What is the function of the OS scheduler?
The OS scheduler determines how much time to allot to each task, and it switches between
tasks.
Question#10:
Question#1:
Question#2:
Question#5:
Question#6:
Which flag is set when the result of a signed arithmetic operation is either
too large or too small to fit into the destination?
Overflow.
Question#9:
Question#12:
Which Intel processor was the first member of the IA-32 family?
The Intel 80386.
Question#13:
Question#5:
In real-address mode, convert the following hexadecimal segment-
offset address to a linear address: 0CD1:02E0.
0CFF0h linear address.
Question#6:
In MASM’s flat segmentation model, how many bits hold the address of an
instruction or variable?
32 bits hold the address of an instruction in MASM’s.
Question#7:
(Input-Output System)
2.4 Section Review
Question#1:
Describe VRAM.
VRAM (video ram) holds displayable video data. When CRT monitors are used, VRAM is
dual ported, allowing one port to continuously refresh the display while another port writes
data to the display.
Question#3:
Question#6:
Question#7:
What is the purpose of the 8259A PIC controller?
The 8259 is the interrupt controller chip, sometimes called PIC, that schedules hardware
interrupts and interrupts the CPU.
Question#8:
(Input-Output System)
2.5 section review
Question#1:
Question#2:
Question#3:
Question#4:
Question#5:
Question#6:
Chapter#3:
(Basic Elements of Assembly Language)
Section 3.1
Question#1:
(True/False): A code label is followed by a colon (:), but a data label does
not have a colon.
True
Question#15:
3.3.Section Review
Question#1:
(Defining Data)
3.4 Section Review
Question#1:
(Symbolic Constants)
Section Review 3.5
Question#1:
Question#3:
Write a statement that causes the assembler to calculate the number of
bytes in the following array, and assign the value to a symbolic constant
named ArraySize:
myArray WORD 20 DUP(?)
ArraySize ($ - myArray)
Question#4:
Question#5:
Question#6:
Use TEXTEQU to create a symbol named Sample for a
string constant, and then use the
symbol when defining a string variable named MyString.
Code example:
Sample TEXTEQU <"This is a string">
MyString BYTE Sample
Question#7:
Use TEXTEQU to assign the symbol SetupESI to the
following line of code:
movesi,OFFSETmyArray
SetupESI TEXTEQU <movesi, OFFSET myArray>
Q# 1:
What are the three basic types of operands?
Register
Immediate
Memory
Q# 2:
The destination operand of a MOV instruction cannot be a segment
register.
False
Q# 3:
In a MOV instruction, the second operand is known as the destination
operand.
False
Q# 4:
The EIP register cannot be the destination operand of a MOV instruction.
True
Q# 5:
In the operand notation used by Intel, what does reg/mem32 indicate?
A 32-bit register or memory operand
Q# 6:
In the operand notation used by Intel, what does imm16 indicate?
A 16-bit immediate (constant) operand
Q# 7:
For each of the following statements, state whether or not the instruction
is valid:
a. mov ax,var1
b. mov ax,var2
c. mov eax,var3
d. mov var2,var3
e. movzx ax,var2
f. movzx var2,al
g. movds,ax
h. mov ds,1000h
(a) not valid
(b) valid
(c) not valid
(d) not valid
(e) not valid
(f) not valid
(g) valid
(h) not valid
Q# 8:
What will be the hexadecimal value of the destination operand after each
of the following instructions execute in sequence?
mov al,var1 ; a.
mov ah,[var1+3] ; b.
(a) FCh
(b) 01h
Q# 9:
What will be the value of the destination operand after each of the
following instructions
execute in sequence?
mov ax,var2 ; a.
mov ax,[var2+4] ; b.
mov ax,var3 ; c.
mov ax,[var3-2] ; d.
(a) 1000h
(b) 3000h
(c) FFF0h
(d) 4000h
Q# 10:
What will be the value of the destination operand after each of the
following instructions
execute in sequence?
mov edx,var4 ; a.
movzx edx,var2 ; b.
movedx,[var4+4] ; c.
movsx edx,var1 ; d.
(a) 00000001h
(b) 00001000h
(c) 00000002h
(d) FFFFFFFCh
Review 4.2
Q# 1:
Write an instruction that increments val2.
inc val2
Q# 2:
Write an instruction that subtracts val3 from EAX.
sub eax,val3
Q# 3:
Write instructions that subtract val4 from val2.
Code:
mov ax,val4
sub val2,ax
Q# 4:
If val2 is incremented by 1 using the ADD instruction, what will be the
values of the Carryand Sign flags?
C= 0, SF=1.
Q# 5:
If val4 is incremented by 1 using the ADD instruction, what will be the
values of the Overflow and Sign flags?
OF=1, SF=1.
Q# 6:
Where indicated, write down the values of the Carry, Sign, Zero, and
Overflow flags after each instruction has executed:
mov ax,7FF0h
add al,10h ; a. CF = SF = ZF = OF =
add ah,1 ; b. CF = SF = ZF = OF =
add ax,2 ; c. CF = SF = ZF = OF =
Write down the following flag values:
(a) CF=1, SF=0, ZF=1, OF=0
(b) CF=0, SF=1, ZF=0, OF=1
(c) CF=0, SF=1, ZF=0, OF=0
Q# 7:
Implement the following expression in assembly language: AX _ (_val2 _
BX) _ val4.
Code example:
mov ax,val2
neg ax
addax,bx
sub ax,val4
Q# 8:
Is it possible to set the Overflow flag if you add a positive integer to a
negative integer?
No.
Q# 9:
Will the Overflow flag be set if you add a negative integer to a negative
integer and produce a positive result?
Yes.
Q# 10:
Is it possible for the NEG instruction to set the Overflow flag?
Yes (for example, mov al,−128 . . . followed by . . . neg al).
Q# 11:
Is it possible for both the Sign and Zero flags to be set at the same time?
No.
Q# 12:
Write a sequence of two instructions that set both the Carry and Overflow
flags at the same time.
Setting the Carry and Overflow flags at the same time:
mov al,80h
add al,80h
Q# 13:
Write a sequence of instructions showing how the Zero flag could be used
to indicate unsigned overflow after executing INC and DEC instructions.
Setting the Zero flag after INC and DEC to indicate unsigned overflow:
mov al,0FFh
inc al
jzoverflow_occurred
mov bl,1
decbl
jzoverflow_occurred
Q# 14:
In our discussion of the Carry flag we subtracted unsigned 2 from 1 by
negating the 2 and adding it to 1. The Carry flag was the inversion of the
carry out of the MSB of the sum. Demonstrate
this process by subtracting 3 from 4 and show how the Carry flag value is
produced.
Subtracting 3 from 4 (unsigned). Carry out of MSB is inverted and placed in the Carry flag
mov al,4
sub al,3 ; CF = 0
Review 4.3
Q# 1:
The OFFSET operator always returns a 16-bit value.
False.
Q# 2:
The PTR operator returns the 32-bit address of a variable.
False.
Q# 3:
The TYPE operator returns a value of 4 for doubleword operands.
True
Q# 4:
The LENGTHOF operator returns the number of bytes in an operand.
False.
Q# 5:
The SIZEOF operator returns the number of bytes in an operand.
True
Q# 6:
Insert a directive in the given data that aligns myBytesto an even-
numbered address.
Data directive:
.data ALIGN 2
myBytes BYTE 10h, 20h, 30h, 40h
etc.
Q# 7:
What will be the value of EAX after each of the following instructions
execute?
moveax,TYPEmyBytes ; a.
moveax,LENGTHOFmyBytes ; b.
moveax,SIZEOFmyBytes ; c.
moveax,TYPEmyWords ; d.
moveax,LENGTHOFmyWords ; e.
moveax,SIZEOFmyWords ; f.
moveax,SIZEOFmyString ; g.
(a) 1
(b) 4
(c) 4
(d) 2
(e) 4
(f) 8
(g) 5
Q# 8:
Write a single instruction that moves the first two bytes in myBytesto the
DX register. The resulting value will be 2010h.
mov dx, WORD PTR myBytes
Q# 9:
Write an instruction that moves the second byte in myWordsto the AL
register.
mov al, BYTE PTR myWords1
Q# 10:
Write an instruction that moves all four bytes in myBytesto the EAX
register.
moveax, DWORD PTR myBytes
Q# 11:
Insert a LABEL directive in the given data that permits myWordsto be
moved directly to a 32-bit register.
Data directive:
myWordsD LABEL DWORD
myWords WORD 3 DUP(?),2000h
.code
moveax,myWordsD
Q# 12:
Insert a LABEL directive in the given data that permits myBytesto be
moved directly to a 16-bit register.
Data directive:
myBytesW LABEL WORD
myBytes BYTE 10h,20h,30h,40h
.code
movax,myBytesW
Indirect Addressing
Section Review 4.4
Question#1:
Question#7:
Fill in the requested register values on the right side of the following
instruction sequence:
Movesi,OFFSETmyBytes
mov ax,[esi] ; a. AX =
moveax,DWORD PTR myWords ; b. EAX =
movesi,myPointermov ax,[esi+2] ; c. AX =
mov ax,[esi+6] ; d. AX =
mov ax,[esi-4] ; e. AX =
(a) 2010h
(b) 003B008Ah
(c) 0
(d) 0
(e) 0044h
Question#6:
Question#7: For each of the following statements, state whether or not the
instruction is valid:
a. mov ax,var1
b. mov ax,var2
c. mov eax,var3
d. mov var2,var3
e. movzx ax,var2
f. movzx var2,al
g. movds,ax
h. mov ds,1000h
ECX.
Question#8: