Field Effect Transistor(FET)

Sajib Kumar Mohonta

Lecturer
Department of Physics, SUST.
 What is FET?
A bipolar junction transistor (BJT) is a current controlled device
i.e., output characteristics of the device are controlled by base
current and not by base voltage. However, in a field effect
transistor (FET), the output characteristics are controlled by input
voltage (i.e., electric field) and not by input current. This is
probably the biggest difference between BJT and FET. There are
two basic types of field effect transistors:

(i) Junction field effect transistor (JFET)

(ii) Metal oxide semiconductor field effect transistor
(MOSFET)
 Construction of JFET
A junction field effect transistor is a three terminal
semiconductor device in which current conduction is by one type of
carrier i.e., electrons or holes. A JFET consists of a p-type or n-
type silicon bar containing two pn Junctions. If the bar is of n-type,
it is called n-channel JFET or if the bar is of p-type, it is called a
p-channel JFET. A JFET has essentially three terminals i.e. gate
(G), source (S) and drain (D).
 Construction
The voltage between the gate and
source is such that the gate is reverse
biased. This is the normal way of JFET
connection. The drain and source
terminals are interchangeable i.e.,
either end can be used as source and
the other end as drain.
The following points may be noted :
(i) The input circuit (i.e. gate to source)
of a JFET is reverse biased. This means
that the device has high input
impedance.
(ii) The drain is so biased w.r.t. source
that drain current ID flows from the
source to drain.
(iii) In all JFETs, source current IS is
equal to the drain current i.e. IS = ID. Fig: JFET polarities.
 Principle and working of JFET
Principle:
JFET operates on the principle
that width and hence resistance
of the conducting channel can be
varied by changing the reverse
voltage VGS .
Working:
(i) When a voltage VDS is applied
between drain and source
terminals and voltage on the gate
is zero [ See Fig. (i) ], the two pn
junctions at the sides of the bar
establish depletion layers. The
electrons will flow from source to
drain through a channel between
the depletion layers. The size of
these layers determines the
width of the channel and hence
the current conduction through
the bar.
 Principle and working of JFET
(ii) When a reverse voltage VGS is
applied between the gate and source [
Fig. (ii)], the width of the depletion
layers is increased. This reduces the
width of conducting channel, thereby
increasing the resistance of n-type
bar. Consequently, the current from
source to drain is decreased.
On the other hand, if the reverse
voltage on the gate is decreased, the
width of the depletion layers also
decreases. This increases the width of
the conducting channel and hence
source to drain current.
So the current from source to drain
can be controlled by the application of
potential (i.e. electric field) on the
gate. For this reason, the device is
called field effect transistor.
Schematic Symbol of JFET
 Output Characteristics of JFET
The curve between drain current (ID) and
drain-source voltage (VDS ) of a JFET at
constant gate source voltage (VGS) is known
as output characteristics of JFET.
(i) At first, the drain current ID rises
rapidly with drain-source voltage VDS but
then becomes constant. The drain-source
voltage above which drain current becomes
constant is known as pinch off voltage.
Thus in Fig., OA is the pinch off voltage VP.

(ii) After pinch off voltage, the channel

width becomes so narrow that depletion
layers almost touch each other. The drain
current passes through the small passage
between these layers. Therefore, increase
in drain current is very small with VDS
above pinch off voltage. Consequently, Fig: Output curve of JFET
drain current remains constant.
 Important terms and relation
Shorted-gate drain current (IDSS): It is the drain current with
source short-circuited to gate (i.e. VGS = 0) and drain voltage (VDS)
equal to pinch off voltage. It is sometimes called zero-bias current.
Pinch off Voltage (VP): It is the minimum drain-source voltage at
which the drain current essentially becomes constant.
Gate-source cut off voltage VGS (off).:It is the gate-source
voltage where the channel is completely cut off and the drain
current becomes zero.
The gate-source cut off voltage [i.e. VGS (off)] on the transfer
characteristic is equal to pinch off voltage VP. i.e.
VP = |VGS (off) |.

A rather complex mathematical analysis yields the following

expression for drain current :
2
𝑉𝐺𝑆
𝐼𝐷 = 𝐼𝐷𝑆𝑆 1 − 𝑉𝐺𝑆 𝑜𝑓𝑓
 Parameters of JFET
The main parameters of a JFET are (i) a.c. drain resistance (ii)
transconductance (iii) amplification factor.
(i) a.c. drain resistance (rd): It is the ratio of change in drain-
source voltage (ΔVDS) to the change in drain current (ΔID) at
constant gate-source voltage i.e.
∆VDS
a.c. drain résistance, rd = at constant VGS
∆ID
(ii) Transconductance ( gfs ): It is the ratio of change in drain
current (ΔID) to the change in gate-source voltage (ΔVGS) at
constant drain-source voltage i.e.
∆ID
Transconductance, gfs = at constant VDS .
∆VGS
(iii) Amplification factor ( μ ): It is the ratio of change in drain-
source voltage (ΔVDS) to the change in gate-source voltage (ΔVGS)
at constant drain current i.e.
∆VDS
Amplification factor, μ = at constant ID
∆VGS
So amplification factor µ = a.c. drain resistance × transconductance
i.e. µ = rd × gfs
 References

• Principles of Electronics by V. K. Mehta