MEC245

Lecture [2]
Operational Amplifier

Dr. Ahmed M. Saleh

What is an Op-Amp?
2
❑ An Operational Amplifier (known as an “Op-Amp”) is a device that is used
to amplify a signal using an external power source.

❑ Specialized circuit made up of transistors, resistors and capacitors

fabricated on an integrated chip

Differential amplifier is a basic building block

of an op-amp.
Symbol of Operational Amplifier:
3
V+

inverting input −
output V+ +VCC
non-inverting input + V- -VEE or -Vcc

V−

The Gain of OP-AMP is denoted by “A”.

A = (Output/Difference Between Two Input Signals)
= Vo /( V1 – V2 )
Where,
V1 = Voltage Applied at Non-Inverting input
V2 = Voltage Applied at Inverting input
Vo = Output Voltage
 4
Block Diagram of OP-AMP:

Input stage: It consists of a dual input, balanced output differential amplifier. Its function is to amplify the
difference between the two input signals. It provides high differential gain, high input impedance and low
output impedance.
Intermediate stage: The overall gain requirement of an Op-Amp is very high. Since the input stage alone
cannot provide such a high gain. Intermediate stage is used to provide the required additional voltage
gain.
It consists of another differential amplifier with dual input, and unbalanced ( single ended) output.
 Diagr
AMP:

Bloc
OP-

am
of

k
5

Buffer and Level shifting stage: As the Op-Amp amplifies D.C signals also, the small D.C. quiescent voltage
level of previous stages may get amplified and get applied as the input to the next stage causing distortion
the final output.
Hence the level shifting stage is used to bring down the D.C. level to ground potential, when no signal is
applied at the input terminals. Buffer is usually an emitter follower used for impedance matching.
Output stage: It consists of a push-pull complementary amplifier which provides large A.C. output voltage
swing and high current sourcing and sinking along with low output impedance.
OP-AMP ICs:
6
OFFSET
NULL
1 8 N.C. OUTPUT A 1 8 V+
-IN 2 7 V+
− -IN A 2 − 7 OUTPUT B
+IN 3 + 6 OUTPUT
+
V−
OFFSET
+IN A 3 − 6 -IN B
4 5 NULL
V− 4 + 5 +IN B

Notch
DIP: Dual inline package

4
3
2
1
Equivalent Circuit of OP-AMP
7
ip
& Transfer Characteristics: +
+

V_p Ri
Vi Ro

_
+
AVi
in Vo
_

+
V_n

+V =+5V cc

+5V
+
V
o
Vd 0
−
−5V

−V =−5V cc
V1
V1
8
V1 – V2
Difference V1 + V2
Sum
V2
V2

V1 V1/A V1 V1*A
Divider Multiple

V1 dV1/dt V1 ∫ V1.dt
Derivate Integral
9
The ideal operational amplifier model
10

The ideal op amp model is based on the following assumptions:

• it has infinite impedance at both inputs, consequently there is no current drawn from the input
circuits; I- = I+
• it has infinite gain, hence the difference between the input and output voltages is zero. This is
denoted by short circuiting the two inputs; V- = V+
• it has zero output impedance, so that the output voltage is independent of the output current.
The ideal operational amplifier model
11
Non- ideal operational amplifier
12
FREQUENCY DEPENDENT PROPERTIES
13
FREQUENCY DEPENDENT PROPERTIES
14
 Closed Loop Gain
When feedback is used around an operational amplifier, the closed loop gain of the circuit is
15
determined by a ratio involving the input and feedback impedances used. If the closed loop gain
called for by the feedback configuration is greater than the open loop gain available from the
operational amplifier for any particular frequency, closed loop gain will be limited to the open
loop gain value. Thus a plot of the closed loop gain of a X100 (40db) amplifier using the amplifier.
Common-Mode Operation:
16
When the same input signals are applied to both inputs, common-mode operation results, as shown in
Fig. 1-7. Ideally, the two inputs are equally amplified, and since they result in opposite polarity signals
at the output, these signals cancel, resulting in 0-V output. Practically, a small output signal will result.

Common-Mode Rejection:
A significant feature of a differential connection is that the
signals which are opposite at the inputs are highly
amplified, while those which are common to the two inputs
are only slightly amplified-the overall operation being to
amplify the difference signal while rejecting the common
signal at the two inputs. Since noise (any unwanted input
signal) is generally common to both inputs, the differential
connection tends to provide attenuation of this unwanted
input while providing an amplified output of the difference
signal applied to the inputs. This operating feature, referred
to as common-mode rejection.
Common-Mode Reject Ratio (CMRR):
17
One of the more important features of a differential circuit connection, as provided in an op-
amp, is the circuit’s ability to greatly amplify signals that are opposite at the two inputs, while
only slightly amplifying signals that are common to both inputs. An op-amp provides an output
component that is due to the amplification of the difference of the signals applied to the plus
and minus inputs and a component due to the signals common to both inputs. Since
amplification of the opposite input signals is much greater than that of the common input
signals, the circuit provides a common mode rejection as described by a numerical value called
the common-mode rejection ratio (CMRR).
Differential Inputs:
When separate inputs are applied to the op-amp, the resulting difference signal is
the difference between the two inputs.
𝑽𝒅 = 𝑽𝒊𝟏 − 𝑽𝒊𝟐
Common Inputs:
18
When both input signals are the same, a common signal element due to the two
inputs can be defined as the average of the sum of the two signals.
𝟏
𝑽𝒄 = (𝑽𝒊𝟏 + 𝑽𝒊𝟐 )
𝟐
Output Voltage:
Since any signals applied to an op-amp in general have both in-phase and out-of
phase components, the resulting output can be expressed as
𝑽𝒄 = (𝑨𝒅 𝑽𝒅 +𝑨𝒄 𝑽𝒄 )
where 𝑨𝒅 = differential gain, and 𝑨𝒅 = common-mode gain of the amplifier.

Having obtained Ad and Ac, we can now calculate a value for the common-
mode rejection ratio (CMRR), which is defined by the following equation:

𝑨𝒅 𝑨𝒅
𝑪𝑴𝑹𝑹 = 𝑪𝑴𝑹𝑹(𝒅𝑩) = 𝟐𝟎 log 𝟏𝟎
𝑨𝒄 𝑨𝒄
Exercise 1-1:
19
Calculate the CMRR and express it in decibel for the circuit measurements
shown in Fig. 1-8.
[Answers: 666.7, 56.48 dB] Exercise 1-2:
Determine the output voltage of an op-amp
for input voltages of Vi1 = 150 µV, Vi2 = 140
µV. The amplifier has a differential gain of
Ad = 4000 and the value of CMRR is:
(a) 100, and (b) 10^5.

[Answers: (a) 45.8 mV, (b) 40.006 mV]

Slew Rate 20
The maximum rate of change of the output voltage in response to a step input voltage is the slew
rate of an op-amp. The slew rate is dependent upon the high-frequency response of the amplifier
stages within the op- amp.
Slew rate is measured with an op-amp connected as shown in Figure. This particular op-amp
connection is a unity-gain, non-inverting configuration, which will be discussed later. It gives a
worst-case (slowest) slew rate. Recall that the high-frequency components of a voltage step are
contained in the rising edge and that the upper critical frequency of an amplifier limits its response
to step input. The lower the upper critical frequency is, the more slope there is on the output for a
step input.
A pulse is applied to the input as shown, and the ideal output voltage is measured as indicated in 21
figure (b). The width of the input pulse must be sufficient to allow the output to "slew" from its
lower limit to its upper limit, as shown. As you can see, a certain time interval, At, is required for
the output voltage to go from its lower limit -Vmax to its upper limit +Vmax, once the input step
is applied. The slew rate is expressed as
Slew rate = Voutt
where Vout= +Vmax- (-Vmax) The unit of slew rate is volts per microsecond (V/s).
 22
v
desired output
waveform

v
t
actual output 
because of slew
rate limitation
 23
Ideal Practical (µA741)

Open Loop gain A  2 X 105

Input Impedance Zin  2 M
Output Impedance Zout 0 75 
Input offset Voltage 0 2 mV
Input offset Current 0 200 nA
Bandwidth BW  1MHz
CMRR  90dB
Slew Rate  0.5 V/µSec.
 24
Inverting Amplifier vin − 0 vin
i1 = =
R1 R1
0 − vo − vo
i2 = =
RF RF
vin − vo
i1 = i2 =
R1 RF

RF vo RF
vo = −vin AV = =−
R1 vin R1
Non-Inverting Amplifier 25
vid = 0 v1 = v2 = vin
v2 vin
i1 = =
R1 R1
vo − v2 vo − vin
i2 = = i1 = i2
RF RF

vin vo − vin  RF 
= vo = vin 1 + 
R1 RF  R1 
 26
Unity Gain Buffer
27
What is the Purpose of a Unity Gain Buffer?
28
Since it outputs the same signal it inputs, what is its purpose in a circuit?
An op amp circuit is a circuit with very high input impedance. This high input
impedance is the reason unity gain buffers are used. This can be understood as:
❑ When in a circuit in which a power source feeds a low-impedance load, the load
demands and draws a huge amount of current, because the load is low impedance.
According to ohm's law, again, current, I=V/R. If a load has very low resistance, it
draws huge amounts of current. This causes huge amounts of power to be drawn
by the power source and, because of this, causes high disturbances and use of the
power source powering the load.
❑ Whereas if we have a circuit has a very high input impedance, very little current is
drawn from the circuit. Then according to ohm's law the current, I=V/R. Thus, the
greater the resistance, the less current is drawn from a power source. Thus, the
power of the circuit isn't affected when current is feeding a high impedance load.
Summing Amplifier (Adder)
29
vA vB − vo
iA = iB = iF =
iF RA RB RF

iA v A vB vo
i A + iB = iF + =−
RA RB RF

 RF RF 
iB vo = − v A + vB 
 RA RB 
Difference Amplifier (Subtractor)
30

𝑅1
𝑣𝑜 = 𝑣2 −𝑣1
𝑅3

if 𝑅1 = 𝑅2 & 𝑅𝑓 = 𝑅3
 31

vx

RF
vo 2 = −v2
R2
 RF 
vo1 = vx 1 + 
 R2   v1 R3  RF  RF
vo = vo1 + vo 2 =  1 +  − v2
 v1 R3  RF   R1 + R3  R2  R2
vo1 =  1 + 
= v1 − v2 if R1 = R 2 = R 3 = R F
 R1 + R3  R2 
Current to volage convertor
32

𝑣𝑜 = −𝐼𝑖𝑛 ∗ 𝑅
Integrator t
33
vin dvo −1
R
= −C
dt
vo = 
RC 0
vin dt
Differentiator
34
dvin vo dvin
C =− vo = − RC
dt R dt
 35
The instrumentation amplifier

When the input signals are very low level and also have noise, the difference amplifier is
not able to extract a satisfactory difference signal. Possibly the most important circuit
configuration for amplifying sensor output when the input signals are very low level is
the instrumentation amplifier (IA). The requirements for an instrumentation amplifier
are as follows:
• Finite, accurate and stable gain, usually between 1 and 1000.
• Extremely high input impedance.
• Extremely low output impedance.
• Extremely high common mode rejection ratio (CMRR).
 36
The instrumentation amplifier
37
Important amplifier circuits
• Inverting amplifer • Noninverting amplifier
38
Av = − R2 / R1 Av = 1 + R2 / R1
Z in = R1 Z in = 
Z out = 0 Z out = 0

• AC-coupled inverting amplifier • AC-coupled noninverting amplifier

Av = 1 + R2 / R1
Av = − R2 / R1
Z in = Rbias
Z in = R1
Z out = 0
Z out = 0

• Summing amplifier • Bootstrap AC-coupled voltage

Av = − R f / R A / B
follower Av = 1

Z in1 = RA for v A Z in = 

Z in 2 = RB for vB Z out = 0

Z out = 0

Graphs from Prentice Hall

Important amplifier circuits
• Differential amplifier • Howland voltage-to-current
39
converter for grounded load
Z in = R3 + R4 for v1
Z out = 0

G m = −1 / R2
Z in = R1 R2 /( R2 + RL )
Z out = 
• Instrumentation qualify Diff Amp
• Current-to-voltage amplifier
Z in =  Rm = − R f
Z out = 0 Z in = 0
Z out = 0

• Voltage-to-current converter • Current amplifier

G m = io / vin = −1 / R f Avi = −(1 + R2 / R1 )

Z in =  Z in = 0
Z out =  Z out = 

Graphs from Prentice Hall

Important amplifier circuits
• Integrator circuit: produces an • Differentiator circuit: produces
40
output voltage proportional to an output proportional to the
the running time integral of the time derivative of the input
input signal voltage

Graphs from Prentice Hall

 41
Vs + Error -2(Vs + Error)
Error= 3 – V
2(Vs + Error)
 42
Example 2

Design a circuit to achieve the following voltage conversion.

0.2 V – 0.7 V 0V–5V

Signal conditioning circuit
 43
Answer

• It is clear that we need to subtract 0.2V, then multiply the signal by 10.

0.2 V – 0.7 V 0 V – 0.5 V 0V–5V

Zero shift Amplification

• This looks like a differential amplifier with a gain of 10 and a fixed input of 0.2
volts to the inverting side. The following circuit shows how this could be done
using an instrumentation amplifier.
 44

Note that a voltage divider is used to provide the 0.2V offset. The zener diode
is used to keep the bias voltage (i.e. the 0.2V) constant against changes of the
supply.
 45
Example 3
A sensor outputs a voltage in the range of 20 to 250 mV. Develop signal
conditioning so that this become 0 to 5 V. The circuit must have very high
input impedance.

Answer
Let us develop an linear equation for the output in terms of the input

Vout = aVin + b

where a and b are to be found.

• For the given two conditions we can write
46
0 = a (0.020) + b 
  a = 21.7, b = −0.434
5 = a (0.250) + b 
• Hence, the required equation is

Vout = 21.7Vin − 0.434

= 21.7(Vin − 0.02)
• Therefore we need a differential amplifier with a gain of 21.7 and a fixed
input of 0.02V to the inverting side. The following circuit shows how this
could be done using an instrumentation amplifier.
47
 48
Example 4
A bridge circuit for which R4 varies from 100 to 102 is shown below. Show how
this bridge could be connected to the given instrumentation amplifier to provide an
output of 0 to 2.5V for that change in R4. Assume that, in the instrumentation
amplifier circuit, R2 = R3 = 1 k and R1 = 100 k.
Answer 49
• Clearly, the bridge nulls when R4=100 Ω. So, we do not need zero adjustment.
• When R4 = 102Ω the bridge offset voltage is found as

 102 100 
V = Vb − Va = 5 −  = 24.75 mV.
 100 + 102 100 + 100 
• To get an output of 2.5V at 102Ω we need a differential gain of (2.5 V/24.75 mV) = 101.
• For the given instrumentation amplifier we have

 2 R1  R3   2(100)  1 
Vout = 1 +  (V2 − V1 )  101 = 1 +  
 RG  R2   RG  1 
 RG = 2k
50