0% found this document useful (0 votes)
23 views8 pages

Computer Organization Architecture Question Bank 1

The document is a question bank for the Computer Organization Architecture subject at GIFT Bhubaneswar for the academic year 2024-25. It contains a comprehensive list of questions categorized into three sections, covering various topics such as computer architecture, instruction cycles, addressing modes, and arithmetic operations. Each question is assigned marks, course outcomes, and Bloom's Taxonomy levels, indicating the depth of knowledge required for each question.

Uploaded by

Ayusman Kar
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as DOCX, PDF, TXT or read online on Scribd
0% found this document useful (0 votes)
23 views8 pages

Computer Organization Architecture Question Bank 1

The document is a question bank for the Computer Organization Architecture subject at GIFT Bhubaneswar for the academic year 2024-25. It contains a comprehensive list of questions categorized into three sections, covering various topics such as computer architecture, instruction cycles, addressing modes, and arithmetic operations. Each question is assigned marks, course outcomes, and Bloom's Taxonomy levels, indicating the depth of knowledge required for each question.

Uploaded by

Ayusman Kar
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as DOCX, PDF, TXT or read online on Scribd
You are on page 1/ 8

Question Bank 2024-25 GIFT (Autonomous) Bhubaneswar

Subject Name: Computer Organization Architecture Subject Code: (BTCA-T-PC-601)


(BTCS-T-PC-601)
Question Bank 1

Questions
Q Marks CO BTL By
Section-A
No
1 Define the term Computer Architecture. 2 1

What is System Bus? Draw the bus structure? 2 1


2
3 Write down the operation of control unit? 2 1
4 Draw the flow of Instruction cycle. 2 1
5 Briefly explain Primary storage and secondary storage. 2 1
What is the difference between Computer Architecture &
2 1
6 Computer organization?
7 Define RAM & ROM? 2 1
8 Define General purpose Register ? 2 1
9 Define Addressing modes? 2 1
10 Explain one addressing instruction format with example ? 2 1
If the offset value is 20 with register address 1200 , then
2 1
11 using index addressing mode , what is the EA ?
12 What is relative addressing mode ,?with example . 2 1
Move #3000,R1 , belongs to which type of addressing
2 1
13 mode ?
Discuss ISA?
2 1
14
15 What are the difference between IR and PC ? 2 1
16 Write down the full form of CISC & RISC? 2 1
17 Distinguish between data bus and address bus ? 2 1
18 Write down two example of secondary storage device ? 2 1
What are the major components of CPU? 2 1
19
20 Explain MAR & MDR? 2 1
Differentiate between offset is a given as a constant and
2 1
21 offset is the index register ?
Explain two and three address instruction with an
2 1
22 example for each?
What is assembly language ? give example ?
2 1
23
Which register content the current instruction to be
2 1
24 executed in CPU ?
25 What is opcode? 2 1
Define instruction Format?
2 1
26
Explain zero and one address instruction with an example
2 2
27 for each?
With neat diagram, explain the internal architecture of
2 2
28 CPU?
What is the addressing mode use in the instruction PUSH
2 2
29 B?
Page 1
30 Distinguish between Super & Mini Computer 2 2
Give the principle of operation of Booth’s multiplication
2 2
31 algorithm.
What is the difference between the restoring and non-
2 2
32 restoring method of division?
33 Write IEEE standard for floating point format. 2 2
34 Design 4 -bit combinational circuit using 4 full adders. 2 2
Draw the circuits which perform both addition and
2 2
35 subtraction.
Perform arithmetic operation with binary numbers with
negative numbers in signed 2’s Complementary form (- 2 2
36 35) + (-40).
37 Define 1’s and 2’s complement. 2 2
What is the difference between 1’s complement and 2’s
2 2
38 complement?
Comparison between sign magnitude and unsigned
2 2
39 magnitude.
What is the range of signed number in 8bit
2 2
40
How many bits are required to sign magnitude and
2 2
41 unsigned magnitude to represent 32
The negative decimal no -N in 2’s complement
2 2
42 representation is 1011 then representation for –(N+1)
A number is represented in 2’s complement form as
2 2
43 10000. What is its equivalent value?
Determine the greatest negative number which can be
stored in a computer that has 8bit word length & uses 2’s 2 2
44 complement Arithmetic.
45 10011 and 011010 find its decimal number? 2 2
The binary number 11101 represent in 1’s complement
2 2
46 then what is the equivalent decimal number
47 Write down the binary value of -23 and -18? 2 2
48 Represent -9 and -128 in 8bit format in sign magnitude 2 2
Represent -6 in 8bit in 1’s and 2’s complement
2 2
49
Discuss the different ways to represent floating point data
2 2
50 representation.
What are the main features of Booth’s
2 3
51 algorithm?
Write the algorithm for non-restoring division.
2 3
52
Give the booth’s recoding and bit-pair
recoding of the computer. 2 3
53 1000111101000101
Draw the full adder circuit and give the truth
2 3
54 table
How overflow is detected in fixed point
2 3
55 arithmetic?
Why floating-point number is more difficult to
2 3
56 represent and process than integer?
What are the difficulties faced when we use
2 3
57 floating point
Page 2
arithmetic?
Perform the subtraction and represent your
answer in 2’s complement form (10010)2- 2 3
58 (10111)2
X=00110 & Y=10011 are two binary numbers
represented in 2’s complement format. What is the sum
2 3
of X & Y represented in 2’s complement format using
59 5bit.
X=01110 & Y=11001 are two 5bit binary number
represented in 2’s complement format. What is the sum
2 3
of X & Y represented in 2’s complement format using
60 6bit
The 2’s complement of the binary number (1011001110)2
2 3
61
The 1’s complement of the binary number (0111001101)2
2 3
62
Give the booth’s recoding and bit-pair
recoding of the compute 2 3
63 101101
What is the range of exponent E in IEEE 754 Double
2 3
64 precision and Single precision?
Draw the format of single precision floating-point
2 3
65 number presentation in IEEE 754 standards.
Draw the format of double precision floating-point
2 3
66 number presentation in IEEE 754 standards.
67 Find out the binary value of (17.3)2 2 3
Find out the binary value of (1460.125)2
2 3
68
69 Multiply (1111)2 and (111)2 booth multiplication 2 3
70 Add (11100011)2 and (10110011)2 2 3
71 Subtract (1101)2 from (10101111)2 2 3
Give the booth’s recoding and bit-pair
recoding of the computer. 2 3
72 11010
73 Find out the binary value of (-28)10 and (-15)10
74 Represent -7 and -115 in 8bit format in sign magnitude 2 3
Represent -5 in 8bit in 1’s and 2’s complement
2 3
75
76 Multiply using array implication method M=4 and Q=3 2 3
77 Multiply using add-shift method M=4 and Q=3 2 3
78 Multiply using array implication method M=3 and Q=5 2 3
79 Multiply using add-shift method M=3 and Q=5 2 3
What are the difference between Signed and Unsigned
2 3
80 number ?

Q Mark CO BTL
Section B
NO
1 With a neat diagram explain the connections between the 4 2
different processor register and
the memory.
With a neat diagram explain the connections between the
different processor register and
Page 3
the memory.
With a neat diagram explain the connections between the
different processor register and the memory.
2 Discuss the instruction Format in details 4
Mention the functions of different processor registers:
4
3 a) IR b) MAR c) PC
Define immediate addressing mode, Register addressing
4
4 mode and Absolute addressing Mode with examples.
Explain memory locations and addresses.
4 2
5
Define Instruction Cycle. Draw the flow chart of sequence
4 2
6 of instruction cycle in time representation ?
Explain different opcode value of memory –ref.
4 2
7 instruction ?
Explain different type of resister’s functions in processor
4 2
8 –memory diagram ?
9 Explain types of primary memory. With example ? 4 2
Compare RISC with CISC architecture.
4 2
10
What is ISA? Explain the different Architecture with
4 2
11 example?
What is Instruction Cycle. Explain how fetch and execute
4 2
12 operation takes place?
What are the difference between auto-increment and
4 2
13 auto-decrement addressing mode with example ?
Explain memory locations and addresses with example ?
4 2
14
Using zero addressing technique do the following
example 4 2
15 X=(A+B)x(C+D)
16 What is von Neumann architecture , explain wit diagram ? 4 2
Distinguish between Computer Organization and
4 2
17 Computer Architecture.
Using three addresses, two address, one address
4 2
18 instructions do the following example C= (A*B)/D
Explain the Direct and Indirect address with example.
4 2
19
What is stack? Give the organization of register stack with
all necessary elements and explain the working of push 4 2
20 and pop operations with example ?
Explain the instruction format. Discuss different field of
4 2
21 the instruction format?
Define the following terms.
(i) Effective address
4 2
(ii) Immediate instruction
22 (iii) Sequence Counter .
Define Instruction Cycle. Explain its phases in brief with
4 2
23 example .
Define and explain following terms.
1. AC  M[IR]
4 2
2. M[LOC]
24 3.PC=PC+1
25 What is Assembly Language? Why do we need it? What 4 2
Page 4
is the function of
Assembler?
Explain following terms:1) LDA 2) STA 3) HALT
4 2
26
Differentiate between offset is a given as a constant and 4 2
offset is the index register ? with example and memory
27 diagram ?
Briefly explain different type of index addressing mode
4 2
28 with example ?
Differentiate between direct and indirect addressing
4 2
29 mode ?
If R1 and R2 of a computer contain the decimal vale 1200
and 4600 , the what is the EA of the following instruction
4 2
Load 20(R1), R5
30 Add –(R2),R5
With a neat diagram explain the connections between the
different processor register and
the memory.
With a neat diagram explain the connections between the
4 2
different processor register and
the memory.
Design hardware for signed magnitude addition and
31 subtraction?
Explain the process for signed magnitude addition and
4 2
32 subtraction with flow chart.
Implement hardware for multiplying Two fixed- point
binary numbers in signed-magnitude representation along 4 2
33 with its flowchart.
Explain in detail about booth multiplication algorithm
4 2
34 with an example?
Do the truth table of sum and carry –out of singed
number? 4 2
35
What is signed number representation, explain it in 4-bit
format (0 to 7)? 4 2
36
Represent -127 singed number to 8-bit binary format?
4 2
37
Do the logic gate diagram of sum and carry-out in a Full
adder representation? 4 2
38
If 4-bit values added in the full adder representation. Then
do the n-bit full adder diagram? 4 2
39
Justify Cin value changes 0 and 1 for addition and
subtraction simultaneously? Explain with diagram? 4 2
40
If the multiplicand value is 111 and multiplier value is
111, then multiply and justify the answer using array
4 2
implementation method?
41
Do the register configuration diagram of multiplication of
4 2
42 two values in add shift method
Page 5
Q
Section C Marks CO
NO
1 Explain instruction Cycle in flowchart way ? 6 1
2 State & Explain Von – Neumann Architecture? 6 1
What are the different type of instruction formats , briefly
6 1
3 explain with diagram ?
Short note:
A) IR
B) PC 6 1
C) SC
4 MBR
Define and explain following terms.
1. AC  M[IR]
6 1
2. M[LOC]
5 3.PC=PC+1
Compare RISC with CISC architecture.
6 1
6
What is ISA? Explain the different Architecture with
example? 6 1
7
What is Instruction Cycle. Explain how fetch and execute
6 1
8 operation takes place?
What are the difference between auto-increment and auto-
6 1
9 decrement addressing mode with example ?
10 Explain memory locations and addresses with example ? 6 1
Using zero addressing technique do the following example
6 1
11 X=(A+B)x(C+D)
Using restoring division method divide the values where
M=3(divisor) and Q=12(dividend)? 6 1
12
What is the difference between fixed point and floating-
6 1
13 point representation? explain with example?
Using floating point representation, calculate the decimal
value (1460.125)10 in 32-bit and 64-bit IEEE754 standard
6 2
format?
14
Do the multiplication of two unsigned numbers using add
6 2
15 and shift method where M=13 and Q=14?
Do the multiplication of two unsigned numbers using add
and shift method where M=9and Q=2?
6 2

16
17 Do the flow chart of booth’s algorithms? 6 2
Page 6
Using Booth multiplication multiply two unsigned numbers
M=-5 and Q= 4? 6 2
18
Using Booth multiplication multiply two unsigned numbers
6 2
21 M=13 and Q= 4?
Using Bit-pair multiplication method multiply two
unsigned numbers M=13 and Q= -6? 6 2
22
Using Bit-pair multiplication method multiply two
unsigned numbers M=11 and Q= -5? 6 2
25
Using Carry-save addition of summand multiplication
method multiply two unsigned numbers M=101101 and Q=
6 2
111111?
26
Using Carry-save addition of summand multiplication
method multiply two unsigned numbers M=101001and Q=
6 3
101101?
27
What is the benefits of booth multiplication method?
6 3
32
Why fast multiplication is better than booth multiplication
method? 6 3
33
Do the circuit diagram of Binary division?
6 3
36
If the dividend is Q and divisor M then write the steps of
Restoring method of division? 6 3
37
If the dividend is Q and divisor M then write the steps of
6 3
38 non-restoring method?
using restoring division method divide the values where
6 3
39 M=3(divisor) and Q=8(dividend)?

Q
Section D Marks CO BTL
No
Briefly explain about computer functional representation
with diagram ? 8 1
1
List the important characteristics of RISC architecture and
8 1
2 CISC Architecture with it’s functional diagram ?
Discuss about different types of addressing modes. With
example ? 8 2
3
Using different type of instruction addressing solve the
following example 8 1
X=(A+B)x(C+D) ?
4

Page 7
What is instruction formats , explain different type of
instruction formats ? how it is perform in instruction cycle , 8 1
justify in a suitable example ?
5
If the multiplicand value is 0111 and multiplier value is
1011, then multiply and justify the answer using array 8 2
6 implementation method?
using restoring and non-restoring division method divide the
8 1
7 values where M=2(divisor) and Q=8(dividend)?
Describe briefly floating-point number and its operations
with example? Using floating point representation, calculate
the decimal value (354.125)10 in 32-bit and 64-bit IEEE754 8 3
standard format?
8
Do the register configuration diagram of multiplication of
two values in add shift method and multiply 6 and 6 ? justify 8 3
9 your answer with normal multiplication ?
Using Booth multiplication multiply two unsigned numbers
M=13 and Q= 4? Also two signed number s M=11 and Q= 5 8 3
10 ?
Differentiate the following teams :
a) Direct & indirect addressing mode
b) Auto increment and auto decrement addressing
mode?
c) RISC and CISC
11 8 3

** BTL: Bloom’s Taxonomy Level

** CO: Course Outcomes

Page 8

You might also like