1

Experiment No: 1 Date:

CURRENT MIRROR CIRCUIT

Aim: To design and implement current mirror circuit.

Objective: After completion of this experiment, we will be able to design and setup a
current mirror circuit.
Apparatus Required:

Sr. No. Name and Specification Quantity Required

1 Regulated Variable DC Dual-Power Supply 1
[0-32V & 2A]
2 BC107 2
3 Ammeter [0-30mA] 2
1 1
4 Resistors in Ω [ or W] As per circuit design
4 2
5 Breadboard 1
6 Connecting Wires As per circuit design
Principle:
A BJT current mirror is a crucial element in analog circuitry, adept at replicating
current between transistors with precision. It operates by connecting two identical
BJTs to mirror a current accurately, irrespective of load variations. This design ensures
that the mirrored current remains consistent, making it ideal for applications where a
stable current source is required, even in the face of changing loads.
Circuit Diagram:
 2

Design:
VCC − IREF − VBE1 = 0
VCC −VBE1
IREF =
R

∵ IREF = 𝟐𝒎𝑨 , 𝐕𝐁𝐄𝟏 = 𝟎. 𝟕𝐕 , 𝐕𝐂𝐂 = 𝟏𝟐𝐕

12−0.7
R=
2mA

𝑅 = 5.65𝑘Ω (use 6 kΩ)

Effect of β:
Since VBE1 = VBE2 , IC1 = IC2 , IE1 = IE2
IE2 = (β + 1)IB2
IC2
IB2 =
β
IREF = IC1 + IB1 + IB2
IREF = IE1 + IB2
IREF = IE2 + IB2
IREF = (β + 1)IB2 + IB2
IREF = (β + 2)IB2
IC2
IREF = (β + 2)
β
β
IC2 = ( )I
β + 2 REF
 3

Procedure:
1. Check the components.
2. Connect the circuit as shown in the circuit diagram.
3. Power the circuit with specified voltage level.
4. Measure the current flowing through the load.
5. Observe the current by varying the load.
6. Record the readings and compare them with the theoretical values.
Observation:
Load(kΩ) Theoretical Output Practical Output
Current(mA) Current(mA)
1 2

2 2

5 2

Conclusion:
1. The current mirror circuit was constructed and its working was verified by
comparing practically measured output with the expected theoretical values.
2. Variation in load resistance does not affect the mirrored current at the output of
the circuit.
Precautions:
1. Transistor matching for consistent mirrored current.
2. Stable biasing for reliable operation across temperature variations.
3. Double-check transistor values and connections for accuracy before powering
the circuit.
4. Ensure that the transistors are operated within their specified voltage and
current ratings to prevent damage.
5. Guard against short circuits by ensuring proper insulation and secure
connections.
6. Use appropriate current-limiting resistors to protect the transistors from
excessive currents.
7. Minimize exposure to static electricity by handling transistors with care and
grounding yourself properly before touching them.
8. Report any faulty equipment immediately to the TA and do not use it until
inspected and declared safe.
9. Do not damage or tamper with the transistors or leads.
10. Never strip insulation from a wire with your teeth or a knife; always use an
appropriate wire stripping tool.
11. Shield wires with your hands or pliers to prevent bits of wire from flying about
the bench.
 4

Applications:
1. Differential Amplifiers: Used to reduce common-mode gain by providing a
constant current source between emitter and -Vee.
2. Active Loads: Acts as high-resistance loads to stabilize bias points and
increase output resistance in circuits.
3. Biasing in ICs: Establishes uniform biasing for multiple amplifiers within
integrated circuits, ensuring consistent performance.
4. Charging Batteries: Provides a constant current source for charging batteries
efficiently and safely.

Specifications:
 5

Experiment No: 2 Date:

OP-AMP OPEN LOOP INVERTING

AND NON INVERTING CIRCUIT

Aim: To study the output behaviour of an open-loop operational amplifier in inverting

and non-inverting configurations, while examining input offset voltage, input bias
current, and input offset current.

Objective: Upon completion of this experiment, we will be proficient in designing and

implementing op-amp circuits in both open-loop, inverting, and non-inverting
configurations.
Apparatus Required:
Sr. No. Name and Specification Quantity Required
1 Regulated Variable DC Dual-Power Supply 1
[0-32V & 2A]
2 IC 741 1
3 Function Generator 2Vpp,1Mhz (Max) 1

4 Dual Channel DSO 1

100MHz
1 1
5 Resistors in Ω [ or W] As per circuit design
4 2
6 Connecting Wires As per circuit design
7 Multimeter 1
Principle:
In open-loop configurations, op-amps operate without feedback, showcasing an
extraordinary differential gain. This leads to an output voltage theoretically
approaching infinity. However, in practical scenarios, the output is restricted by the
saturation voltage (Vsat), typically about 1 to 2 volts below the supply voltage. The
output polarity is contingent upon the potential at the input terminals; if the non-
inverting terminal boasts a higher potential, the output yields a positive voltage
(+Vsat), whereas if the inverting terminal holds a higher potential, the output presents
a negative voltage (-Vsat).
In an open-loop configuration of an operational amplifier (op-amp), where there is no
feedback, the parameters that can be directly measured or observed are typically
related to the DC characteristics of the op-amp. These include:
1. Input Offset Voltage
2. Input Bias Current
3. Input Offset Current
These parameters are usually measured using specific test setups and instruments
designed for op-amp characterization. While CMRR and slew rate are important
parameters of op-amps, they are typically evaluated in closed-loop configurations or
specific test setups designed for dynamic performance analysis.
 6

Input Offset Voltage (Vos):

Vos is the voltage difference required between the op amp's input terminals to nullify
the output voltage when no signal is applied. It's a crucial parameter in op amp
circuits, affecting accuracy in DC applications. Vos is typically minimized during
manufacturing through trimming or auto-zeroing circuits.
Input Bias Current (Ib):
Ib is the average current flowing into the op amp's input terminals when no external
signal is present. It influences DC offset at the output and can cause errors, especially
with high impedance sources. Low Ib op amps or input bias compensation techniques
help mitigate these errors.
Input Offset Current (Ios):
Ios is the difference between currents flowing into the op amp's input terminals. It
contributes to input offset voltage, particularly in unbalanced impedance scenarios.
Balanced input impedances and low Ios op amps are essential to minimize offset
errors.
Circuit Diagram:

741 Op-Amp Pin Configuration

a) Open-Loop Inverting Amplifier

b) Open-Loop Non-Inverting Amplifier

 7

Input Offset Voltage (Vos):

Input Bias Current(Ib) & Input Offset Current(Ios):

Design:
Vin= 5Vpp (1KHz)
VCC=12V
VEE=-12V
Procedure:
1. Connect the circuit as shown in the circuit diagrams.
2. Make sure that the Op-Amp is powered with connections to pin4(-12V) and
pin7(+12V).
3. Use the function generator to apply an input sinewave of 5Vp-p at a frequency
of 1KHz and Zero DC offset. Observe the output at pin6, on the DSO.
4. Observe the effect of change in the input signal amplitude on the output
waveform.
5. For Parameters, connect the circuit as shown in the circuit diagrams.
6. Make the necessary observations and calculations.
7. Compare the results with the typical parameter values.
 8

Conclusion:

1. In Non-Inverting open loop configuration, the input sinewave was converted

into a, in-phase square wave at the output.
2. In Inverting open loop configuration, the input sinewave was converted into a
inverted square wave at the output.

Sr. Op-Amp Parameter Practical value Typical value

No.
1 Input offset voltage 6mV

2 Input bias current 500nA

3 Input offset current 200mA

Precautions:
1. Operate the op-amp in an open-loop configuration to ensure accurate measurement
of DC parameters specific to the experiment.
2. Shield the experimental setup from environmental disturbances and use shielded
cables to minimize noise and interference, crucial for precise measurements.
3. Before powering the circuit, meticulously verify the accuracy of component values
and connections to prevent errors in data collection.
4. Adhere strictly to the op-amp's specified voltage and current ratings to avoid
damage during experimentation.
5. Guard against short circuits by maintaining proper insulation and securely
connecting all components.
6. Employ current-limiting resistors appropriately to safeguard the op-amp from
potential damage due to excessive currents.
7. Handle components with care to minimize the risk of static discharge, which could
affect measurement accuracy.
8. Immediately report any malfunctioning equipment to the TA and refrain from
further use until it's inspected and deemed safe.
9. Avoid damaging or tampering with the experimental equipment or leads, ensuring
the integrity of the setup.
10. Utilize proper wire stripping tools to avoid damaging wires or risking injury.
11. Take precautions to prevent wire bits from dispersing around the workspace,
maintaining a clean and safe environment for experimentation.
Applications:
1. Voltage Comparators: Utilized for binary decision-making and signal level
detection.
2. Zero-Crossing Detectors: Employed to detect when a signal Crosses zero
amplitude in AC circuits.
 9

Specifications:

Parameter Symbol Conditions Min Typ Max Unit

Supply Voltage VCC ±5 ±15 ±22 V

TA = 25°C, RS ≤ 10
Input Offset Voltage VIO kΩ 1 2 6 mV

Input Offset Current IIO TA = 25°C 20 200 nA

Input Bias Current IIB TA = 25°C 80 500 nA

RL = 2 kΩ,
Large Signal Voltage Gain AV VO = ±10 V 20,000 200,000 V/mV
Common Mode Rejection VO = ±10 V,
Ratio CMRR RS ≤ 10 kΩ 70 90 dB
TA = 25°C, VO = 0
Supply Current ICC V 1 1.7 2.8 mA
RL = 2 kΩ,
Output Voltage Swing VO VCC = ±15 V ±13 ±14 V
RL = 2 kΩ,
Slew Rate SR VO = 2 V step 0.5 0.5 V/μs
Common Mode Input
Voltage VIC ±12 V

Differential Input Voltage VID ±15 V

Input Resistance RI 2 2 MΩ

Output Resistance RO 75 75 Ω
 10

Experiment No: 3 Date:

OP-AMP INVERTING
AND NON-INVERTING CIRCUIT

Aim: To implement the following basic op-amp circuits and study the operation of
each
1. Inverting Amplifier
2. Non-Inverting Amplifier
And study closed loop parameters of an op-amp.

Objective: Upon completion of this experiment, students will be proficient in

designing and implementing op-amp circuits in both open-loop, inverting, and non-
inverting configurations.
Apparatus Required:
Sr. No. Name and Specification Quantity Required
1 Regulated Variable DC Dual-Power Supply 1
[0-32V & 2A]
2 IC 741 1
3 Function Generator 2Vpp,1Mhz (Max) 1

4 Dual Channel DSO 1

100MHz
1 1
5 Resistors in Ω [ or W] As per circuit design
4 2
6 Breadboard 1
7 Connecting Wires As per circuit design
8 Compensating Probes [1:1] 3
Principle:
For an inverting closed-loop op-amp configuration:
In the inverting closed-loop op-amp configuration, the input signal is applied to
the inverting terminal (-), while the non-inverting terminal (+) is typically
grounded or connected to a reference voltage. Due to the op-amp's high gain, a
phenomenon known as "virtual ground" occurs at the inverting input terminal.
This means that the voltage at the inverting input terminal is virtually equal to
the voltage at the non-inverting input terminal. This simplifies analysis, as it
allows treating the inverting input terminal as if it were connected to ground or
the reference voltage.
 11

For a non-inverting closed-loop op-amp configuration:

In the non-inverting configuration, the input signal is applied to the non-
inverting terminal (+), and the output voltage is fed back to the inverting input
through a feedback resistor (Rf). This setup also utilizes negative feedback to
stabilize the op-amp and determine the gain of the circuit.

In both configurations, (Rf) is the feedback resistor and (R1) is the input resistor.
These equations describe the relationship between the input and output voltages,
as well as the gain of the op-amp circuit.
CMRR and slew rate, critical parameters in op-amp characterization, are
primarily evaluated in closed-loop configurations due to their dynamic nature.
Closed-loop setups provide stability through feedback, enabling precise
assessment of CMRR, which evaluates common-mode signal rejection, and
slew rate, which measures response to rapid input changes. In contrast, open-
loop configurations lack feedback, leading to unpredictable behavior and
inaccurate parameter measurement. Thus, closed-loop setups offer controlled
environments for reliable evaluation of CMRR and slew rate, ensuring accurate
characterization of op-amp performance
Slew Rate:
Slew rate (SR) is the maximum rate of change of output voltage with respect to
time. SR is specified in V/µs. IT indicated the inability of the op-amp output
stage to follow the input signal. SR is measured as the maximum possible rate
change of the op-amp output voltage caused by a step voltage at the input of the
op-amp as a voltage follower.

CMRR (Common Mode Rejection Ratio):

The function of amplifying the difference signal and ignoring the common
signal at the two inputs is vital as all electronic circuits are exposed to
interference
 12

Circuit Diagrams:

741 Op-Amp Pin Configuration

NOTE: Ensure that the input signal's amplitude remains within the voltage rails
(VCC and -VEE) to prevent output saturation, which occurs when the input
exceeds these limits. Additionally, design the amplifier's gain carefully to avoid
saturation and maintain a stable output within the desired range.
a) Inverting Amplifier
 13

b) Non-Inverting Amplifier
 14

Measuring Slew Rate:

NOTE: THIS CIRCUIT IS ALSO THE CIRCUIT FOR

VOLTAGE FOLLOWER

Measuring CMRR:
 15

Design:
Vin = 5Vpp (1KHz)
VCC =12V
VEE =-12V
Procedure:
1. Connect the circuit as shown in the circuit diagrams.
2. Make sure that the op-amp is powered with connections to pin4(-12V)
and pin7(+12V)
3. Use the function generator to apply an input sinewave 1Vp-p at a
frequency of 1 kHz and Zero DC offset. Observe the output at pin6, on
the DSO
4. Observe the effect of change in the input DC signal amplitude on the
output amplitude and plot graph of input amplitude v/s output amplitude.
5. For Parameters, connect the circuit as shown in the circuit diagrams.
6. Make the necessary observations and calculations.
7. Compare the results with the typical parameter values.

Observations:
DC Transfer Characteristics:
a) Inverting Amplifier
Rf = 2kΩ Ri = 1kΩ
−𝑅𝑓
𝐴𝑣 = = −2
𝑅𝑖
Sr. No. Input Voltage (Vin ) Output Voltage (Vo )

1 1

2 2

b) Non-Inverting Amplifier
Rf = 10kΩ Ri = 10kΩ
𝑅𝑓
𝐴𝑣 = 1 + = 2
𝑅𝑖
Sr. No. Input Voltage (Vin ) Output Voltage (Vo)

1 1

2 2
 16

Frequency Response

Vin= 1 V p-p
Sr. No. Input Signal Output Gain= Vo/Vin Gain in dB
Frequency Voltage
(Hz) Vo (Volts)

1
2
3
4
5
6
7
8
9
10
11
12

Conclusion:
1. The gain of the non-inverting amplifier decreases with increase in input
frequency.
Sr. Op-Amp Parameter Practical value Typical value
No.
1 Slew Rate 0.5 V/µs

2 CMRR 90 dB

2. Bandwidth from the graph was found to be: .

 17

Precautions:
1. Shield the experimental setup from environmental disturbances and utilize
shielded cables to minimize noise and interference, crucial for obtaining reliable
measurements in a closed-loop configuration.
2. Prior to powering the circuit, meticulously verify the accuracy of component
values and connections to prevent errors in data collection and ensure the
integrity of the closed-loop configuration.
3. Adhere strictly to the op-amp's specified voltage and current ratings to
prevent damage to the device and maintain the stability of the closed-loop circuit
during experimentation.
4. Guard against short circuits by maintaining proper insulation and securely
connecting all components within the closed-loop configuration to prevent
disruptions and potential damage.
5. Employ appropriate current-limiting resistors within the closed-loop circuit to
safeguard the op-amp from potential damage due to excessive currents and
ensure stable operation.
6. Handle components with care to minimize the risk of static discharge, which
could disrupt the closed-loop configuration and affect measurement accuracy.
7. Immediately report any malfunctioning equipment to the TA and refrain from
further use until it's inspected and deemed safe, ensuring the continued
reliability of the closed-loop experiment.
8. Avoid damaging or tampering with the experimental equipment or leads
within the closed-loop configuration, preserving the integrity of the setup and
maintaining accurate measurements.
9. Utilize proper wire stripping tools to avoid damaging wires or risking injury
when making connections within the closed-loop circuit.
10. Take precautions to prevent wire bits from dispersing around the workspace,
maintaining a clean and safe environment conducive to accurate
experimentation in the closed-loop configuration.

Applications:
1. Voltage Amplifiers: Closed-loop op amps provide precise voltage
amplification in audio amplifiers and signal conditioning circuits.
2. Active Filters: Closed-loop configurations enable accurate control over
filter characteristics in low-pass, high-pass, band-pass, and band-stop
filters.
3. Voltage Followers (Buffer Amplifiers): Closed-loop op amps are used
as voltage followers to provide high input impedance and low output
impedance, acting as buffer amplifiers to isolate stages of a circuit.
 18

Specifications:

Parameter Symbol Conditions Min Typ Max Unit

Supply Voltage VCC ±5 ±15 ±22 V

TA = 25°C, RS ≤ 10
Input Offset Voltage VIO kΩ 1 2 6 mV

Input Offset Current IIO TA = 25°C 20 200 nA

Input Bias Current IIB TA = 25°C 80 500 nA

RL = 2 kΩ,
Large Signal Voltage Gain AV VO = ±10 V 20,000 200,000 V/mV
Common Mode Rejection VO = ±10 V,
Ratio CMRR RS ≤ 10 kΩ 70 90 dB
TA = 25°C, VO = 0
Supply Current ICC V 1 1.7 2.8 mA
RL = 2 kΩ,
Output Voltage Swing VO VCC = ±15 V ±13 ±14 V
RL = 2 kΩ,
Slew Rate SR VO = 2 V step 0.5 0.5 V/μs
Common Mode Input
Voltage VIC ±12 V

Differential Input Voltage VID ±15 V

Input Resistance RI 2 2 MΩ

Output Resistance RO 75 75 Ω
 19

Experiment No: 4 Date:

OP-AMP: DIFFERENTIATOR, INTEGRATOR

Aim: To design and implement a differentiator and integrator circuit using op-amp.

Objective: Upon completing this experiment, we aim to design and configure an

operational amplifier-based integrator and differentiator circuit for signal processing
applications.
Apparatus Required:
Sr. No. Name and Specification Quantity Required
1 Regulated Variable DC Dual-Power Supply 1
[0-32V & 2A]
2 IC 741 1
3 Function Generator 2Vpp,1Mhz (Max) 1

4 Dual Channel DSO 1

100MHz
1 1
5 Resistors in Ω [ or W] As per circuit design
4 2
6 Capacitors in F As per circuit design
7 Breadboard 1
8 Connecting Wires As per circuit design
9 Compensating Probes [1:1] 3

Principle:
Differentiator Circuit:
The differentiator circuit, utilizing an op amp, computes the derivative of the
input voltage signal with respect to time. It comprises an op amp with a
feedback resistor (Rf) and an input capacitor (C). The output voltage (Vout) of
the differentiator is expressed as Vout(t) = -RC * dVin(t)/dt, where Rf is the
feedback resistor and C is the input capacitor. The time constant (RC)
determines the rate of differentiation, and careful selection of Rf and C is crucial
to achieve the desired differentiation behaviour. The differentiator circuit finds
applications in signal processing tasks such as edge detection, frequency-domain
analysis, and as a component in active filters to implement high-pass filter
functions, where the output voltage is proportional to the derivative of the input
voltage with respect to time.
 20

Integrator Circuit:
The integrator circuit, employing an operational amplifier (op amp), integrates
the input voltage signal over time. It consists of an op amp with a feedback
capacitor (Cf) and an input resistor (R). The output voltage (Vout) of the
integrator is calculated as Vout(t) = -1/(RC) * ∫ Vin(t) dt, where R is the input
resistor and C is the feedback capacitor. The time constant (RC) determines the
rate of integration, and careful selection of R and C is essential to achieve the
desired integration behaviour. The integrator circuit is commonly used in
applications such as waveform generation, frequency-domain signal processing,
and as a component in active filters to implement low-pass filter functions,
where the output voltage is proportional to the integral of the input voltage over
time.
Circuit Diagrams:

741 Op-Amp Pin Configuration

1. Differentiator:
 21

2. Integrator:

Design:
Differentiator:
Let unity gain frequency fa=1 / (2πRf C1) = 1kHz
Let C1 = 0.01 µF, then Rf = 15.9 kΩ. (use 15 kΩ std.)
fb=10fa= 10kHz
Hence fb= 1/ (2πR1 C1) = 10 kHz. Therefore R1 =1.59 kΩ (use 1.5kΩ std.)
Also R1 C1 =Rf Cf. Therefore Cf = R1 C1/Rf =0.001 µF
Integrator:
Let the gain limit frequency fa=1 / (2πRf Cf) be 1kHz
The frequency at which the integrator gives unity gain output is given by,
fb= 1/ (2πR1 Cf) = 10 x fa
Let C = 0.01 µF. then Rf = 15.9 kΩ (use 15 kΩ std.)
And R1 = 1.59 kΩ (use 1.5kΩ std.)

Procedure:
1. Connect the circuit as shown in the circuit diagrams.
2. Make sure that the op-amp is powered with connections to pin4(-15V)
and pin7(+15V)
3. Use the Function Generator to apply an input square wave of ±0.5V (1V
pp) and 1kHz frequency at the input and observe the input and output
simultaneously on DSO
4. Use the Function Generator to apply an input sinewave of ±0.5V (1V pp)
and observe the output amplitude by varying the input frequency. Note
down the readings at appropriate frequency intervals and plot the
frequency versus gain plot
 22

Observation:
Differentiator:
Vin = 1V p-p
Sr. No. Input Frequency Output voltage Gain in dB
(Hz) Vo(p-p) (Volts) 20log10(Vo/Vin)

1
2
3
4
5
6
7
8
9
10

Integrator:
Vin = 1V p-p
Sr. No. Input Frequency Output voltage Gain in dB
(Hz) Vo(p-p) (Volts) 20log10(Vo/Vin)

1
2
3
4
5
6
7
8
9
10
 23

Conclusion:
Sr. No. Circuit Parameter Theoretical Value
value (Hz) obtained
from graph
(Hz)
1 Differentiator fa

fb

2 Integrator fa

fb

The working of op-amp integrator and differentiator is studied.

NOTE: In the experiment, slight discrepancies in practical output may
arise due to the use of standard component values instead of those precisely
derived from design equations. This discrepancy occurs because standard
values, while close approximations, may deviate slightly from ideal
theoretical values, influencing experimental results.

Precautions:
1. Double-check component values and connections to ensure accuracy before
powering the circuit, particularly verifying the feedback capacitor for integrator
and feedback resistor for differentiator configurations.
2. Ensure that the circuit components, including the op-amp, resistors, and
capacitors, operate within their specified voltage and current ratings to prevent
damage and ensure reliable performance.
3. Guard against short circuits by ensuring proper insulation and securely
connecting all components, paying special attention to the feedback network in
both integrator and differentiator circuits.
4. Utilize appropriate current-limiting resistors in the input and feedback paths
of the op-amp to protect the circuit from excessive currents, especially during
rapid input changes in differentiator circuits.
5. Minimize exposure to static electricity by handling components with care and
grounding yourself properly before touching them, reducing the risk of damage
to sensitive circuit elements.
6. Promptly report any faulty equipment to the TA and refrain from using it
until inspected and deemed safe, maintaining the integrity of the integrator or
differentiator experiment.
7. Avoid damaging or tampering with the equipment or leads, ensuring the
proper functioning of the op-amp circuit and the accuracy of experimental
results.
 24

8. Use appropriate wire stripping tools to prevent damage to wires and ensure
secure connections in both the integrator and differentiator circuits, avoiding the
risk of short circuits or signal distortion.
9. Shield wires with hands or pliers to prevent wire bits from dispersing around
the workspace, maintaining a clean and safe environment during integrator and
differentiator experiments.

Applications:
1.Signal Processing: Integrator and differentiator circuits using operational
amplifiers are essential in signal filtering, waveform manipulation, frequency
analysis and various applications such as audio processing and instrumentation.
2.Control Systems: These circuits play a crucial role in control systems,
facilitating tasks like PID control and motion control by integrating error signals
and measuring rate-of-change, ensuring stable and precise system control.
 25

Specifications:

Parameter Symbol Conditions Min Typ Max Unit

Supply Voltage VCC ±5 ±15 ±22 V

TA = 25°C, RS ≤ 10
Input Offset Voltage VIO kΩ 1 2 6 mV

Input Offset Current IIO TA = 25°C 20 200 nA

Input Bias Current IIB TA = 25°C 80 500 nA

RL = 2 kΩ,
Large Signal Voltage Gain AV VO = ±10 V 20,000 200,000 V/mV
Common Mode Rejection VO = ±10 V,
Ratio CMRR RS ≤ 10 kΩ 70 90 dB
TA = 25°C, VO = 0
Supply Current ICC V 1 1.7 2.8 mA
RL = 2 kΩ,
Output Voltage Swing VO VCC = ±15 V ±13 ±14 V
RL = 2 kΩ,
Slew Rate SR VO = 2 V step 0.5 0.5 V/μs
Common Mode Input
Voltage VIC ±12 V

Differential Input Voltage VID ±15 V

Input Resistance RI 2 2 MΩ

Output Resistance RO 75 75 Ω
 26

Experiment No: 5 Date:

OP-AMP: SUMMING, SCALING
AND AVERAGING AMPLIFIER

Aim: To design and verify the operation of summer (adder), scale changer and
averaging circuit using op-amp.
Objective: Through this experiment, we endeavour to construct and validate
operational amplifier-based summing, scaling, and averaging amplifiers, pivotal for
consolidating signals, adjusting amplitudes, and computing averages in various signal
processing scenarios.
Apparatus Required:
Sr. No. Name and Specification Quantity Required
1 Regulated Variable DC Dual-Power Supply 1
[0-32V & 2A]
2 IC 741 1
3 Multimeter/Voltmeter 1
1 1
4 Resistors in Ω [ or W] As per circuit design
4 2
5 Breadboard 1
6 Connecting Wires As per circuit design
Principle:
Summing Amplifier: An operational amplifier (op-amp) configured as a
summing amplifier, or adder, combines multiple input voltages to produce an
output voltage equal to their sum. The summing amplifier can be implemented
as an inverting or non-inverting configuration, depending on the connections to
the op-amp's input terminals. In both cases, the output voltage is a linear
combination of the input voltages, providing a convenient means of adding
signals.
Scaling Amplifier: A scaling amplifier utilizes an op-amp to amplify each
input voltage by a different factor, effectively scaling or weighting the inputs
differently at the output. This allows for precise adjustment of signal
amplitudes, making the circuit suitable for applications where signal scaling is
required.
Averaging Amplifier: An op-amp-based averaging amplifier computes the
average of multiple input voltages and generates an output voltage equivalent to
their collective average. By summing and averaging the input signals, the circuit
provides a means of obtaining a representative signal value, useful in scenarios
such as data smoothing or noise reduction.
 27

Circuit Diagram:
741 Op-Amp Pin Configuration

Inverting Configuration:

Non-Inverting Configuration:
 28

Design:
INVERTING CONFIGURATION:
Basic Equation:
𝑅𝑓 𝑅𝑓
𝑉𝑜𝑢𝑡 = − ( 𝑉1 + 𝑉2)
𝑅1 𝑅2

Summing:
𝑅𝑓
In this case = 1
𝑅
𝑉𝑜𝑢𝑡 = −(𝑉𝑎 + 𝑉𝑏)

Scaling:
𝑅𝑓 𝑅𝑓
𝑉𝑜𝑢𝑡 = − ( 𝑉1 + 𝑉2)
𝑅1 𝑅2
Where R1≠R2
Averaging:
𝑅𝑓 1
In this case =
where N is no. of voltage supply is provided
𝑅 𝑁
1
𝑉𝑜𝑢𝑡 = − (𝑉𝑎 + 𝑉𝑏)
2
NON-INVERTING CONFIGURATION:
Basic equation:
𝑅𝑓 𝑉1 + 𝑉2
𝑉𝑜𝑢𝑡 = (1 + ) ( )
𝑅 2

Summing:
𝑅𝑓
In this case 1 + = 2
𝑅
𝑉𝑜𝑢𝑡 = 𝑉𝑎 + 𝑉𝑏
Averaging:
In this case use Voltage Follower configuration to achieve this
𝑉𝑎 + 𝑉𝑏
𝑉𝑜𝑢𝑡 = ( )
2
Procedure:
1. Connect the circuit as shown in the circuit diagrams.
2. Make sure that the op-amp IC741 is powered with connections to pin4
(-12V) and pin7(+12V)
3. Apply appropriate voltages at the inputs and observe the output voltage at
pi 6 of the IC741.
4. Verify the relation between the input voltages and the output voltage.
 29

Observations:
Inverting Configuration
Summing:
Sr. No. V1(Volts) V2(Volts) Theoretical Practical
output output
voltage voltage
Vout (Volts) Vout (Volts)

1
2

Scaling:
For Rf = R1= R2=

Sr. No. V1(Volts) V2(Volts) Theoretical Practical

output output
voltage voltage
Vout (Volts) Vout (Volts)

1
2
Averaging:
Sr. No. V1(Volts) V2(Volts) Theoretical Practical
output output
voltage voltage
Vout (Volts) Vout (Volts)

1
2
 30

Non-Inverting Configuration
Summing:
Sr. No. V1(Volts) V2(Volts) Theoretical Practical
output output
voltage voltage
Vout (Volts) Vout (Volts)
1
2

Averaging:
Sr. No. V1(Volts) V2(Volts) Theoretical Practical
output output
voltage voltage
Vout (Volts) Vout (Volts)

1
2

Conclusion:
1. Summer (Adder): Successfully combined multiple input
voltages into a single output voltage, showcasing the circuit's
ability to perform addition operations accurately.
2. Scale Changer: Designed a circuit capable of both amplifying
and attenuating input signals, showcasing its flexibility in signal
scaling operations.
3. Averaging Circuit: Implemented an averaging circuit that
accurately calculates the average of multiple input voltages,
showcasing its utility in data processing tasks.

Precautions:
1. Double-check component values and connections to ensure accuracy before
powering the circuit, especially confirming the input resistors for summing and
scaling, and feedback resistors for averaging configurations.
2. Ensure all circuit components, including the op-amp, resistors, and capacitors,
operate within their specified voltage and current ratings to prevent damage and
ensure consistent performance.
3. Guard against short circuits by securely connecting components and providing
proper insulation, particularly within the feedback networks critical for summing,
scaling, and averaging amplifier operation.
 31

4. Employ appropriate current-limiting resistors in the input and feedback paths to

protect the circuit from excessive currents, particularly during rapid changes in input
signals.
5. Minimize exposure to static electricity by handling components carefully and
grounding yourself before touching them, reducing the risk of damage to sensitive
circuit elements.
6. Promptly report any faulty equipment to the TA and refrain from using it until
inspected and deemed safe, maintaining the integrity of the summing, scaling, or
averaging experiment.
7. Avoid damaging or tampering with the equipment or leads, ensuring the proper
functioning of the op-amp circuit and the accuracy of experimental results.
8. Use suitable wire stripping tools to prevent wire damage and ensure secure
connections, minimizing the risk of short circuits or signal distortion.
9. Shield wires with hands or pliers to prevent wire bits from dispersing, maintaining a
clean and safe workspace during summing, scaling, and averaging amplifier
experiments.

Application:
1. Audio and Signal Processing: Op-amp summers are essential for blending
audio signals from different sources, commonly used in mixing consoles and
audio processing units. Scale changers, also known as attenuators or amplifiers,
adjust signal levels to match specific requirements, crucial for controlling
volume or equalization. Additionally, average circuits play a vital role in
reducing noise and maintaining signal integrity, particularly in high-fidelity
audio systems where pristine sound quality is paramount.
2. Digital-to-Analog Conversion (DAC) and Analog-to-Digital Conversion
(ADC): In the realm of digital and analog conversion, op-amp summers and
average circuits are indispensable for preparing signals before conversion. By
conditioning and refining incoming signals, they ensure accurate and reliable
conversion processes in ADC circuits, minimizing distortion and preserving
signal fidelity. This preprocessing step is crucial for achieving high-quality
digital representations of analog signals in various applications, including audio
recording, instrumentation, and telecommunications.
 32

Specifications:

Parameter Symbol Conditions Min Typ Max Unit

Supply Voltage VCC ±5 ±15 ±22 V

TA = 25°C, RS ≤ 10
Input Offset Voltage VIO kΩ 1 2 6 mV

Input Offset Current IIO TA = 25°C 20 200 nA

Input Bias Current IIB TA = 25°C 80 500 nA

RL = 2 kΩ,
Large Signal Voltage Gain AV VO = ±10 V 20,000 200,000 V/mV
Common Mode Rejection VO = ±10 V,
Ratio CMRR RS ≤ 10 kΩ 70 90 dB
TA = 25°C, VO = 0
Supply Current ICC V 1 1.7 2.8 mA
RL = 2 kΩ,
Output Voltage Swing VO VCC = ±15 V ±13 ±14 V
RL = 2 kΩ,
Slew Rate SR VO = 2 V step 0.5 0.5 V/μs
Common Mode Input
Voltage VIC ±12 V

Differential Input Voltage VID ±15 V

Input Resistance RI 2 2 MΩ

Output Resistance RO 75 75 Ω
 33

Experiment No: 6 Date:

OP-AMP: INSTRUMENTATION AMPLIFIER

Aim: To design and verify the operation of instrumentation amplifier using op-amp.

Objective: Through this experiment, we aim to construct and validate the operation of
an instrumentation amplifier, crucial for accurately amplifying small differential
signals in various measurement and instrumentation applications.

Apparatus Required:
Sr. No. Name and Specification Quantity Required
1 Regulated Variable DC Dual-Power Supply 1
[0-32V & 2A]
2 IC 741 3
3 Multimeter/Voltmeter 1
1 1
4 Resistors in Ω [ or W] As per circuit design
4 2
5 Breadboard 1
6 Connecting Wires As per circuit design

Principle:
1. Single Op-Amp Configuration: In a single op-amp instrumentation
amplifier configuration, a single op-amp is used along with precision
resistors to amplify the differential input signal. The op-amp is
configured as a differential amplifier, where the non-inverting input is
connected to one input signal (V2) and the inverting input is connected to
the other input signal (V1). The output voltage is then proportional to the
voltage difference between the two input signals and is amplified by the
gain determined by the resistor values.
2. Two Op-Amp Configuration: In a two op-amp instrumentation
amplifier configuration, two op-amps are used to create a more complex
differential amplifier. The first op-amp serves as a buffer amplifier,
providing high input impedance to prevent loading effects. The second
op-amp is configured as a differential amplifier, similar to the single op-
amp configuration, amplifying the voltage difference between the input
signals. This configuration offers improved performance in terms of gain,
common-mode rejection, and stability compared to the single op-amp
configuration.
3. Three Op-Amp Configuration: The three op-amp instrumentation
amplifier configuration is the most common and widely used. It consists
of three op-amps arranged in a specific configuration to achieve high
gain, excellent common-mode rejection, and low output impedance. The
first two op-amps form a differential amplifier stage, amplifying the
voltage difference between the input signals. The output of the
 34

differential amplifier stage is then fed into the third op-amp, which acts as
a buffer amplifier to provide high input impedance and low output
impedance. This configuration offers superior performance and versatility
compared to the single and two op-amp configurations, making it suitable
for applications requiring precise measurement of small differential
signals.
Special Case:

Circuit Diagram:

741 Op-Amp Pin Configuration

 35

Single Op-Amp Configuration:

𝑅𝑓
𝑉𝑜𝑢𝑡 = (𝑉1 − 𝑉2 )
𝑅1

Two Op-Amp Configuration:

𝑅𝑓
𝑉𝑜𝑢𝑡 = (1 +
𝑅1
) (𝑉2 − 𝑉1 )

Three Op-Amp Configuration:

𝑅𝑓 2𝑅
𝑉𝑜𝑢𝑡 =
𝑅
(1 + 𝑅 ) (𝑉2 − 𝑉1 )
𝑔𝑎𝑖𝑛
 36

Design:

Single Op-Amp Configuration:

Let R3 = Rf =10kΩ
R1 = R2 =1kΩ

Therefore
𝑅𝑓
𝑉𝑜𝑢𝑡 = (𝑉1 − 𝑉2 )
𝑅1

𝑉𝑜𝑢𝑡 = (𝑉1 − 𝑉2 )

Two Op-Amp Configuration:

Let R3 = R2=10kΩ
R1 = R4 =1kΩ
𝑅𝑓
𝑉𝑜𝑢𝑡 = (1 +
𝑅1
) (𝑉2 − 𝑉1 )

𝑉𝑜𝑢𝑡 = 2(𝑉2 − 𝑉1 )

Three Op-Amp Configuration:

Let Rf =R=1kΩ
Rgain = 2kΩ

𝑅𝑓 2𝑅
𝑉𝑜𝑢𝑡 =
𝑅
(1 + 𝑅 ) (𝑉2 − 𝑉1 )
𝑔𝑎𝑖𝑛

𝑉𝑜𝑢𝑡 = 2(𝑉2 − 𝑉1 )

Procedure:
1. Connect the circuit as shown in the circuit diagrams.
2. Make sure that the op-amp IC741 is powered with connections to pin4
(-12V) and pin7(+12V)
3. Apply appropriate voltages at the inputs and observe the output voltage at
pi 6 of the IC741.
4. Note down the observed output voltage and compare with theoretical
value.
 37

Observation:

Single Op-Amp Configuration:

Sr. No V1(Volts) V2(Volts) Theoretical Practical
output output
voltage voltage
Vout (Volts) Vout (Volts)

1
2

Two Op-Amp Configuration:

Sr. No V1(Volts) V2(Volts) Theoretical Practical
output output
voltage voltage
Vout (Volts) Vout (Volts)

1
2

Three Op-Amp Configuration:

Sr. No V1(Volts) V2(Volts) Theoretical Practical
output output
voltage voltage
Vout (Volts) Vout (Volts)

1
2

Conclusion:
1. Successfully designed and implemented the instrumentation amplifier,
demonstrating its efficacy in accurately amplifying small differential signals
for precise measurement applications.
 38

Precautions:
1. Double-check component values and connections meticulously before applying
power to the circuit, ensuring precise placement of resistors and ensuring accurate
feedback network configuration.
2. Operate all circuit components, including the op-amp, resistors, and capacitors,
within their specified voltage and current ratings to maintain circuit integrity and
prevent potential damage.
3. Guard against short circuits by implementing proper insulation and securely
connecting all components, with particular attention to the feedback loops essential for
instrumentation amplifier functionality.
4. Incorporate suitable current-limiting resistors in the input and feedback paths to
safeguard the circuit against excessive currents, particularly during rapid signal
variations.
5. Handle components with care to minimize static electricity exposure, grounding
yourself before touching them to prevent damage to sensitive circuit elements.
6. Immediately report any malfunctioning equipment to the TA and refrain from
further use until it's inspected and deemed safe, ensuring the reliability of the
instrumentation amplifier setup.
7. Avoid damaging or tampering with the equipment or leads, ensuring the accurate
operation of the op-amp circuit and the reliability of experimental measurements.
8. Utilize appropriate wire stripping tools to prevent wire damage and ensure secure
connections within the instrumentation amplifier, mitigating the risk of short circuits
or signal distortion.
9. Shield wires using hands or pliers to prevent wire bits from dispersing, maintaining
a clean and safe working environment during instrumentation amplifier experiments.

Applications:
1. Biomedical Instrumentation: Vital for accurate measurement of bioelectric
signals like ECG and EEG, ensuring high precision and noise rejection in
medical devices.
2. Industrial Process Control: Essential for monitoring and controlling
parameters such as temperature, pressure, and flow rates in
manufacturing processes, ensuring reliable and stable operation.
 39

Specifications:

Parameter Symbol Conditions Min Typ Max Unit

Supply Voltage VCC ±5 ±15 ±22 V

TA = 25°C, RS ≤ 10
Input Offset Voltage VIO kΩ 1 2 6 mV

Input Offset Current IIO TA = 25°C 20 200 nA

Input Bias Current IIB TA = 25°C 80 500 nA

RL = 2 kΩ,
Large Signal Voltage Gain AV VO = ±10 V 20,000 200,000 V/mV
Common Mode Rejection VO = ±10 V,
Ratio CMRR RS ≤ 10 kΩ 70 90 dB
TA = 25°C, VO = 0
Supply Current ICC V 1 1.7 2.8 mA
RL = 2 kΩ,
Output Voltage Swing VO VCC = ±15 V ±13 ±14 V
RL = 2 kΩ,
Slew Rate SR VO = 2 V step 0.5 0.5 V/μs
Common Mode Input
Voltage VIC ±12 V

Differential Input Voltage VID ±15 V

Input Resistance RI 2 2 MΩ

Output Resistance RO 75 75 Ω
 40

Experiment No: 7 Date:

OP-AMP SCHMITT TRIGGER AND MONOSTABLE

MULTIVIBRATOR

Aim: To construct the Schmitt trigger and Monostable Multivibrator using IC 741

Objective: The primary objective of this experiment is to understand the operation of

operational amplifier (op-amp) Schmitt triggers and monostable multivibrators, along
with their applications in signal conditioning, digital circuits, and generating time-
delayed pulse waveforms.
Apparatus Required:
Sr. No. Name and Specification Quantity Required
1 Regulated Variable DC Dual-Power Supply 1
[0-32V & 2A]
2 IC 741 1
3 Function Generator 1

4 Dual Channel DSO 1

100MHz
1 1
5 Resistors in Ω [ or W] As per circuit design
4 2
6 Capacitors in F As per circuit design
7 1N4007 2
8 Breadboard 1
9 Connecting Wires As per circuit design
10 Compensating Probes [1:1] 3

Principle:
It is a regenerative comparator or it is a comparator with hysteresis. This circuit uses
positive feedback and the op-amp is operated in saturation. The output can take two
values +Vsat and –Vsat. When output = +Vsat, the voltage appearing at the non-
inverting terminal is VUT or UTP = +Vsat( R1/R1+R2) called the upper threshold
point. Similarly When output = - Vsat, the voltage appearing at the non-inverting
terminal is VLT or LTP = -Vsat( R1/R1+R2) called the lower threshold point. When
Vin is greater than UTP, the output will switch from +Vsat to –Vsat. Similarly When
Vin is less than LTP; the output will switch from -Vsat to +Vsat which is shown in the
graph. The difference between UTP-LTP is called hysteresis. Hysteresis avoids false
triggering of the circuit by noise. Hysteresis curve is the plot of Vo versus Vin .
Schmitt trigger circuit is used to convert any irregular wave into square wave.

The Monostable multivibrator is also called as one shot multivibrator. The circuit
produces a single pulse of specified duration in response to each external trigger pulse.
It always has one stable state (+Vsat). When an external trigger is applied, the output
state changes and the new state is called quasi stable state (-Vsat). The circuit remains
 41

in this state for a fixed interval of time and then it returns to the original state after this
interval. This time interval is determined discharging of the capacitor from 0.7V to -
βVsat.The time period of quasi stable state or the delay is given by T = 0.69RC
Circuit Diagram:

SCHMITT TRIGGER CIRCUIT

a) Inverting Schmitt trigger circuit:
 42

b) Non inverting Schmitt trigger Circuit:

MONOSTABLE MULTIVIBRATOR
 43

Design:
Inverting Schmitt trigger

Non-Inverting Schmitt trigger

 44

Monostable Multivibrator
Time Period
T= 0.69RC
Let T = 1ms; and C = 0.1µF. Then R = 15KΩ
𝑅2
Feedback factor 𝛽 =
𝑅1+𝑅2
𝑅2 1
Let 𝛽 = 0.5 𝑜𝑟 =
𝑅1+𝑅2 2
If R1=10kΩ R2 =10kΩ

For triggering circuit

Rd Cd= 0.0016t
Let t = 3ms and Cd = 0.01 µF
then Rd = 470Ω
D1 & D2 are diodes 1N 4001

Procedure for Schmitt Trigger:

1. Connect the circuit as shown in the circuit diagrams, ensuring proper
component placement and connections.
2. Power the op-amp with dual power supply connections, ensuring voltages
do not exceed +/-18V.
3. Utilize the function generator to input a greater than threshold sinusoidal
waveform at a frequency of 1KHz with zero DC offset, observing the
output square wave at pin 6 on the DSO.
4. Measure the upper and lower trigger points (UTP and LTP) and compare
them with theoretical values.
5. Plot input-output waveforms on graph paper for visual analysis.
Procedure for Monostable Multivibrator:
1. Check and verify component specifications and ensure proper setup of the
monostable multivibrator circuit on the breadboard.
2. Switch on the power supply and configure the function generator output
to square wave mode with an amplitude of 5V.
3. Observe trigger input, output, and capacitor voltage on different
oscilloscope channels simultaneously.
4. Record and draw waveforms on the graph for detailed examination.
5. Measure the time delay of the monostable multivibrator circuit to validate
its functionality accurately.
 45

Observation:
Schmitt trigger

R1= R2=
Sr no. Circuit Parameter Theoretical Practical
value value
1. Inverting UTP
Schmitt
Trigger
LTP

2. Non- UTP
Inverting
Schmitt
Trigger
LTP

Monostable Multivibrator
Sr. No Theoretical Time Practical Time Period
Period

1 1ms

Conclusion:
The Schmitt Trigger circuit was successfully designed, set up, and tested, with
the output waveform observed on the DSO. The upper and lower trigger point
levels were compared with theoretical values, showing close alignment between
theoretical predictions and practical measurements.
Similarly, the Monostable Multivibrator circuit was constructed and tested,
confirming its ability to generate time-delayed pulse waveforms with accurate
time delay measurements. The practical values closely matched theoretical
expectations, validating the functionality of the circuit design.
 46

Precautions:
1. Ensure input signals exceed threshold levels for Schmitt trigger and apply
trigger pulses for monostable multivibrator.
2. Double-check component values and connections meticulously, critical for
proper operation.
3. Operate all components within specified voltage and current ratings to
prevent damage.
4. Guard against short circuits by ensuring proper insulation and secure
connections.
5. Incorporate current-limiting resistors to safeguard against excessive currents.
6. Handle components with care to minimize static electricity exposure.
7. Immediately report any faulty equipment for inspection before further use.
8. Avoid damaging or tampering with equipment or leads.
9. Utilize appropriate wire stripping tools to ensure secure connections.
10. Shield wires to maintain a clean and safe working environment.

Applications:
For Schmitt Trigger:
1. Comparator Circuits: Utilized as a comparator with hysteresis in
applications such as window detectors, zero-crossing detectors, and waveform
shaping circuits.
2. Pulse Width Modulation (PWM): Employed in PWM circuits for motor
speed control, LED dimming, and power converters.
For Monostable Multivibrator:
1. Timing and Delay Circuits: Used to generate precise time delays or pulses
in sequential operations, such as in sequential logic circuits or timing gates.
2. Pulse Generation: Utilized for generating single, time-delayed pulses in
applications like pulse stretching, pulse shaping, and time-domain
reflectometry.
 47

Specifications:

Parameter Symbol Conditions Min Typ Max Unit

Supply Voltage VCC ±5 ±15 ±22 V

TA = 25°C, RS ≤ 10
Input Offset Voltage VIO kΩ 1 2 6 mV

Input Offset Current IIO TA = 25°C 20 200 nA

Input Bias Current IIB TA = 25°C 80 500 nA

RL = 2 kΩ,
Large Signal Voltage Gain AV VO = ±10 V 20,000 200,000 V/mV
Common Mode Rejection VO = ±10 V,
Ratio CMRR RS ≤ 10 kΩ 70 90 dB
TA = 25°C, VO = 0
Supply Current ICC V 1 1.7 2.8 mA
RL = 2 kΩ,
Output Voltage Swing VO VCC = ±15 V ±13 ±14 V
RL = 2 kΩ,
Slew Rate SR VO = 2 V step 0.5 0.5 V/μs
Common Mode Input
Voltage VIC ±12 V

Differential Input Voltage VID ±15 V

Input Resistance RI 2 2 MΩ

Output Resistance RO 75 75 Ω
 48

Experiment No: 8 Date:

BINARY WEIGHTED AND R-2R LADDER TYPE, D-A

CONVERTER USING OP-AMP

Aim: To Design binary weighted and R-2R ladder type, D-A converter using Op-amp.

Objective: Students will construct and analyse two types of DAC circuits using
operational amplifiers: the binary-weighted DAC and the R-2R ladder DAC. The lab
focuses on understanding DAC design, operational amplifier integration, and the
implications of component tolerances on performance.
Apparatus Required:
Sr. No. Name and Specification Quantity Required
1 Regulated Variable DC Dual-Power Supply 1
[0-32V & 2A]
2 IC 741 3
3 Multimeter/Voltmeter 1
1 1
4 Resistors in Ω [ or W] As per circuit design
4 2
5 Breadboard 1
6 Connecting Wires As per circuit design
Principle:
Binary-Weighted DAC:
In a binary-weighted DAC, the resistor values are scaled based on binary
weights.
Each bit of the digital input is associated with a different resistor network,
with resistor values increasing in binary multiples.
When the digital input is applied to the DAC, each bit controls a switch that
selects the corresponding resistor network.
The output voltage is determined by the weighted sum of the currents
flowing through the selected resistor networks, producing an analog output
proportional to the digital input code.

R-2R Laddertype DAC:

In an R2R DAC, a ladder network of resistors is used to convert digital
inputs into analog outputs.
The resistor ladder consists of two types of resistors: R and 2R. The ladder
network forms a binary-weighted structure, where each bit of the digital
input corresponds to a different resistor network.
When the digital input is applied to the ladder network, the voltage at the
output node is determined by the weighted sum of the currents through the
resistor branches.
The output voltage is proportional to the digital input code, with each bit
contributing a voltage determined by its position in the binary sequence.
 49

In both R-2R ladder and binary-weighted DAC architectures employing op-

amps, resolution and accuracy are vital parameters. Resolution, determined
by the number of bits in the digital input, dictates the level of detail in the
analog output signal. In R-2R ladder DACs, each additional bit doubles the
number of output voltage levels, while in binary-weighted DACs,
exponential increases in resolution occur with each added bit due to scaled
resistor values. However, achieving high resolution is futile without
accuracy. Imperfections in resistor values, op-amp characteristics, and
circuitry introduce errors that affect accuracy. Calibration techniques, careful
component selection, and proper grounding/shielding mitigate these errors,
ensuring precise conversion from digital to analog signals.
Circuit Diagram:
IC741 Pin Diagram

Binary Weighted DAC

 50

R-2R Ladder DAC

Design:

BINARY WEIGHTED DAC

𝑏0 𝑏1 𝑏2 𝑏3
𝑉𝑜 = −𝑅𝑓 ([ ] + [ 𝑅 ]+[ 𝑅 ]+[ 𝑅 ])
𝑅
2 4 8

Let Rf = 1 kΩ

R=10kΩ

Then,

𝑏0+[2∗𝑏1]+[4∗𝑏2]+[8∗𝑏3]
𝑉𝑜 = − ( )
10

R-2R LADDER DAC

𝑏3 𝑏2 𝑏1 𝑏0
𝑉𝑜 = −𝑅𝑓 ( + + + )
2𝑅 4𝑅 8𝑅 16𝑅

Let Rf = 20 kΩ

R=10kΩ
𝑏2 𝑏1 𝑏0
𝑉𝑜 = − (𝑏3 + + + )
2 4 8
 51

Observation:

BINARY WEIGHTED DAC:

Decimal Input(V) Theoretical Practical Vout
Equivalent Vout
of binary b3 b2 b1 b0
i/p
0 0 0 0 0 0

1 0 0 0 5 -0.5

2 0 0 5 0 -1.0

3 0 0 5 5 -1.5

4 0 5 0 0 -2.0

5 0 5 0 5 -2.5

6 0 5 5 0 -3.0

7 0 5 5 5 -3.5

8 5 0 0 0 -4.0

9 5 0 0 5 -4.5

10 5 0 5 0 -5.0

11 5 0 5 5 -5.5

12 5 5 0 0 -6.0

13 5 5 0 5 -6.5

14 5 5 5 0 -7.0

15 5 5 5 5 -7.5
 52

R-2R LADDER DAC

Decimal Input(V) Theoretical Practical Vout

Equivalent Vout
of binary b3 b2 b1 b0
i/p
0 0 0 0 0 0

1 0 0 0 5 -0.625

2 0 0 5 0 -1.25

3 0 0 5 5 -1.875

4 0 5 0 0 -2.50

5 0 5 0 5 -3.125

6 0 5 5 0 -3.750

7 0 5 5 5 -4.375

8 5 0 0 0 -5.0

9 5 0 0 5 -5.625

10 5 0 5 0 -6.25

11 5 0 5 5 -6.875

12 5 5 0 0 -7.50

13 5 5 0 5 -8.125

14 5 5 5 0 -8.875

15 5 5 5 5 -9.375
 53

Conclusion:
Binary weighted DACs generally offer higher accuracy and precision but are
more complex and costly to implement compared to R-2R ladder DACs. The
choice depends on priorities like accuracy, cost, and complexity in a specific
application.
NOTE: In the experiment, slight discrepancies in practical output may
arise due to the use of standard component values instead of those precisely
derived from design equations. This discrepancy occurs because standard
values, while close approximations, may deviate slightly from ideal
theoretical values, influencing experimental results.

Precautions:
1. Double-check resistor values and connections to ensure accuracy in the R-2R
ladder or binary-weighted DAC circuit before applying power.
2. Operate all circuit components, including resistors and op-amps, within their
specified voltage and current ratings to avoid damage during the experiment.
3. Prevent short circuits by securely connecting components and insulating
connections within the DAC circuit.
4. Include current-limiting resistors appropriately in the DAC setup to safeguard
against excessive currents and protect the components.
5. Handle DAC components with care to minimize static electricity discharge,
grounding yourself before handling to prevent damage to sensitive elements.
6. Immediately notify the TA of any malfunctioning equipment, ensuring safety
before proceeding with the experiment.
7. Avoid damaging or altering the DAC equipment or connections, maintaining
the integrity of the experimental setup.
8. Utilize wire stripping tools to remove insulation from wires safely,
preventing damage to the wires or components.
9. Shield wires with hands or pliers during wiring to prevent wire fragments
from scattering, ensuring a clean and safe work environment.

Applications:
1)Electronics Engineering Research:
Researchers in electronics engineering can use the experiment to study and
compare the performance characteristics of binary weighted and R-2R ladder
DACs under various conditions.
2) Product Development in Audio Systems:
Engineers working on audio equipment, such as digital-to-analog converters for
music production or high-fidelity audio systems, can use the experiment to
evaluate DAC performance for accurate signal conversion.
 54

Specifications:

Parameter Symbol Conditions Min Typ Max Unit

Supply Voltage VCC ±5 ±15 ±22 V

TA = 25°C, RS ≤ 10
Input Offset Voltage VIO kΩ 1 2 6 mV

Input Offset Current IIO TA = 25°C 20 200 nA

Input Bias Current IIB TA = 25°C 80 500 nA

RL = 2 kΩ,
Large Signal Voltage Gain AV VO = ±10 V 20,000 200,000 V/mV
Common Mode Rejection VO = ±10 V,
Ratio CMRR RS ≤ 10 kΩ 70 90 dB
TA = 25°C, VO = 0
Supply Current ICC V 1 1.7 2.8 mA
RL = 2 kΩ,
Output Voltage Swing VO VCC = ±15 V ±13 ±14 V
RL = 2 kΩ,
Slew Rate SR VO = 2 V step 0.5 0.5 V/μs
Common Mode Input
Voltage VIC ±12 V

Differential Input Voltage VID ±15 V

Input Resistance RI 2 2 MΩ

Output Resistance RO 75 75 Ω
 55

Experiment No: 9 Date:

OP-AMP: SQUARE WAVE GENERATOR,

TRIANGULAR WAVE GENERATOR

Aim: To Design square wave generator and triangular wave generator using op-amp.

Objective: To build and analyse circuits using operational amplifiers to generate

square and triangular waveforms. Students will understand the fundamentals of op-
amp based oscillator designs.

Apparatus Required:
Sr.No. Name and Specification Quantity Required
1 Regulated Variable DC Dual-Power Supply 1
[0-32V & 2A]
2 IC 741 1
3 Function Generator 1

4 Dual Channel DSO 1

100MHz
1 1
5 Resistors in Ω [ or W] As per circuit design
4 2
6 Capacitors in F As per circuit design
7 Breadboard 1
8 Connecting Wires As per circuit design
9 Compensating Probes [1:1] 3

Principle:
The basic square wave oscillator is based on the charging and discharging of a
capacitor. Op-amps inverting input is the capacitor voltage and the non-inverting input
is a portion of the output fed back through resistors. When the circuit is first turned
ON, the capacitor is uncharged, and thus the inverting input is at OV. This makes the
output a positive maximum Vsat, and the capacitor begins to charge towards voltage
Vsat through resistor R. When the capacitor voltage reaches a value equal to the
feedback voltage (Vf) on the non-inverting input, the op-amp switches to the
maximum negative state -Vsat. At this point, the capacitor begins to discharge from
+Vf towards -Vsat. When the capacitor voltage reaches -Vf, the op-amp switches back
to the maximum positive state. This action repeats and a square wave output voltage is
obtained.
Expression for period is T= 2RC ln(1+2 (R1/R2)] If R2= 1.16R1, the equation for
period reduces to T= 2RC
Triangular wave is generated by alternatively charging and discharging a capacitor
with a constant current. This is achieved by connecting integrator circuit at the output
of square wave generator.
 56

To obtain stable triangular wave at the output, it is necessary to have 5R3C2 > T/2,
where T is the period of the square wave input.

Another triangular wave generator, which requires fewer components

Circuit Diagram:
IC741 Pin Diagram
 57

Design:
To design square wave generator with frequency 1kHZ
If R2=1.16R1, the equation for period is T=2RC or f = 0.5/RC
Let R1=10kΩ, then R2=11.6kΩ (Use closest std. value)
Let C=0.1µF, then R=0.5/ (103 x 0.1 x 10-6) = 5kΩ

Procedure:
1. Set up the circuit according to the provided diagrams.
2. Ensure the op-amp is powered correctly, with connections to pin 4 (-15V) and pin 7
(+15V), making sure not to exceed 18V.
3. Construct an astable multivibrator using two op-amps. Connect the output of the
first op-amp to the input of the second, and vice versa, to create a positive feedback
loop. Incorporate pairs of resistors and capacitors to establish the oscillation
frequency.
4. Power the circuit and utilize an oscilloscope to measure the frequency and
amplitude of the square wave output. Adjust resistor or capacitor values to observe
frequency changes.
5. For the triangular wave generator, connect the output of the square wave generator
to the input of another op-amp configured as an integrator. Set the time constant of the
integrator using its resistor and capacitor to properly shape the square wave into a
triangular waveform.
6. Observe the triangular waveform on the oscilloscope and measure its frequency and
amplitude, noting the relationship between these values and the square wave input.
Observations:
Theoretical Frequency Practical Frequency

SQUARE TRIANGULAR SQUARE TRIANGULAR

WAVE WAVE WAVE WAVE

NOTE: In the experiment, slight discrepancies in practical output may arise due to the
use of standard component values instead of those precisely derived from design
equations. This discrepancy occurs because standard values, while close
approximations, may deviate slightly from ideal theoretical values, influencing
experimental results.
 58

Conclusion:
Circuits of op amp square wave generator and triangular wave generator are
designed, setup and waveforms observed.

Precautions:
1. Double-check resistor values and connections to ensure accuracy in the
square and triangular wave generator circuit before applying power.
Additionally, verify that the product of the resistance (R3) and capacitance (C2)
in the integrator circuit is greater than half the period (T) of the square wave
input for stable triangular wave generation at the output.
2. Operate all circuit components, including resistors, capacitors, and op-amps,
within their specified voltage and current ratings to prevent damage during the
experiment.
3. Prevent short circuits by securely connecting components and insulating
connections within the wave generator circuit.
4. Include appropriate current-limiting resistors in the setup to protect
components from excessive currents, especially in the charging and discharging
circuits.
5. Handle wave generator components with care to minimize static electricity
discharge, grounding yourself before handling to prevent damage.
6. Promptly report any malfunctioning equipment to the TA before proceeding
with the experiment for safety.
7. Avoid damaging or altering the wave generator equipment or connections,
maintaining the integrity of the experimental setup.
8. Use wire stripping tools for insulation removal to prevent wire or component
damage during assembly.
9. Shield wires with hands or pliers during wiring to prevent wire fragments
from scattering, ensuring a clean and safe work environment.

Applications:
1. Square waves are important waveforms that are sometimes taken for
granted, but they are important in digital systems as clocks and analog
systems as excitation sources.
2. Triangular functions are useful in signal processing and communication
systems engineering as representations of idealized signals, and the
triangular function specifically as an integral transform kernel function
from which more realistic signals can be derived, for example in kernel
density estimation.
 59

Specifications:

Parameter Symbol Conditions Min Typ Max Unit

Supply Voltage VCC ±5 ±15 ±22 V

TA = 25°C, RS ≤ 10
Input Offset Voltage VIO kΩ 1 2 6 mV

Input Offset Current IIO TA = 25°C 20 200 nA

Input Bias Current IIB TA = 25°C 80 500 nA

RL = 2 kΩ,
Large Signal Voltage Gain AV VO = ±10 V 20,000 200,000 V/mV
Common Mode Rejection VO = ±10 V,
Ratio CMRR RS ≤ 10 kΩ 70 90 dB
TA = 25°C, VO = 0
Supply Current ICC V 1 1.7 2.8 mA
RL = 2 kΩ,
Output Voltage Swing VO VCC = ±15 V ±13 ±14 V
RL = 2 kΩ,
Slew Rate SR VO = 2 V step 0.5 0.5 V/μs
Common Mode Input
Voltage VIC ±12 V

Differential Input Voltage VID ±15 V

Input Resistance RI 2 2 MΩ

Output Resistance RO 75 75 Ω
 60

Experiment No: 10 Date:

ACTIVE HP, LP AND BP FILTER USING OP-AMP

Aim: To design active high-pass, low-pass, and band-pass filters using

operational amplifiers.
Objective: After this experiment, we will gain practical experience in designing and
implementing active high-pass, low-pass, and band-pass filters using operational
amplifiers. We will understand the theoretical principles behind filter design, learn
how to analyse and optimize filter circuits, and appreciate the real-world applications
of active filters in signal processing and electronics.
Apparatus Required:
Sr. No. Name and Specification Quantity Required
1 Regulated Variable DC Dual-Power Supply 1
[0-32V & 2A]
2 IC 741 1
3 Function Generator 1

4 Dual Channel DSO 1

100MHz
1 1
5 Resistors in Ω [ or W] As per circuit design
4 2
6 Capacitors in F As per circuit design
7 Breadboard 1
8 Connecting Wires As per circuit design
9 Compensating Probes [1:1] 3
Principle:
Active Low-Pass Filter:
In a low-pass filter, signals below a certain frequency (the cutoff frequency) are
allowed to pass through unaffected, while signals above the cutoff frequency are
attenuated. An active low-pass filter typically consists of an op-amp configured
as an inverting amplifier with a capacitor in the feedback loop. This capacitor
acts as a frequency-dependent impedance, allowing low frequencies to pass
through and attenuating high frequencies.
1
𝑓𝑐 =
2𝜋𝑅𝐶
Active High-Pass Filter:
In a high-pass filter, signals above a certain frequency (the cutoff frequency) are
allowed to pass through unaffected, while signals below the cutoff frequency
are attenuated. An active high-pass filter also uses an op-amp, but it's
configured as a non-inverting amplifier with a capacitor in series with the input
signal. This capacitor blocks low frequencies and allows high frequencies to
pass.
1
𝑓𝑐 =
2𝜋𝑅𝐶
 61

Active Band-Pass Filter:

A band-pass filter allows only a certain range of frequencies (the passband) to
pass through while attenuating frequencies outside of this range. An active
band-pass filter combines the characteristics of both low-pass and high-pass
filters. It typically consists of two active filter stages: a high-pass stage followed
by a low-pass stage. The cutoff frequencies of the low-pass and high-pass stages
determine the passband of the filter.
1
𝑓𝐿 =
2𝜋𝑅1𝐶1
1
𝑓𝐻 =
2𝜋𝑅2𝐶2

Circuit Diagram:
IC741 Pin Diagram

Active Low-Pass Filter:

 62

Active High-Pass Filter:

Active Band-Pass Filter:

 63

Design:

For Active Low-Pass and High-Pass Filter:

1
𝑓𝑐 =
2𝜋𝑅𝐶
Let 𝑓𝑐 = 1 𝑘𝐻𝑧 C=0.1µF
then R = 1.59 kΩ (use 1.5kΩ std.)

For Active Band-Pass Filter:

1
𝑓𝐿 =
2𝜋𝑅1𝐶1
1
𝑓𝐻 =
2𝜋𝑅2𝐶2
Let C1=C2=0.1µF
𝑓𝐿 = 1 𝑘𝐻𝑧
𝑓𝐻 = 10 𝑘𝐻𝑧
Then,
R1 = 1.59 kΩ (use 1.5kΩ std.)
R2 = 15.9 kΩ (use 15kΩ std.)

Procedure:
1. Connect the circuit as shown in the circuit diagrams.
2. Make sure that the op-amp is powered with connections to
pin4(-15V) and pin7(+15V)
3. Use the Function Generator to apply an input square wave of
±0.5V (1V pp) and 1kHz frequency at the input and observe the
input and output simultaneously on DSO
4. Use the Function Generator to apply an input sinewave of ±0.5V
(1V pp) and observe the output amplitude by varying the input
frequency. Note down the readings at appropriate frequency
intervals and plot the frequency versus gain plot
 64

Observations:

Active Low-Pass Filter:

Vin = 1V p-p

Sr. No. Input Frequency Output voltage Gain in dB

(Hz) Vo(p-p) (Volts) 20log10(Vo/Vin)

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
 65

Active High-Pass Filter:

Vin = 1V p-p

Sr. No. Input Frequency Output voltage Gain in dB

(Hz) Vo(p-p) (Volts) 20log10(Vo/Vin)

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
 66

Active Band-Pass Filter:

Vin = 1V p-p

Sr. No. Input Frequency Output voltage Gain in dB

(Hz) Vo(p-p) (Volts) 20log10(Vo/Vin)

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
 67

Conclusion:

Sr. No. Circuit Parameter Theoretical Value obtained

value(Hz) from graph
(Hz)

1 Active Low- fc 1k
Pass Filter
2 Active High- fc 1k
Pass Filter
3 Active Band- fL 1k
Pass Filter fH 10k
The working of active filters using is studied.
NOTE: In the experiment, slight discrepancies in practical output may
arise due to the use of standard component values instead of those precisely
derived from design equations. This discrepancy occurs because standard
values, while close approximations, may deviate slightly from ideal
theoretical values, influencing experimental results.

Precaution:
1. Double-check component values and connections for accuracy before
powering the active high pass, low pass, or band pass filter circuit.
2. Ensure that the circuit components, including resistors, capacitors, and op-
amps, are operated within their specified voltage and current ratings to prevent
damage.
3. Guard against short circuits by ensuring proper insulation and securely
connecting all components within the filter circuit.
4. Use appropriate current-limiting resistors in the filter setup to protect against
excessive currents, particularly in the op-amp feedback and input circuits.
5. Minimize exposure to static electricity by handling filter components with
care and grounding yourself properly before touching them to prevent damage.
6. Promptly report any malfunctioning equipment to the TA and refrain from
further use until it's inspected and declared safe for operation.
7. Avoid damaging or tampering with the filter equipment or leads, maintaining
the integrity of the circuit configuration.
8. Always use an appropriate wire stripping tool to remove insulation from
wires, avoiding the risk of damage or injury.
9. Shield wires with hands or pliers during wiring to prevent wire fragments
from dispersing, ensuring a clean and safe work environment during filter
experimentation.
 68

Applications:
Low-Pass Filter:
• Audio Bass Control: Filters out high-frequency components,
allowing only bass frequencies to pass in audio systems.
Enhances sound quality and prevents distortion.
• DC Power Supply Filtering: Removes high-frequency noise
and ripple from DC voltage outputs in power supply circuits.
Ensures clean and stable DC power for electronic devices.
High-Pass Filter:
• Tone Control Circuit: Attenuates low-frequency components,
allowing adjustment of treble frequencies in audio signals.
Provides control over tonal characteristics.
• Active Crossover Networks: Passes high-frequency signals to
tweeters and midrange drivers in speaker systems. Optimizes
sound quality and efficiency.
Band-Pass Filter:
• RF Receiver Front-End: Selects specific frequency bands from
received signals in RF receiver circuits. Improves selectivity and
sensitivity, isolating desired radio frequency signals while
rejecting interference.
• Biomedical Signal Processing: Isolates relevant frequency
bands in biomedical signals like ECG and EEG monitoring
systems. Enhances accuracy by filtering out noise and
interference.
 69

Specifications:

Parameter Symbol Conditions Min Typ Max Unit

Supply Voltage VCC ±5 ±15 ±22 V

TA = 25°C, RS ≤ 10
Input Offset Voltage VIO kΩ 1 2 6 mV

Input Offset Current IIO TA = 25°C 20 200 nA

Input Bias Current IIB TA = 25°C 80 500 nA

RL = 2 kΩ,
Large Signal Voltage Gain AV VO = ±10 V 20,000 200,000 V/mV
Common Mode Rejection VO = ±10 V,
Ratio CMRR RS ≤ 10 kΩ 70 90 dB
TA = 25°C, VO = 0
Supply Current ICC V 1 1.7 2.8 mA
RL = 2 kΩ,
Output Voltage Swing VO VCC = ±15 V ±13 ±14 V
RL = 2 kΩ,
Slew Rate SR VO = 2 V step 0.5 0.5 V/μs
Common Mode Input
Voltage VIC ±12 V

Differential Input Voltage VID ±15 V

Input Resistance RI 2 2 MΩ

Output Resistance RO 75 75 Ω
 70

Experiment No: 11 Date:

RC PHASE SHIFT AND

WIEN BRIDGE OSCILLATOR USING OP-AMP

Aim: To design and implement RC phase shift oscillator and wien bridge
oscillator using op-amp.

Objective:
Upon completion of this experiment, we'll have practical expertise in constructing RC
phase shift and Wien bridge oscillators. Through hands-on experience, we'll delve into
their theoretical principles and practical applications in signal processing and
electronics.
Sr. No. Name and Specification Quantity Required
1 Regulated Variable DC Dual-Power Supply 1
[0-32V & 2A]
2 IC 741 1
3 Function Generator 1

4 Dual Channel DSO 1

100MHz
1 1
5 Resistors in Ω [ or W] As per circuit design
4 2
6 Capacitors in F As per circuit design
7 Breadboard 1
8 Connecting Wires As per circuit design
9 Compensating Probes [1:1] 3

Principle:
RC phase-shift oscillator is a linear electronic oscillator circuit that produces a sine
wave output. It consists of an inverting amplifier element such as a transistor or op-
amp with its output fed back to its input through a phase-shift network consisting of
resistors and capacitors in a ladder network. Each of the three RC networks in the
feedback loop can provide a maximum phase shift approaching 90 degrees.
Oscillation occurs at the frequency where the total phase shift through the three RC
network is 180 degrees. Inversion output at the output of op-amp itself produces the
additional 180 degree to meet the requirement for oscillation of 360 degrees (or zero
degree) phase shift around the feedback loop.
The frequency of oscillation is given by
1
𝑓=
2𝜋√6𝑅𝐶
And it should satisfy condition:
𝑅𝑓 ≥ 29𝑅1
And gain should be more than 29
 71

Wien Bridge oscillator: Wien Bridge circuit is connected between amplifier

input and output terminal. The bridge has a series RC network in one arm and a
parallel RC network in an adjoining arm. On the remaining two arms of the
bridge, resistor R1 and R₁ are connected. The phase angle criterion for
oscillators is that the total phase shift around the circuit must be 0 degree. This
condition occurs only when the bridge is balanced i.e. at resonance. The
frequency of oscillation is exactly the resonant frequency of the balanced Wien
bridge and is given by
1
𝑓= = 0.159𝑅𝐶
2𝜋𝑅𝐶
And Rf =2R1

Circuit Diagram:
IC741 Pin Diagram

RC Phase Shift Oscillator:

 72

Wien Bridge Oscillator

Design:
RC Phase Shift Oscillator:
To design RC phase shift oscillator of resonant frequency use below formulae
The frequency of oscillation is given by
1
𝑓=
2𝜋√6𝑅𝐶
And it should satisfy condition:
𝑅𝑓 ≥ 29𝑅1
And gain should be more than 29

Wien Bridge Oscillator:

To design the wien bridge oscillator of resonant frequency use the below
formula
1
𝑓= = 0.159𝑅𝐶
2𝜋𝑅𝐶
𝑅𝑓
But it should satisfy the gain condition that is 1 + = 3
𝑅1
So Rf =2R1

Procedure:
1. Connect the circuit as shown in the diagram.
2. Ensure the op-amp is powered with connections to pin 4 (-15V) and
pin(15V), ensuring it does not exceed 18V.
3. Calculate the output waveform frequency.
4. Compare the theoretical and practical values of the output waveform.
 73

Observations:
RC Phase Shift Oscillator
Theoretical Frequency Practical Frequency

Wien Bridge Oscillator

Theoretical Frequency Practical Frequency

Conclusion:
Circuits of op amp Wein bridge and op amp RC phase shift oscillator are
designed, setup and waveform observed.
Precautions:
1. For Wien Bridge Oscillator:
• The loop gain around the feedback network should be 3 or greater
to sustain oscillations. Adequate positive feedback is essential for
oscillation stability.
2. For RC Phase Shift Oscillator:
• Verify that the overall voltage gain of the amplifier stage combined
with the RC network is 29 or greater to ensure sustained
oscillations in the circuit.
 74

3. Double-check resistor and capacitor values and connections for accuracy

before powering the RC phase shift or Wien bridge oscillator circuit.
4. Ensure that all circuit components, including resistors, capacitors, and op-
amps, operate within their specified voltage and current ratings to avoid
damage during the experiment.
5. Guard against short circuits by securely connecting components and
insulating connections within the oscillator circuit.
6. Include appropriate current-limiting resistors in the setup to protect
against excessive currents, particularly in the op-amp feedback and input
circuits of the oscillator.
7. Handle oscillator components with care to minimize static electricity
discharge, grounding yourself before handling to prevent damage.
8. Promptly report any malfunctioning equipment to the TA before
proceeding with the experiment for safety.
9. Avoid damaging or altering the oscillator equipment or connections,
maintaining the integrity of the experimental setup.
10.Use an appropriate wire stripping tool for insulation removal to prevent
wire or component damage during assembly.
11.Shield wires with hands or pliers during wiring to prevent wire fragments
from dispersing, ensuring a clean and safe work environment during
oscillator experimentation.

Applications:
1. Wien Bridge Oscillator:
• Precision Measurement: Utilized for precise measurement of
capacitance in terms of resistance and frequency, facilitating
accurate component characterization in electronic circuits.
• Audio Frequency Measurement: Historically used to measure
audio frequencies, aiding in the calibration and testing of audio
equipment.
2. RC Phase Shift Oscillator:
• Low-Frequency Signal Generation: Ideal for generating low-
frequency signals required in devices producing radio and audio
frequencies, such as Function Generators and audio oscillators.
• Audio Tone Generation: Employed in audio equipment for
generating stable audio tones used in tone generators and audio
synthesizers.
 75

Specifications:

Parameter Symbol Conditions Min Typ Max Unit

Supply Voltage VCC ±5 ±15 ±22 V

TA = 25°C, RS ≤ 10
Input Offset Voltage VIO kΩ 1 2 6 mV

Input Offset Current IIO TA = 25°C 20 200 nA

Input Bias Current IIB TA = 25°C 80 500 nA

RL = 2 kΩ,
Large Signal Voltage Gain AV VO = ±10 V 20,000 200,000 V/mV
Common Mode Rejection VO = ±10 V,
Ratio CMRR RS ≤ 10 kΩ 70 90 dB
TA = 25°C, VO = 0
Supply Current ICC V 1 1.7 2.8 mA
RL = 2 kΩ,
Output Voltage Swing VO VCC = ±15 V ±13 ±14 V
RL = 2 kΩ,
Slew Rate SR VO = 2 V step 0.5 0.5 V/μs
Common Mode Input
Voltage VIC ±12 V

Differential Input Voltage VID ±15 V

Input Resistance RI 2 2 MΩ

Output Resistance RO 75 75 Ω
 76

Experiment No: 12 Date:

ASTABLE AND MONOSTABLE

MULTIVIBRATOR USING IC 555

Aim: To design and set up symmetrical and asymmetrical astable multivibrators,

as well as a monostable multivibrator using IC 555, and:
(i) Plot the output waveform
(ii) Measure the frequency of oscillation for astable multivibrators and the time
delay for the monostable multivibrator.

Objective:
Upon completion of this experiment, we will be proficient in designing and setting up
both astable and monostable multivibrators using IC 555.

Apparatus Required:

Sr .No. Name and Specification Quantity Required

1 Regulated Variable DC Dual-Power Supply 1
[0-32V & 2A]
2 IC 555 1
3 Function Generator 1

4 Dual Channel DSO 1

100MHz
1 1
5 Resistors in Ω [ or W] As per circuit design
4 2
6 Capacitors in F As per circuit design
7 Breadboard 1
8 Connecting Wires As per circuit design
9 Compensating Probes [1:1] 3

Principle:
The 555 timer is a versatile device for generating accurate time delays and
oscillations. It comprises two comparators, a flip-flop, an output stage, a voltage
divider network, and a transistor. The comparators produce a high output when
the non-inverting input voltage exceeds the inverting input voltage and vice
versa. The voltage divider network sets trigger and threshold voltages at
1/3VCC and 2/3VCC, respectively. The control voltage allows external
adjustment of these thresholds.
 77

Astable Multivibrator:
In the astable mode, the 555 timer functions as a free-running
oscillator with no stable states. Two external resistors (RA and RB)
and a capacitor (C) control the timing. When power is applied, the
capacitor charges through RA and RB until it reaches 2/3VCC,
triggering the output to go high. The capacitor then discharges
through RB and a transistor until it drops below 1/3VCC, causing the
output to go low. This cycle repeats, producing a square wave output.

Symmetrical Astable Multivibrator:

For symmetrical operation, the charging and discharging times of the
capacitor are equal, resulting in a 50% duty cycle. A diode aDSOss
RB ensures the capacitor charges through both RA and the diode and
discharges only through RB, maintaining symmetry in the timing
components.

Asymmetrical Astable Multivibrator:

In the asymmetrical mode, the charging and discharging times of the
capacitor differ, leading to a non-50% duty cycle. Charging occurs
through RA and RB, while discharging happens solely through RB,
creating an asymmetric output waveform.

Monostable Multivibrator:
The monostable mode produces a single pulse output in response to
an external trigger. When triggered, the output goes high, and the
capacitor charges through a resistor (R). Once the capacitor voltage
exceeds 2/3VCC, the output goes low, and the capacitor discharges
rapidly through a transistor. The output remains low until another
trigger pulse is received. The duration of the output pulse is
determined by the time constant T = 1.1 RC.
 78

Circuit Diagram:
Internal Diagram of IC 555
 79

Symmetrical Astable Multivibrator:

Asymmetrical Astable Multivibrator:

 80

Monostable Multivibrator:

Design:
SYMMETRICAL ASTABLE MULTIVIBRATOR:
T = 0.69(RA+RB) C or f = 1.44/(RA+RB) C
Duty cycle D = 0.5 or 50%
D = RA/(RA+RB) = 0.5
So RA = RB
Let T = 1ms ; and C = 0.1 µF
0.693(RA+RB) 0.1 µF = 1ms
RA + RB = 14.49KΩ
or 2 RA = 14.49KΩ
RA = 7.25KΩ = 6.8KΩ(std)
RB = 7.25KΩ = 6.8KΩ(std)

ASYMMETRICAL ASTABLE MULTIVIBRATOR:

T = 0.69 (RA + 2RB) C or f = 1.44 / {( RA+2RB) C}
Here T = t1 + t2
t1 = 0.69(RA+RB) C (charging)
t2 = 0.69(RB)C (discharging)
Let t1= 1ms ; t2= 0.5ms ; C = 0.1 µF
0.69 RB C = 0.5ms
RB = 7.2 KΩ = 6.8KΩ (std)
0.69 (RA+RB) C = 1ms
RA + RB = 14.49 KΩ
RA = 14.49- RB
RA = 7.2 KΩ = 6.8KΩ (std)
 81

MONOSTABLE MULTIVIBRATOR:
Time period
T = 1.1RC
Let T = 1ms ; C = 0.1µF
R = 1 x 10-3 / (1.1 x0.1 x 10-6)
R = 9.09x103Ω = 10KΩ (std)
For triggering circuit
Rd Cd = 0.016t
Let t = 3ms, and Cd = 0.01 µF ; then Rd = 4.7KΩ
NOTE: THE NEGATIVE TRIGGER PULSE HAS TO BE 1/3rd OF VCC.

Procedure:
1) Verify all components required for the symmetric astable multivibrator and
monostable multivibrator circuits.
2) Connect the components according to the schematic diagram for the
symmetric astable multivibrator circuit on the breadboard.
3) Switch on the power supply to provide the necessary voltage to the circuit.
4) Set up the oscilloscope to observe the output waveform and capacitor voltage
simultaneously on different channels.
5) Observe the waveforms displayed on the oscilloscope and draw them on a
graph for visualization.
6) Measure the frequency of oscillation and duty cycle of the output waveform.
7) Repeat steps 2-6 for the asymmetric astable multivibrator circuit, ensuring
correct connections.
8) Configure the components on the breadboard according to the schematic
diagram for the monostable multivibrator circuit.
9) Set the function generator output to square wave mode with an amplitude of
5V and connect it to the trigger input of the monostable multivibrator circuit.
10) Use the oscilloscope to observe the trigger input, output, and capacitor
voltage simultaneously on different channels.
11) Analyse the waveforms displayed on the oscilloscope and draw them on a
graph for visualization.
12) Measure the time delay of the output pulse using the oscilloscope.
 82

Observation:
Sr. No. Circuit Parameter Theoretical Practical
value(Hz) Value (Hz)
1 SYMMETRICAL t1
ASTABLE
MULTIVIBRATOR t2

Duty Cycle

2 ASYMMETRICAL t1
ASTABLE
MULTIVIBRATOR
t2

Duty Cycle

3 MONOSTABLE T
MULTIVIBRATOR

Conclusion:

The astable and monostable multivibrators using IC 555 were meticulously

designed and set up on the breadboard. Their waveforms were keenly observed
using an oscilloscope to analyse their frequency, duty cycle, and time delay
characteristics.

NOTE: In the experiment, slight discrepancies in practical output may arise due to the
use of standard component values instead of those precisely derived from design
equations. This discrepancy occurs because standard values, while close
approximations, may deviate slightly from ideal theoretical values, influencing
experimental results.
Precautions:
 83

1. Double-check component values and connections for accuracy before

powering the IC 555 astable or monostable multivibrator circuit.
2. Ensure that the circuit components, including the IC 555 timer, resistors,
capacitors, and other components, are operated within their specified voltage
and current ratings to prevent damage.
3. Guard against short circuits by ensuring proper insulation and secure
connections throughout the astable or monostable multivibrator circuit.
4. Use appropriate current-limiting resistors to protect the circuit from excessive
currents, especially in the charging and discharging paths of the capacitors.
5. Minimize exposure to static electricity by handling components with care and
grounding yourself properly before touching them to prevent damage to
sensitive IC components.
6. Promptly report any faulty equipment to the TA and refrain from using it
until inspected and declared safe for operation.
7. Avoid damaging or tampering with the IC 555 timer or other circuit
components, ensuring the integrity of the experimental setup.
8. Always use an appropriate wire stripping tool to remove insulation from
wires, preventing damage to the wires or components.
9. Shield wires with hands or pliers during wiring to prevent wire fragments
from scattering, maintaining a clean and safe work environment during the
astable or monostable multivibrator experiment.

Applications of Astable Multivibrator:

1. LED Flasher Circuit:
Creates flashing LED lights for decorative lighting, signage, and visual
signaling.
Frequency and flashing pattern can be adjusted by changing resistor and
capacitor values.
2. Pulse Generator:
Generates precise square wave pulses with adjustable frequency and duty cycle.
Essential for clock signals, triggering events, and driving digital circuits in
digital systems, communication circuits, and test equipment.

Applications of Monostable Multivibrator:

1. Delay Timer Circuit:
Acts as a delay timer triggered by external signals like switches or sensors.
Used in appliances, automotive systems, and industrial control systems for time-
delayed operations and sequencing.
2. Debouncing Circuit:
Removes or reduces switch bounce in mechanical switches or push-buttons.
Ensures reliable operation of digital systems and minimizes errors in signal
processing.
 84

Specifications:

Parameter Symbol Value Unit

Supply Voltage Range VCC 4.5 to 15 V

Supply Current ICC 10 to 15 mA

Threshold Voltage VTH 1/3 * VCC V

Trigger Voltage VTR 1/2 * VCC V

Discharge Voltage VDIS 1.5 V

Output Voltage Low VOL 0.1 V

Output Voltage High VOH VCC - 1.5 V

Output Current IO 200 mA

Timing Capacitance CT 100 to 1000 pF

Timing Resistance RT 3 to 20 kΩ

Frequency Range f 0.1 to 500 kHz

Duty Cycle - 50 to 95 %

Temperature Range TA 0 to 70 °C
Experiment No: 13 Date:
 85

PLL CHARACTERISTICS

Aim: To design and implement a circuit of phase lock loop using IC565.

Objective: The objective of this experiment is to understand the working principle of

a Phase-Locked Loop (PLL) and to observe its behaviour in different configurations.

Apparatus Required:

Sr. No. Name and Specification Quantity Required

1 Regulated Variable DC Dual-Power Supply 1
[0-32V & 2A]
2 IC 565 1
3 Signal Generator 2Vpp,1Mhz (Max) 1

4 Dual Channel DSO 1

100MHz
1 1
5 Resistors in Ω [ or W] As per circuit design
4 2
6 Capacitors in F As per circuit design
7 Breadboard 1
8 Connecting Wires As per circuit design
9 Compensating Probes [1:1] 3
Principle:
A Phase-Locked Loop (PLL) is a control system that synchronizes the phase of an
output signal with that of an input signal. It comprises three main components: a phase
detector (PD), a loop filter (LF), and a voltage-controlled oscillator (VCO).
1. Phase Detector (PD): Compares the phases of the input and VCO output signals,
generating an error signal proportional to their phase difference.
2. Loop Filter (LF): Filters the error signal from the phase detector to eliminate high-
frequency noise, determining the PLL's response time and system bandwidth.
3. Voltage-Controlled Oscillator (VCO): Generates an output signal with a
frequency proportional to its input voltage. The VCO's frequency adjusts based on the
filtered error signal from the loop filter.
Lock range signifies the frequency span within which a Phase-Locked Loop (PLL) can
sustain synchronization with an input signal once initially locked. Determined by
factors like loop filter characteristics and VCO tuning range, a wider lock range
enables effective tracking of frequency variations, enhancing flexibility and stability in
maintaining synchronization. Capture range, on the other hand, defines the frequency
span over which the PLL can initially acquire lock with the input signal. Influenced by
loop dynamics, filter response time, and phase detector sensitivity, a wider capture
range facilitates rapid synchronization acquisition, enabling the PLL to quickly lock
onto various input frequencies
 86

Circuit Diagrams:
PIN DIAGRAM OF IC 565
 87

Design:
1
𝑓𝑜𝑢𝑡 = 𝐻𝑧
2𝜋𝑅𝑡𝐶𝑡

8𝑓𝑜𝑢𝑡
𝑓𝑙 = ± 𝐻𝑧
𝑉

Where 𝑓𝑜𝑢𝑡 = free running frequency of VCO

V=(+V)-(-V)(volts)
1
𝑓𝑙
𝑓𝑐 = ±[(2𝜋)(3.6)(103 ]2
)(𝐶2)

Procedure:

1. Connect the circuit as shown in the figure.

2. Measure the free running frequency of VCO at pin 4 with the input signal
Vin = zero. Compare it with the calculated value = 1.2/4RTCT
3. Now apply the input signal of 1Vpp square wave of 100Hz to pin
2. Connect channel 1 of the CRO to pin 2 and display this signal on the
scope.
4. Gradually increase the input frequency till the PLL is locked to the input
frequency.
 88

5. This frequency fCL gives the lower end of the capture range.
6. Go on increase the input frequency, till PLL stops tracking the input
signal. This frequency fLH gives the upper end of the lock range.
7. If the input frequency is increased further the loop will be in unlocked
condition only.
8. Now gradually decrease the input frequency till the PLL is again get
locked. This is the frequency fCH, the upper end of the capture range.
Keep on decreasing the input frequency until the loop is unlocked. This
frequency fLL gives the lower end of the lock range.
Observation:
Sr. Theoretical value Practical value
No. Design equation Calculation
1 1
𝑓𝑜𝑢𝑡 = 𝐻𝑧
2𝜋𝑅𝑡𝐶𝑡

2 8𝑓𝑜𝑢𝑡
𝑓𝑙 = ± 𝐻𝑧
𝑉

3 1
𝑙𝑓
𝑓𝑐 = ±[(2𝜋)(3.6)(103 ]2
)(𝐶2)

Precautions:
1. Double-check component values and connections meticulously to ensure
accuracy before applying power to the circuit.
2. Operate all circuit components within their specified voltage and current
ratings to prevent damage during PLL operation.
3. Guard against short circuits by securely insulating and connecting all
components in the PLL circuitry.
4. Include appropriate current-limiting resistors to protect against excessive
currents and ensure the stability of the PLL operation.
 89

5. Handle PLL components with care to minimize the risk of static

electricity discharge, grounding yourself before handling to prevent
damage.
6. Promptly report any malfunctioning equipment to the TA for inspection
and refrain from further use until declared safe.
7. Avoid damaging or tampering with PLL equipment or connections,
maintaining the integrity of the experimental setup.
8. Always use an appropriate wire stripping tool to remove insulation from
wires to prevent damage or injury.
9. Shield wires with hands or pliers during wiring to prevent wire fragments
from scattering and maintain a clean work environment.

Applications:

1. FM Demodulation: The PLL can be utilized as a frequency

demodulator in FM (Frequency Modulation) receivers. In this
application, the PLL tracks the instantaneous frequency of the FM
input signal, which can then be used to extract the original modulating
signal.
2. Frequency Synthesis: PLLs are widely used for generating stable and
precise output frequencies from a reference input frequency. In this
application, the PLL locks onto an input frequency and generates an
output frequency that is a multiple or fraction of the input frequency.
 90

Specifications: