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CSA (2nd) May 2020

This document is an examination paper for the BCA (2019 Batch) in Computer System Architecture, consisting of 16 questions divided into two sections. Section-A is compulsory with 10 questions worth 2 marks each, while Section-B contains 6 questions with students required to attempt 4, each worth 10 marks. The paper covers various topics including logic gates, flip flops, and computer architecture concepts.

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6 views2 pages

CSA (2nd) May 2020

This document is an examination paper for the BCA (2019 Batch) in Computer System Architecture, consisting of 16 questions divided into two sections. Section-A is compulsory with 10 questions worth 2 marks each, while Section-B contains 6 questions with students required to attempt 4, each worth 10 marks. The paper covers various topics including logic gates, flip flops, and computer architecture concepts.

Uploaded by

kaurnavjot74685
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
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Roll No. Total No.

of Pages : 02
Total No. of Questions : 16
BCA (2019 Batch) (Sem.–2)
COMPUTER SYSTEM ARCHITECTURE
Subject Code : UGCA-1908
M.Code : 77416
Time : 3 Hrs. Max. Marks : 60

INST RUCT IONS T O CANDIDAT ES :


1. SECTION-A is COMPULSORY cons is ting of TEN questions carrying TWO marks
each.
2. SECTION-B c ontains SIX questions ca rrying TEN mark s each a nd students hav e
to attempt any FOUR questions .

SECTION-A

Write briefly :

o m
1.

2.
Define NAND gate.

r
What is meant by Boolean expression?. c
3. What is SOP form?
p e m
p a c o
4.
r
List two benefits of K-maps.
r .
5. b
What is meant by half adder?

p e
6. Name two uses of multiplexer.

p a
7. Define Flip Flop.
b r
8. What is RISC?

9. What is meant by micro-operation?

10. Comment on Common bus system.

1 | M-77416 (S3)-610
SECTION-B

11. Generate AND, OR and NOT gates using NAND gates.

12. a) Discuss the working of Full Adder Circuit.

b) What is meant by encoder? Explain.

13. What is meant by JK Flip Flop? Explain the race-around condition in detail.

14. Explain the Von Neumann Architecture.

15. a) What are memory reference instructions? Explain.

b) Explain the working of T-Flip Flop.

16 Draw and explain the working of 16 bit common bus system.

o m
r . c
p e m
p a c o
r r .
b p e
p a
b r

NOTE : Disclosure of Identity by writing Mobile No. or Making of passing request on any
page of Answer Sheet will lead to UMC against the Student.

2 | M-77416 (S3)-610

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