Assignment 4-Dr Yasser
Assignment 4-Dr Yasser
Assignment 4
[1] Obtain the simplified Boolean expressions for output F and G in terms of the input
variables in the circuit of the Fig.
[2] Design a combinational circuit with three inputs and one output.
(a) The output is 1 when the binary value of the inputs is less than 3. The output
is 0 otherwise.
(b) The output is 1 when the binary value of the inputs is an even number.
[3] Design a combinational circuit with three inputs, x , y , and z , and three outputs, A,
B, and C . When the binary input is 0, 1, 2, or 3, the binary output is one greater than
the input. When the binary input is 4, 5, 6, or 7, the binary output is two less than the
input.
[4] Design a four-bit combinational circuit 2’s complementer. (The output generates the
2’s complement of the input binary number.)
[5] Design a combinational circuit that generates the 9’s complement of a BCD digit.
[6] Construct a 4-to-16-line decoder with five 2-to-4-line decoders with enable.
[7] Construct a 5-to-32-line decoder with enable by using 3-to-8 and 2-to-4-line decoders
with enables
𝐹(𝑥, 𝑦, 𝑧) = ∑(2, 4, 6, 7)
𝐹1 (𝐴, 𝐵, 𝐶) = ∑(2, 4, 7)
Assignment 4 Page 1 of 2
Kingdom of Saudi Arabia المملكة العربية السعودية
Ministry of Education وزارة التعليم
Taif University جـــامعــة الطـائف
College of Computers & Information Technology كلية الحاسبات وتقنية المعلومات
Digital Logic Design تصميم منطقي رقمي
503220-3 1438 - 1439
𝐹2 (𝐴, 𝐵, 𝐶) = ∑(0, 3)
𝐹3 (𝐴, 𝐵, 𝐶) = ∑(0, 2, 3, 4, 7)
Implement the circuit with a decoder constructed with NAND gates and NAND or
NOR gates connected to the decoder outputs. Use block diagram for the decoder.
Minimize the number of inputs in the external gates.
[11] Construct a 16 x 1 multiplexer with two 8 x 1 and one 2 x 1 multiplexers. Use block
diagrams.
Assignment 4 Page 2 of 2