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Digital Logic Design Model QP

The document contains model question papers for a Digital Logic Design course, divided into two parts: Part-A and Part-B. Part-A consists of 20 questions requiring short answers, while Part-B includes three sub-questions for each of the five main questions, focusing on various topics in digital logic. The questions cover fundamental concepts, applications, and designs related to digital systems, logic gates, flip-flops, ADC/DAC, and memory architecture.

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PRABHU G
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0% found this document useful (0 votes)
13 views4 pages

Digital Logic Design Model QP

The document contains model question papers for a Digital Logic Design course, divided into two parts: Part-A and Part-B. Part-A consists of 20 questions requiring short answers, while Part-B includes three sub-questions for each of the five main questions, focusing on various topics in digital logic. The questions cover fundamental concepts, applications, and designs related to digital systems, logic gates, flip-flops, ADC/DAC, and memory architecture.

Uploaded by

PRABHU G
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as DOCX, PDF, TXT or read online on Scribd
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1

Register No.:

DIGITAL LOGIC DESGN


Model Question Paper - 1
Time - Three hours
(Maximum Marks: 100)

N. (B) 1. Answer any fifteen questions under Part-(A) All questions carry equal marks.(15x2=30)
2. Answer all questions, choosing any two sub-divisions from each question under Part-(B) all
questions carry equal marks. (5x14=70)(7+7)

PART – A
1. What are the levels of digital logic?
2. Convert (10101111)2 to base 16?
3. What is the use of logic gates?
4. What are universal gates? Why?
5. Write any four laws of Boolean algebra?
6. Explain K-map.
7. Define SOP. Give an example?
8. What is the use of parity bit?
9. Define flip-flop? Mention its types.
10. What is Triggering in flip flop?
11. Write any four applications of counter?
12. Give the truth table for Delay flip-flop?
13. Define Digital Sensor? Give some examples.
14. Define ADC and DAC.
15. What is Solenoid?
16. Give the advantages of dual slope ADC?
17. Define access time in memory.
18. Compare RAM and ROM?
19. What are PLDs? Give an example.
20. Define about NvRAM?

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2
PART-B

21. (a) Explain the Hexa decimal number system


(b) Explain about ASCII code.
(c) Explain how NOR gate can be used as universal gate.

22. (a) Simplify the following function using K-map : f=∑(0,2,3,5)


(b) State the De-Morgan’s theorem.
(c) Explain the operations of full subtractor.

23. (a) With logic diagram and truth table explain JK flip flop?
(b) Explain how read and write operation is performed in a SIPO shift register.
(c) Explain the working of decade ripple counter?

24. (a) Explain the operation of successive approximation ADC.


(b) With neat sketch, explain the R-2R ladder DAC.
(c) Explain the interfacing of CMOS IC with solenoid.

25. (a) Explain the PAL architecture with diagram.


(b) Discuss about memory hierarchy.
(c) Explain the operation of pen drive.

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3
Register No.:

DIGITAL LOGIC DESGN


Model Question Paper - 2
Time - Three hours
(Maximum Marks: 100)

N. (B) 1. Answer any fifteen questions under Part-(A) All questions carry equal marks.(15x2=30)
2. Answer all questions, choosing any two sub-divisions from each question under Part-(B) all
questions carry equal marks. (5x14=70)(7+7)

PART – A
1. Give the importance of digital system?
2. Give the 2’s complement of 11010?
3. What is Unicode?
4. Draw the logic diagram of OR gate using NAND gate.
5. What is combinational logic? Give an example.
6. Write any two laws of Boolean algebra.
7. Draw the schematic diagram of 1x4 DEMUX.
8. Write the truth table of full adder.
9. Draw the SR flip-flop circuit.
10. What do you mean by toggling?
11. Write any four applications of counter.
12. List the four modes of shift register.
13. Define LED.
14. Define ADC and DAC.
15. What is Relay?
16. Give the advantages of R-2R DAC.
17. Define word length in memory.
18. Define SD card.
19. Differentiate between fixed logic and programmable logic.
20. Define about NvRAM.

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4
PART-B

21. (a) Convert (1010.01)2 to octal & hexa-decimal number system.


(b) Draw the symbol, truth table and logic equation for EX-OR and NOR gates.
(c) Construct AND, OR and NOT gates using only NOR gates.

22. (a) Simplify the following Boolean equation using K-map : A BC + A BC+ A BC +ABC
(b) Explain the operation of digital comparator.
(c) With neat sketch, explain the priority encoder.

23. (a) Explain the methods used for edge triggering flip flop.
(b) With timing diagram, explain the operation of SISO shift register.
(c) Explain the working of 4 bit synchronous up counter with necessary sketch.

24. (a) Explain the operation of dual slope ADC.


(b) With neat sketch, explain the working of weighted resistor DAC.
(c) Explain the interfacing of TTL IC with motor.

25. (a) Explain the PLA architecture with necessary diagram.


(b) Discuss about solid state hard disk.
(c) Implement the following Boolean expression using PAL, F1= ∑ m (3,5,7) and F2 = ∑ m (4,5,7).

[Turn over…

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