International Journal of Computer Applications (0975 – 8887)

Volume 68– No.16, April 2013

FPGA Implementation of Reed-Solomon Encoder and

Decoder for Wireless Network 802.16
Priyanka Dayal Rajeev Kumar Patial
Post-graduate Student (ECE) Assistant Professor (VLSI Design)
Lovely Professional University Lovely Professional University
Punjab, India. Punjab, India.

ABSTRACT (n,k) = (2m-1,2m-1-2t) (1)

A new class of cyclic codes that is Reed-Solomon codes are Where k is the number of data symbols being encoded, n is
discussed for IEEE 802.16 wireless networks. Reed-Solomon the total number of code symbols in the encoded block, and t
codes are used for the error detection and correction in is the symbol error correcting capability of the code. The n-k
communication systems. This is important in information =2t is the number of parity symbols. A codeword is
theory and coding to correct burst errors. Here Reed-Solomon represented by
code for wireless network 802.16 is synthesized using VHDL
on Xilinx and simulated on ISE simulator. The Reed-Solomon
encoder has been checked for different error-correcting Data symbols (k) Parity symbols (2t)
capabilities that is 4, 6, 8 etc. Reed-Solomon decoder for
IEEE 802.16 network is synthesized on VHDL for error n
detection and correction. Here pipelining is introduced in
Reed-Solomon decoder to improve the performance. The Fig 1: Reed-Solomon Codeword
performance of Reed-Solomon encoder RS (255,239) for For non-binary codes, the distance between two codeword’s is
IEEE 802.16 is shown and Reed-Solomon decoder is checked defined as the number of symbols in which the sequences
for both RS(255,243) and RS(255,239) and synthesizable on differ. For RS codes, the code minimum distance is given by
FPGA.
dmin = n-k+1 (2)
General Terms The number of advantages of RS codes makes that suitable for
Burst error detection and correction, IEEE 802.16 network. IEEE 802.16 wireless network for reliable communication.
The IEEE 802.16 standards have been evolved as a set of air
Keywords interfaces at a 10GHz-66GHz band based on a common MAC
Generator polynomial, Syndrome calculation, Berkelamp-
layer. IEEE std.802.16 specifies the outer code requirement
massey algorithm, Chien search, error-correction, wireless
for code as follows [3]:-
network 802.16, Pipelining, VHDL, and FPGA.
Code generator polynomial:
1. INTRODUCTION
The most commonly used cyclic error correcting codes are the g(x) = (x+μ0) (x+μ1) (x+μ2) ... (x+μ2t-1), where μ= 02hex (3)
BCH (Bose, Ray-Chaudhari, and Hocquenghem) and Reed- Field generator polynomial:
Solomon codes. Reed-Solomon codes are preferred in
communication and storage systems because of correction of p(x) = x8 + x4 + x3 + x2 + 1 (4)
burst and random errors. Error-correction coding attaches
The remaining part of the paper is organized as. Section 2
redundancy, for example, parity-check symbols, to the data at
reviews the proposed Reed-Solomon encoder and Reed-
the system’s error correction encoder and uses that
Solomon decoder. Section 3 presented Implementation and
redundancy to correct erroneous data at the error correction
results. Section 4 gives conclusion of the paper.
decoder [1]. The purpose of error correction coding can be
expressed as increasing the reliability of data communications 2. REED-SOLOMON CODES
or data storage over a noisy channel, controlling errors so the To know the encoding and decoding of the Reed-Solomon
reliable reproduction of data can be obtained, increasing the codes, the knowledge of finite fields known as Galois Fields
overall system’s signal-to-noise energy ratio (SNR), reducing (GF), Primitive polynomial, Generator polynomial, Extension
noise effects within a system. The reed-Solomon error field etc is necessary. For any prime number p there exists a
correction codes were firstly introduced in the paper finite field denoted GF(p), containing p elements. A monic
“Polynomial codes over certain finite fields” in 1960 for burst irreducible polynomial of degree at least one is called a
error correction [2]. These codes are non-binary systematic primitive polynomial [4]. The addition and subtraction within
cyclic linear block codes. These codes work with symbols that the GF(2m) is performed by exclusive-or or modulo-2. The
consist of several bits. The mostly used symbol size for non- multiplication and division is performed by the method of add
binary codes is 8-bits, or a byte. A systematic code generates the symbols exponents modulo 2m-1. Reed-Solomon codes are
codeword that contain the message symbols in unaltered form. used in number of applications like storage devices, digital
The encoder used mathematical function to the message video broadcasting, IEEE 802.16 etc.
symbols in order to generate the redundancy, or parity
symbols. The codeword is formed by appending the parity 2.1 Reed-Solomon Encoder
symbols to the data symbols and is shown in Figure 1. RS Reed-Solomon code is represented by RS (n,k) with m-bit
codes are generally represented as an RS (n,k), with m-bit symbols. Two types of encoders are available systematic and
symbols, non-systematic. Systematic encoder is used for Reed-Solomon

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 International Journal of Computer Applications (0975 – 8887)
Volume 68– No.16, April 2013

encoder in which data remains unaltered. This requires that no error and if the result is non-zero then error will be there.
data symbols must be shifted from power level of (n-1) down The other blocks are used to correct the error if syndrome
to (n-k) and remaining positions from power (n-k-1) to 0 be detects the error. All the algorithms are discussed below:
filled with zeros. RS encoder performs two main operations,
shifting and division. Both operations are implemented by 2.2.1 Syndrome calculation
using linear-feedback shift registers [5]. Let a message or data At the receiver, syndrome is calculated to check the presence
is represented in the polynomial form as: of errors. If the error correction capability of code is 8 then
syndromes will be 16 that is 2t. The syndrome polynomial
M(x) = mk-1 xk-1 + mk-2 xk-2+…………. + m1x + m0 (5) contains the location and magnitude of up to t errors in an
invalid codeword. A valid codeword generates a syndrome
And the codeword is represented in polynomial as: polynomial with all zero coefficients.

C(x) = cn-1 xn-1 + cn-2 xn-2 + …... + c1x + c0 (6) S(x) = ix

(i-1)
, si = R(αi) (11)

And the generator polynomial is shown below: Where R(x)= R0+R1x+R2x2+………..+Rn-1xn-1 is the received
polynomial and Rn-1 is the first received symbol.
g(x) = g0 + g1 X + g2 X2 + …… + g2t - 1 X 2t - 1 + X 2t (7)
2.2.2 Berkelamp-Massey algorithm
And parity-check is given by: The main component of Reed-Solomon decoder is the key
equation solver. This equation involves 2t linearly dependent
CK(x) = xn-kM(x) mod g(x) (8) equations. It generates the key equations [9]:
µ(x) S(x)= Ω(x) mod(x2t) (12)
And codeword is given by:
Where µ(x) is the error locator polynomial and Ω(x) is the
C(x) = xn-kM(x) + CK(x) (9) error evaluator polynomial. The error locator polynomial
contains information about location of bad symbols and error
Here, for encoding Reed-Solomon code (255,239) for IEEE evaluator polynomial contains information about the error
802.16 network the code generator polynomial is used as magnitude of the bad symbols. There are different techniques
given below [6]: for solving key equation are berkelamp algorithm [10] and
Euclidean algorithm [11]. The technique used in this paper is
g(x)=x16+76x15+34x14+67x13+1Fx12+68x11+7Ex10+BBx9+ the berkelamp-massey algorithm because this algorithm
E8x8+11x7+38x6+B7x5+31x4+64x3+51x2+2Cx+4F (10) having less hardware complexity.

There are 2t=n-k parity symbols that are 16 in this case. The 2.2.3 Chien search and error-correction
error-correcting capability for this code is t= (n-k)/2 that is 8 Chien search is used to find the roots of polynomial in reed-
symbols. In digital hardware, it is represented by using linear solomon decoder. Chien search performs the function of
feedback shift register (LFSR) [7]. It is represented in the finding the error locations, and correcting the data, using
figure 2. Forney’s algorithm, when the Chien sum is zero. The
x0 x1 x15 x16 evaluation of the polynomials needed for error correction is
pipelined. Chien search uses all possible input values and then
checks to see if the outputs are zero. In the reed-solomon
decoder, the delay block is the necessary to adjust for the
4f 2c 76 delays in the syndrome block and startup delay in the Chien
search block. The bock diagram for Reed-Solomon decoder is
shown in Figure 3.
CK(x)
R R
Chien
R(x) S(x) µ(x) search C(x)
M(x) Syndrome Key and
calculation equation Ω(x) error
Fig 2: LFSR encoder implementation solver correcti
on
2.2 Reed-Solomon Decoder
Decoding processes are cumbersome, difficult to understand
and to implement in the hardware than encoding process.
Reed-Solomon decoder works in two parts error detection and
correction of that detected errors. The capability of correct Delay
error is depend on the code uses. It is denoted by t and
calculated by the formula t= (n-k)/2 in which n is the length of
codeword and k is the length of source data and n-k is the Fig 3: Reed-Solomon Decoder
parity symbols. The main blocks of reed-Solomon decoder are
the syndrome calculation, Berlekamp-Massey algorithm, and In this paper, Reed-Solomon Decoder is implemented for both
Chien search and error correction [8]. Syndrome means RS(255,243) and RS(255,239) for IEEE 802.16 wireless
symptoms and it detect whether the error is present or not. If network. The code generator polynomials for the both codes
the result of syndrome calculator is zero then it means there is according to IEEE 802.16 network is given as [6]:

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 International Journal of Computer Applications (0975 – 8887)
Volume 68– No.16, April 2013

G(x)=x12+88x11+C1x10+22x9+33x8+83x7+93x6+A7x5+AAx4+ Table 1. Design summary for RS(255,239) encoder for

84x3+AFx2+FCx+78 (13) 802.16 wireless network
G(x)=x16+76x15+34x14+67x13+1Fx12+68x11+7Ex10+BBx9+E8 Logic
x8+11x7+38x6+B7x5+31x4+64x3+51x2+2Cx+4F (14) Used Available Utilization
utilization
For RS(255,243) code, the error-correction capability is 6 and Number of
380 4656 8%
parity or redundant bits are 2t=(255-243)/2 that is 12. This slices
decoder can detect and correct six random errors. For Number of
RS(255.239) code, the error correction capability is 8 and 426 9312 4%
slice flip flop
parity or redundant bits are 2t=(255-239)/2 that is 16. This
decoder can detect and correct 8 symbols. Both codes for Number of 4
719 9312 7%
decoder are implemented on Xilinx 12.4 using VHDL input LUTs
language and simulated on ISE simulator. The complexity for Number of
Reed-Solomon decoder for RS(255,239) increases than 67 232 28%
bonded IOBs
RS(255,243).

3. IMPLEMENTATION 3.2 Decoder Implementation

Reed-Solomon encoder and Reed-Solomon decoder for IEEE
802.16 wireless network is written in VHDL [12],[13] on Reed-Solomon Decoder for RS(255,243) and RS(255,239)
Xilinx 12.4 and simulated in ISE simulator and synthesizable codes for IEEE 802.16 wireless network are implemented in
on Spartan 3e FPGA. Reed-Solomon codes are implemented VHDL on Xilinx 12.4 and synthesized on FPGA device. The
to reduce the hardware complexity and utilization. results are shown in the Figures 6, 7.

3.1 Encoder Implementation

Reed-Solomon encoder for RS(255,239) for IEEE 802.16
wireless network is implemented in VHDL to encode the data
symbols for reliable communication. The register transfer
level (RTL) for this code is shown in figure 4. The RTL view
technology for this is shown in figure 5. The design summary
is shown in Table 1.

Fig 4: RTL schematic symbol for RS(255,239) encoder

Fig 6: RTL schematic for RS(255,243) decoder

Fig 5: RTL view technology for RS(255,239) for IEEE

802.16 wireless network

Fig 7: RTL view technology for RS(255,239) decoder

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 International Journal of Computer Applications (0975 – 8887)
Volume 68– No.16, April 2013

The design summary for both the decoders for IEEE 802.16 field. And also want to thank faculty members for continuous
wireless network is shown in Table 2 and Table 3. It shows support and encouragement.
that RS(255,243) code having less hardware utilization than
RS(255,239) code. The proposed RS decoder RS(255,239) 6. REFERENCES
compares resource utilization with RS decoder given in [8]. [1] National Aeronautics and Space Administration (NASA)
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5. ACKNOWLEDGEMENT Processing on FPGA’S” 2011.
The author would like to thank Lovely Professional
University for providing this opportunity to do work in this

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