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MC Assignment2 2025

LAAAKA

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17 views1 page

MC Assignment2 2025

LAAAKA

Uploaded by

jayadev.nishan
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
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Bapuji Educational Association (Regd.

)
Bapuji Institute of Engineering and Technology, Davangere-577004
Department of Computer Science and Engineering
MICROCONTROLLERS Course BCS402
Course Title
Code

Course Dr. Gangadharappa S, Dr. Naresh Patel K M, Prof. 4th / A, B , C, D


Sem/Sec
Coordinator Rahima B, Prof. Madhu N Hiremath

Assignment II

Date 16/05/2025

Course Outcomes: After studying this course, students will be able to:
1 Explain the ARM Architectural features and Instructions.

2 Develop programs using ARM instruction set for an ARM Microcontroller.

3 Explain C-Compiler Optimizations and portability issues in ARM Microcontroller.


Apply the concepts of Exceptions and Interrupt handling mechanisms in developing applications.
4
5 Demonstrate the role of Cache management and Firmware in Microcontrollers.

Q.
QUESTIONS RBL Cos
NO.

Brief out (i) Portability issues in ARM.


1. (ii)Exception Priorities with suitable table. L2 CO4

2. With suitable codes, explain the enabling and disabling IRQ and FIQ exceptions. L2 CO4

3. What happens when an IRQ and FIQ exceptions are raised when processor is in user mode. Discuss L2 CO4
with neat diagram.

4. What is firmware and Bootloader? Discuss the stages involved in Firmware Execution flow. L2 CO4
5. a. Utilize the Sandstone directory structure to locate specific files needed for a given task. L2 CO4
b. Explain the Sandstone execution flow.

6. a. With a suitable diagram, explain the memory hierarchy and cache memory. L2 CO5
b. Briefly explain the basic Cache architecture.
7. List and discuss the operations of cache policies. L2 CO5
8. With a neat block diagram, explain Associativity cache. L2 CO5
9. Write a short note on (i) Redhat redboot (ii) ARM firmware suite L2 CO5
(iii) Measuring cache efficiency
RBT (Revised Bloom’s Taxonomy) Levels :
L1 L2 L3 L4 L5 L6
Remembering Understanding Applying Analysing Evaluating Creating

Course Instructor Course coordinators DAAC Program Co-ordinator

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