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Unit4 EE3404 MPMC-2

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26 views212 pages

Unit4 EE3404 MPMC-2

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lpackiasamy
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© © All Rights Reserved
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EE3404 (MP&MC)

[Regulation-2021]

Microprocessor & Microcontroller


(Second Year, 4th Semester EEE)

Unit 4
Introduction to 8051
Microcontroller
MP&MC/EE3404 Lecture Notes
by
Dr.I.William Christopher
Professor/EEE Dept./LICET
3/30/2025 EE3404/MPMC/Unit-4 1
Course Objectives
▪ To study the addressing modes & instruction set of 8085
& 8051

▪ To develop skills in simple program writing in assembly


languages

▪ To introduce commonly used peripheral/interfacing ICs.

▪ To study and understand typical applications of micro-


processors.

▪ To study and understand the typical applications of


micro-controllers
3/30/2025 EE3404/MPMC/Unit-4 2
Course Outcomes
Upon successful completion of the course, the students should have
the:
C01 Ability to write assembly language program for microprocessor
and microcontroller
C02 Ability to design and implement interfacing of peripheral with
microprocessor and microcontroller
C03 Ability to analyze, comprehend, design and simulate
microprocessor based systems used for control and monitoring.
C04 Ability to analyze, comprehend, design and simulate
microcontroller based systems used for control and monitoring.
C05 Ability to understand and appreciate advanced architecture
evolving microprocessor field

3/30/2025 EE3404/MPMC/Unit-4 3
Units of Microprocessor & Microcontroller
The Course deals with the following Units:
Unit –I : Introduction to 8085 Architecture

Unit –II : 8085 Instruction Set and Programming

Unit –III : Interfacing Basics and ICs

Unit –IV : Introduction to 8051 Microcontroller

Unit –V : Introduction to RISC Based Architecture

3/30/2025 EE3404/MPMC/Unit-4 4
Text and Reference Books
Textbooks:
1) Ramesh S. Gaonkar, ‘Microprocessor Architecture Programming and
Application’, Pen ram International (P)ltd., Mumbai, 6th Education, 2013.
2) Muhammad Ali Mazidi & Janice Gilli Mazidi, ‘The 8051 Micro Controller
and Embedded Systems’, Pearson Education, Second Edition 2011.
3) Muhammad Ali Mazidi & Janice Gilli Mazidi, ‘The PIC Micro Controller
and Embedded Systems’, 2010
Reference Books:
1) Douglas V. Hall, “Micro-processors & Interfacing”, Tata McGraw Hill 3rd
Edition, 2017.
2) Krishna Kant, “Micro-processors & Micro-controllers”, Prentice Hall of
India, 2007.
3) Mike Predko, “8051 Micro-controllers”, McGraw Hill, 2009
4) Kenneth Ayala, ‘The 8051 Microcontroller’, Thomson, 3rd Edition 2004.
3/30/2025 EE3404/MPMC/Unit-4 5
Unit-I: Introduction to 8085 Architecture

Topics to be discussed:
▪ Functional Block Diagram

▪ Memory Interfacing

▪ I/O Ports and Data Transfer Concepts

▪ Timing Diagram

▪ Interrupt Structure

3/30/2025 EE3404/MPMC/Unit-4 6
Unit-II: 8085 Instruction Set and Programming
Topics to be discussed:
▪ Instruction Format and Addressing Modes
▪ Assembly Language Format
▪ Data Transfer, Data Manipulation &
Control Instructions
▪ Programming:
✓Loop structure with Counting & Indexing
✓Look up table
✓Subroutine instructions
✓Stack
3/30/2025 EE3404/MPMC/Unit-4 7
Unit-III: Interfacing Basics and ICs
Topics to be discussed:
▪ Study of Architecture and programming of ICs:
✓ 8255 - PPI
✓ 8259 - PIC
✓ 8251 - USART
✓ 8279 - Keyboard display controller
✓ 8254 - Timer/Counter
▪ Interfacing with 8085
✓A/D and D/A converter interfacing
3/30/2025 EE3404/MPMC/Unit-4 8
Unit-IV: Introduction to 8051 Microcontroller
Topics to be discussed:
▪ Functional Block Diagram
▪ Instruction Format And Addressing Modes
▪ Interrupt Structure
▪ Timer
▪ I/O Ports
▪ Serial Communication
▪ Simple Programming
▪ Keyboard And Display Interface
▪ Temperature Control System
▪ Stepper Motor Control
▪ Usage of IDE for Assembly Language Programming
3/30/2025 EE3404/MPMC/Unit-4 9
Unit-V: Introduction to RISC Based Architecture
Topics to be discussed:
▪ PIC16 /18 Architecture
▪ Memory Organization
▪ Addressing Modes
▪ Instruction Set
▪ Programming Techniques
▪ Timers
▪ I/O Ports
▪ Interrupt Programming
3/30/2025 EE3404/MPMC/Unit-4 10
Introduction
➢ Microprocessor – silicon chip which includes ALU,
register circuits & control circuits.

➢ Microcontroller – silicon chip which includes


microprocessor, memory & I/O in a single package.

➢ Microcomputer – a computer with a


microprocessor as its CPU. Includes memory, I/O
etc.

3/30/2025 EE3404/MPMC/Unit-4 11
Introduction to Microcontrollers
• Microcontroller – silicon chip which includes microprocessor,
memory & I/O ports in a single package.
• A Microcontroller has a CPU (Microprocessor) in addition to a
fixed amount of RAM,ROM, I/O ports and a timer all on a
single chip.
• 8051/8031 is a 8- bit Microcontroller.
• It has,
✓ [CPU + I/O ports + Timer’s] + [+ ROM] [+ RAM]
✓ Low to moderate performance only
✓ Limited RAM space, ROM space, and I/O pins
✓ EPROM version available
✓ Low chip-count to implement a small system
✓ Low-cost at large quantities
✓ Development tools readily available at reasonable
3/30/2025 EE3404/MPMC/Unit-4 12
Features of 8051/8031 Microcontroller
• ROM – 4K bytes
• RAM – 128 bytes
• Timers – ‘2’ (Timer 0, Timer 1)
• I/O Pins – ‘32’ [4 ports: Port 0 (AD0-AD7); Port 1;
Port 2 (A8-A15); Port 3 (Important Alternate Functions);
Each Port has 8 I/O pins]
• Serial Port – ‘1’ (UART : TxD (Transmit Data);
RxD (Receive Data);)
• Interrupt Sources – ‘6’ ( IE0; IE1; TF0; TF1; RI+TI )
• 8031 is called “ROM-less 8051”
• 8052 has all features of 8051 in addition to an extra 128 bytes
of RAM, extra Timer and extra 2 Interrupt Sources.
3/30/2025 EE3404/MPMC/Unit-4 13
Pin out of 8051 Microcontroller

3/30/2025 EE3404/MPMC/Unit-4 14
Pin out of
8051
Microcontroller

3/30/2025 EE3404/MPMC/Unit-4 15
Pin Descriptions of 8051

3/30/2025 EE3404/MPMC/Unit-4 16
Alternate functions of Port pins of 8051

3/30/2025 EE3404/MPMC/Unit-4 17
Functional block diagram of 8051/8031

3/30/2025 EE3404/MPMC/Unit-4 18
Architecture of 8051 Micro controller

3/30/2025 EE3404/MPMC/Unit-4 19
8051 Registers

3/30/2025 EE3404/MPMC/Unit-4 20
Register Banks of 8051 Microcontroller
▪ Four banks of 8 byte-sized registers, Each Bank has 8
Registers R0 to R7
▪ Addresses are :
18H - 1FH for bank 3
10H – 17H for bank 2
08H - 0FH for bank 1
00H - 07H for bank 0 (default)
▪ Active bank selected by bits [ RS1, RS0 ] in PSW (Program
Status Word).
▪ Permits fast “context switching” in Interrupt Service Routines
(ISR).
3/30/2025 EE3404/MPMC/Unit-4 21
Program Status Word (PSW) of 8051

3/30/2025 EE3404/MPMC/Unit-4 22
Register Bank of 8051

3/30/2025 EE3404/MPMC/Unit-4 23
16-bit Registers of 8051
Stack Pointer (8-bit)
D7 D0

Program Counter (16-bit)


D15 D0

DPTR (Data Pointer: 16-bit)

DPH DPL
D15 D8 D7 D0

3/30/2025 EE3404/MPMC/Unit-4 24
16-bit CPU Registers of 8051
Stack Pointer :
✓ It is 8 bit wide.
✓ It is incremented before data is stored during PUSH and CALL
instructions.
✓ The stack array can reside anywhere in on-chip RAM.
✓ The stack pointer is initialized to 07H after a reset.
✓ This causes the stack to begin at location 08H.
Data Pointer (DPTR) :
✓ It consists of a high byte (DPH) and a low byte (DPL).
✓ Its function is to hold a 16-bit address.
✓ It may be manipulated as a 16-bit data register or as two
independent 8-bit registers.
✓ It serves as a base register in indirect jumps, lookup table
instructions, and external data transfer.
3/30/2025 EE3404/MPMC/Unit-4 25
Von Neumann & Harvard Architectures

3/30/2025 EE3404/MPMC/Unit-4 26
Memory Organization of 8051 (1)

PolyU 11
3/30/2025 EE3404/MPMC/Unit-4 27
Memory Organization of 8051 (2)
On-chip and Off-chip Program Code Access

3/30/2025 EE3404/MPMC/Unit-4 28
Memory Organization of 8051 (3)
Program Memory (Read Only) Structure

3/30/2025 EE3404/MPMC/Unit-4 29
Memory Organization of 8051 (4)
Accessing External Program Memory

3/30/2025 EE3404/MPMC/Unit-4 30
Memory Organization of 8051 (5)
Data Memory (Read/Write) Structure
✓ The 8051 can address up to 64 Kbytes of external data
memory.

✓ The “MOVX” instruction is used to access the external


data memory.

✓ The internal data memory space for Intel 8051


Architecture and 8031 Architecture is divided into three
blocks :
1. Lower 128 bytes,
2. Upper 128 bytes and
3. Special Function Registers (SFRs).
3/30/2025 EE3404/MPMC/Unit-4 31
Memory Organization of 8051 (6)
Data Memory (Read/Write) Structure

3/30/2025 EE3404/MPMC/Unit-4 32
Memory Organization of 8051 (7)
Accessing External Data Memory

3/30/2025 EE3404/MPMC/Unit-4 33
Memory Organization of 8051 (8)
Internal Data Memory

3/30/2025 EE3404/MPMC/Unit-4 34
Memory Organization of 8051 (9)
128 bytes of RAM Direct and Indirect Addressable

3/30/2025 EE3404/MPMC/Unit-4 35
Memory Organization of 8051 (10)
Four Banks of Registers R0 – R7

3/30/2025 EE3404/MPMC/Unit-4 36
Special Function Registers (SFRs)-1
✓ Unlike other microprocessors in the Intel family, 8051 uses
memory-mapped I/O through a set of special function
registers that are implemented in the address space
immediately above the 128 bytes of RAM.

✓ All access to the


1. Four I/O ports,
2. CPU registers,
3. Interrupt-control registers,
4. Timer/counter,
5. UART, and
6. Power control registers
are performed through registers between 80H and FFH.

3/30/2025 EE3404/MPMC/Unit-4 37
Special Function Registers (SFRs)-2

3/30/2025 EE3404/MPMC/Unit-4 38
Special Function Registers (SFRs)-3

3/30/2025 EE3404/MPMC/Unit-4 39
I/O Ports of 8051 (1)
✓ It has 4 bidirectional 8-bit I/O ports.
✓ Each port is connected to an 8-bit register in the SFR.
✓ P0 = 80H, P1 = 90H, P2 = A0H, P3 = B0H
✓ Each port is also connected to an output driver and an
input buffer.
✓ All ports are configured for output at reset.
✓ In addition to simple I/O, Ports P0 and P2 double as the
8051’s Address and Data busses.
✓ Port P3 doubles as the 8051’s external control lines for the
timers and counters.
3/30/2025 EE3404/MPMC/Unit-4 40
I/O Ports of 8051 (2)
Pull-up Resistor Pull-down Resistor

3/30/2025 EE3404/MPMC/Unit-4 41
I/O Ports of 8051 (3)
Port-0 (1)
✓ P0 can be used for input or output.

✓ The pins of P0 are connected internally to an “open drain”


circuit

✓ Therefore, it must be connected to an external pull-up


resistor (10 KΩ ) to operate properly as an output port.

✓ To operate P0 as an input port, it must be programmed by


writing 1’s to all of its bits

✓ P0 is also designated as AD0 – AD7, multiplexed lower 8 bits of the


address bus and the 8 bits of the data bus.

3/30/2025 EE3404/MPMC/Unit-4 42
I/O Ports of 8051 (4)
Port-0 (2)

3/30/2025 EE3404/MPMC/Unit-4 43
I/O Ports of 8051 (5)
Port-0 (3)

3/30/2025 EE3404/MPMC/Unit-4 44
I/O Ports of 8051 (6)
Port-1 (1)
✓ Port 1 occupies a total of 8 pins (pins 1 through 8).

✓ It can be used as input or output.

✓ In contrast to port 0, but port 1 does not need any pull-up


resistors since it already has pull-up resistors internally.

✓ Upon reset, Port 1 is configured as an output port.

✓ To make port P1 an input port, it must programmed by writing 1


to all its bits.

3/30/2025 EE3404/MPMC/Unit-4 45
I/O Ports of 8051 (7)
Port-1 (2)

3/30/2025 EE3404/MPMC/Unit-4 46
I/O Ports of 8051 (8)
Port-2 (1)
✓ Port 2 occupies a total of 8 pins (pins 21- 28).
✓ It can be used as input or output.
✓ Just like P1, P2 does not need any pull-up resistors since it
already has pull-up resistors internally.
✓ Upon reset, Port 2 is configured as an output port.
✓ To make port 2 an input, it must programmed by writing 1
to all its bits.
✓ P0 provides the lower 8 bits via A0-A7, it is the job of P2 to
provide bits A8-A15 of the address (dual function)

3/30/2025 EE3404/MPMC/Unit-4 47
I/O Ports of 8051 (9)
Port-2 (2)
✓ Since an 8051 is capable of accessing 64K bytes of external
memory, it needs a path for the 16 bits of the address.

3/30/2025 EE3404/MPMC/Unit-4 48
I/O Ports of 8051 (10)
Port-3 (1)
✓ Port 3 occupies a total of 8 pins, pins 10 through 17.

✓ It can be used as input or output.

✓ P3 does not need any pull-up resistors, the same as P1 and


P2 did not.

✓ Although port 3 is configured as an output port upon reset.

✓ Port 3 has the additional function of providing some


extremely important signals such as interrupts.

3/30/2025 EE3404/MPMC/Unit-4 49
I/O Ports of 8051 (11)
Port-3 (2)

3/30/2025 EE3404/MPMC/Unit-4 50
I/O Ports of 8051 (12)
Port-3 Alternate Functions (3)

3/30/2025 EE3404/MPMC/Unit-4 51
I/O Ports of 8051 (13)
Instructions for reading the status of an input port

3/30/2025 EE3404/MPMC/Unit-4 52
I/O Ports of 8051 (14)
Instructions for Reading a Latch (Read–Modify–Write)

3/30/2025 EE3404/MPMC/Unit-4 53
Timers of 8051 (1)
✓ 8051 has two 16-bit programmable UP timers/counters.
✓ They can be configured to operate either as timers or as event
counters.
✓ The names of the two timers are T0 and T1 respectively.
✓ The timer content is available in four 8-bit special function
registers, viz, TL0,TH0,TL1 and TH1 respectively.

3/30/2025 EE3404/MPMC/Unit-4 54
Timers of 8051 (2)
Clock (1)
✓ Every Timer needs a clock to work, and 8051 provides it from
an external crystal which is the main clock source for Timer.
✓ The internal circuitry in the 8051 microcontrollers provides a
clock source to the timers which is 1/12th of the frequency of
crystal attached to the microcontroller, also called as
Machine cycle frequency.

3/30/2025 EE3404/MPMC/Unit-4 55
Timers of 8051 (3)
Clock (2)

For Example, suppose we have crystal frequency of 11.0592


MHz then microcontroller will provide 1/12th i.e.
Timer clock frequency
= (Crystal Oscillator frequency)/12
= (11.0592 MHz)/12
= 921.6 KHz
Period T = 1/(921.6 KHz)=1.085 μS

3/30/2025 EE3404/MPMC/Unit-4 56
Timers of 8051 (4)
Timer/Counter-0

3/30/2025 EE3404/MPMC/Unit-4 57
Timers of 8051 (5)
Timer/Counter-1

3/30/2025 EE3404/MPMC/Unit-4 58
Timers of 8051 (6)
Timer/Counter-SFRs
✓ In the “Timer" function mode, the counter is incremented in
every machine cycle. Thus, one can think of it as counting
machine cycles. Hence the clock rate is 1/12 th of the oscillator
frequency.
✓ In the "Counter" function mode, the register is incremented in
response to a 1 to 0 transition at its corresponding external input
pin (T0 or T1).
✓ It requires 2 machine cycles to detect a high-to-low transition.
Hence maximum count rate is 1/24 th of the oscillator frequency.
✓ The operation of the timers/counters is controlled by two special
function registers (SFRs), TMOD and TCON respectively.
3/30/2025 EE3404/MPMC/Unit-4 59
TMOD (Timer Mode) Register of 8051 (1)

3/30/2025 EE3404/MPMC/Unit-4 60
TMOD (Timer Mode) Register of 8051 (2)
Bit 5:4 & 1:0 - M1:M0: Timer/Counter mode select bit
These are Timer/Counter mode select bit as per below table
M1 M0 Mode Operation
13-bit timer/counter,
0 0 Mode-0
8-bit of THx & 5-bit of TLx
16-bit timer/counter,
0 1 Mode-1
THx cascaded with TLx
8-bit timer/counter (auto reload mode),
1 0 Mode-2 TLx reload with value held by THx each time
TLx overflow

Split 16-bit timers into two 8-bit timer i.e.


1 1 Mode-3
THx and TLx like two 8-bit timer
3/30/2025 EE3404/MPMC/Unit-4 61
TMOD (Timer Mode) Register of 8051 (3)
Mode-0 (13-bit timer mode)
✓ Mode 0 is 13-bit timer mode for which 8-bit of THx and 5-bit of TLx
(as Pre-scaler) are used.
✓ It is mostly used for interfacing possible with old MCS-48 family
microcontrollers.
✓ Higher 3-bits of TLx should be written as zero while using timer
mode0, or it will affect the result.

3/30/2025 EE3404/MPMC/Unit-4 62
TMOD (Timer Mode) Register of 8051 (4)
Mode-0 (13-bit timer mode)

✓ The input pulse is obtained from the previous stage.


✓ If TR1/0 bit is 1 and Gate bit is 0, the counter continues counting
up.
✓ If TR1/0 bit is 1 and Gate bit is 1, then the operation of the
counter is controlled by input.
✓ This mode is useful to measure the width of a given pulse fed
to input.
3/30/2025 EE3404/MPMC/Unit-4 63
TMOD (Timer Mode) Register of 8051 (5)
Mode-1 (16-bit timer mode)
Mode 1 is 16-bit timer mode used to generate a delay, it uses 8-bit of
THx and 8-bit of TLx to form a total 16-bit register.

3/30/2025 EE3404/MPMC/Unit-4 64
TMOD (Timer Mode) Register of 8051 (5)
Mode-1 (16-bit timer mode)

This mode is similar to mode-0 except for the fact that the Timer
operates in 16-bit mode.

3/30/2025 EE3404/MPMC/Unit-4 65
TMOD (Timer Mode) Register of 8051 (6)
Mode-2 (8-bit auto-reload timer mode)
✓ Mode 2 is 8-bit auto-reload timer mode.
✓ In this mode we have to load the THx-8 bit value only.
✓ when the Timer gets started, THx value gets automatically loaded
into the TLx and TLx start counting from that value.
✓ After the value of TLx overflows from the 0xFF to 0x0, the TFx flag
gets set and again value from the THx gets automatically loaded
into the TLx register. That’s why this is called as auto reload mode.

3/30/2025 EE3404/MPMC/Unit-4 66
TMOD (Timer Mode) Register of 8051 (7)

Mode-2 (8-bit auto-reload timer mode)


✓ This is a 8-bit counter/timer operation.

✓ Counting is performed in TLX while THX stores a constant value.

✓ In this mode when the timer overflows i.e. TLX becomes FFH, it is
fed with the value stored in THX.

✓ For example if we load THX with 50H then the timer in mode 2
will count from 50H to FFH. After that 50H is again reloaded. This
mode is useful in applications like fixed-time sampling.

3/30/2025 EE3404/MPMC/Unit-4 67
TMOD (Timer Mode) Register of 8051 (8)
Mode-3 (Split timer mode)
✓ Timer 1 in mode-3 simply holds its count.
✓ The effect is same as setting TR1=0. Timer0 in mode-3 establishes
TL0 and TH0 as two separate counters.
✓ Control bits TR1 and TF1 are used by Timer-0 (higher 8 bits) (TH0)
in Mode-3 while TR0 and TF0 are available to Timer-0 lower 8
bits(TL0).

3/30/2025 EE3404/MPMC/Unit-4 68
TCON (Timer Control) Register of 8051 (1)
It is 8-bit control register and contains timer and interrupt flags.

Bit 7 - TF1: Timer1 Overflow Flag


1 = Timer1 overflow occurred (i.e. Timer1 goes to its max and
roll over back to zero).
0 = Timer1 overflow not occurred.
It is cleared through software. In Timer1 overflow interrupt service
routine, this bit will get cleared automatically while exiting from ISR.
Bit 6 - TR1: Timer1 Run Control Bit
1 = Timer1 start.
0 = Timer1 stop.
It is set and cleared by software.
3/30/2025 EE3404/MPMC/Unit-4 69
TCON (Timer Control) Register of 8051 (2)
Bit 5 – TF0: Timer0 Overflow Flag
1 = Timer0 overflow occurred (i.e. Timer0 goes to its max and
roll over back to zero).
0 = Timer0 overflow not occurred.
It is cleared through software. In Timer0 overflow interrupt service
routine, this bit will get cleared automatically while exiting from ISR.
Bit 4 – TR0: Timer0 Run Control Bit
1 = Timer0 start.
0 = Timer0 stop.
It is set and cleared by software.
Bit 3 - IE1: External Interrupt1 Edge Flag
1 = External interrupt1 occurred.
0 = External interrupt1 Processed.
It3/30/2025
is set and cleared by hardware.
EE3404/MPMC/Unit-4 70
TCON (Timer Control) Register of 8051 (3)
Bit 2 - IT1: External Interrupt1 Trigger Type Select Bit
1 = Interrupt occur on falling edge at INT1 pin.
0 = Interrupt occur on low level at INT1 pin.

Bit 1 – IE0: External Interrupt0 Edge Flag


1 = External interrupt0 occurred.
0 = External interrupt0 Processed.
It is set and cleared by hardware.

Bit 0 – IT0: External Interrupt0 Trigger Type Select Bit


1 = Interrupt occur on falling edge at INT0 pin.
0 = Interrupt occur on low level at INT0 pin.
3/30/2025 EE3404/MPMC/Unit-4 71
Timer interrupt in 8051
✓ It has two timer interrupts assigned with different vector address.
✓ When Timer count rolls over from its max value to 0, it sets timer
flag TFx. This will interrupt the 8051 microcontroller to serve ISR
(interrupt service routine) if global and timer interrupt is enabled.
✓ Timer overflow interrupt assigned with vector address shown in the
table.
✓ 8051 microcontroller jumps directly to the vector address on the
occurrence of a corresponding interrupt.
Interrupt source Vector address
Timer 0 overflow (TF0) 000BH
Timer 1 overflow (TF1) 001BH

3/30/2025 EE3404/MPMC/Unit-4 72
Interrupts of 8051
✓ Interrupts are basically the events that temporarily
suspend the main program, pass the control to the
external sources and execute their task.
✓ It then passes the control to the main program where it
had left off.
✓ 8051 has five interrupts.
✓ All of the interrupts can be enabled or disabled by using
the IE (Interrupt Enable) register.
✓ The Interrupts priority level can be decided by using the
IP (Interrupt Priority) register
3/30/2025 EE3404/MPMC/Unit-4 73
Interrupts of 8051
✓ Interrupts and their vector addresses are given below

Interrupt Address
INT0 0003H
INT1 000BH
T0 0013H
T1 001BH
TI/RI 0023H

3/30/2025 EE3404/MPMC/Unit-4 74
Interrupt Structure of 8051

3/30/2025 EE3404/MPMC/Unit-4 75
Interrupt Structure of 8051

3/30/2025 EE3404/MPMC/Unit-4 76
IE (Interrupt Enable) Register
▪ This register can be used to enable or disable interrupts
programmatically.
▪ This register is an SFR and the address is A8H.

3/30/2025 EE3404/MPMC/Unit-4 77
IP (Interrupt Priority) Register
▪ This IP register can be used to store the priority levels for
each interrupt.
▪ This is also a bit addressable SFR. Its address is B8H.

3/30/2025 EE3404/MPMC/Unit-4 78
Serial vs Parallel Communication (1)

3/30/2025 EE3404/MPMC/Unit-4 79
Serial vs Parallel Communication (2)

3/30/2025 EE3404/MPMC/Unit-4 80
Basics of Serial Communication (1)
Various Modes

3/30/2025 EE3404/MPMC/Unit-4 81
Basics of Serial Communication (2)
Comparison b/w Asynchronous and Synchronous Communication
Asynchronous serial communication Synchronous serial communication
transmitter and receiver are not transmitter and receiver are
synchronized by clock. synchronized by clock.
Character may arrive at any rate at Character is received at constant
receiver rate.
Data transfer is character oriented Data transfer takes place in blocks.
Start and stop bits are not required
Start and stop bits are required to to establish communication of each
establish communication of each character, however ,synchronization
character. bits are required to transfer the data
block.
Used in low-speed transmissions Used in high-speed transmission

3/30/2025 EE3404/MPMC/Unit-4 82
Basics of Serial Communication (3)
Data Transfer Rate (1)
✓ The rate of data transfer in serial data communication is stated in
bps (bits per second).
✓ Another widely used terminology for bps is baud rate.
✓ However, the baud and bps rates are not necessarily equal.
✓ This is due to the fact that baud rate is the modem terminology
and is defined as the number of signal changes per second.
✓ In modems a single change of signal sometimes transfers several
bits of data.
✓ As far as the conductor wire is concerned, the baud rate and bps
are the same
3/30/2025 EE3404/MPMC/Unit-4 83
Basics of Serial Communication (4)
Data Transfer Rate (2)
✓ The data transfer rate of a given computer system depends on
communication ports incorporated into that system.

✓ For example, the early IBM PC/ XT could transfer data at the
rate of 100 to 9600 bps.

✓ In recent years, however, Pentium-based PCs transfer data at


rates as high as 56K bps.

✓ It must be noted that in asynchronous serial data


communication, the baud rate is generally limited to
100,000 bps

3/30/2025 EE3404/MPMC/Unit-4 84
RS 232 Standards (1)
✓ To allow compatibility among data communication equipment
made by various manufacturers, an interfacing standard called
RS232 was set by the Electronics Industries Association (EIA) in
1960.

✓ In 1963, it was modified and called RS232A. RS232B and RS232C


were issued in 1965 and 1969, respectively.

✓ Here, we refer to it simply as RS232.

✓ Today, RS232 is the most widely used serial I/O interfacing


standard.

✓ This standard is used in PCs and numerous types of equipment.

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RS 232 Standards (2)
✓ However, since the standard was set long before the advent of
the TTL logic family, its input and output voltage levels are not
TTL-compatible.

✓ In RS232, a 1 is represented by −3 to −25 V, while a 0 bit is +3 to


+25 V, making −3 to +3 undefined.

✓ For this reason, to connect any RS232 to a microcontroller system


we must use voltage converters such as MAX232 to convert the
TTL logic levels to the RS232 voltage levels, and vice versa.

✓ MAX232 IC chips are commonly referred to as line drivers.

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RS 232 Standards (3)
RS232 Pins
✓ The original RS232 cable, commonly referred to as the DB-25
connector (Serial I/O Standard)

✓ In labeling, DB-25P refers to the Plug Connector

✓ DB-25S is for the Socket Connector

✓ Since not all the pins are used in PC cables, IBM introduced
the DB-9 version of the serial I/O standard, which uses 9 pins
only

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RS 232 Standards (4)
RS232 Pins (DB-25)

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RS 232 Standards (5)
IBM PC DB-9 Signals

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RS 232 Standards (6)
Data Communication Classification (1)
✓ Current terminology classifies data communication equipment as
▪ DTE (Data Terminal Equipment)
▪ DCE (Data Communication Equipment)
✓ DTE refers to terminals and computers that send and receive
data,

✓ DCE refers to communication equipment, such as modems, that


are responsible for transferring the data.

✓ The simplest connection between a PC and microcontroller


requires a minimum of three pins, TxD, RxD, and ground, as
shown in the following Figure
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RS 232 Standards (7)
Data Communication Classification (2)

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8051 Connection to RS232 (1)
✓ RS232 standard is not TTL-compatible; therefore, it requires a
line driver such as the MAX232 chip to convert RS232 voltage
levels to TTL levels, and vice versa.

✓ Interfacing of 8051 with RS232 connectors via the MAX232 chip

✓ 8051 has two pins that are used specifically for transferring and
receiving data serially.

✓ These two pins are called TxD and RxD and are part of the port 3
group (P3.0 and P3.1). Pin 11 of the 8051 (P3.1) is assigned to
TxD and pin 10 (P3.0) is designated as RxD.

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8051 Connection to RS232 (2)
✓ These pins are TTL-compatible; Therefore, they require a line
driver to make them RS232 compatible.

✓ One such line driver is the MAX232 chip.

✓ Since the RS232 is not compatible with today’s microprocessors


and microcontrollers, we need a Line Driver (Voltage Converter)
to convert the RS232’s signals to TTL voltage levels that will be
acceptable to the 8051’s TxD and RxD pins.

✓ The MAX232 has two sets of line drivers for transferring and
receiving data.

✓ The line drivers used for TxD are called T1 and T2, while the line
drivers for RxD are designated as R1 and R2.
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8051 Connection to RS232 (3)

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8051 Connection to RS232 (4)

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Serial Communication in 8051 (1)
Baud Rate:- The rate at which the number of bits are
transmitted

8051 Registers related to Serial Communication

1. SBUF Register -- to hold data

2. SCON Register -- controls data communication

3. PCON Register -- controls data rates

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Serial Communication in 8051 (2)

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Serial Communication in 8051 (3)

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Serial Communication in 8051 (4)

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Serial Communication in 8051 (5)

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Serial Communication in 8051 (6)
PCON (Power Control Register)

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Addressing Modes of µC 8051 - (1)
✓ An instruction is used to load or transfer data from a source
to a destination.
✓ The source may be any register, internal memory, external
memory, any one of four ports or any external I/O peripheral
devices.
✓ Similarly, the destination may be any register, memory
(internal or external) and I/O devices.
✓ In any instruction of the 8051 microcontroller, the data is
known as operand.
✓ The way in which an operand is specified is called an
addressing mode.
✓ There are different ways to specify operands for instructions.
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Addressing Modes of µC 8051 - (2)
The commonly used addressing modes of 8051
microcontroller are as follows:
✓ Immediate addressing
✓ Register addressing mode
✓ Direct addressing
✓ Register Indirect addressing
✓ Indexed addressing
✓ Relative addressing
✓ Absolute addressing
✓ Long addressing
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Addressing Modes of µC 8051 - (3)
Immediate Addressing (1)
✓ In immediate addressing mode, the source operand is a constant
rather than a variable.
✓ The constant operand can be incorporated into the instruction as a
byte of immediate address.
✓ The immediate operands are preceded by a # sign in assembly
language.
✓ Examples:
▪ ADD A, # data - Add immediate data to the accumulator
▪ SUBB A, # data - Subtract immediate data from accumulator with borrow
▪ MOV Rn, # data - Move immediate data to register Rn
▪ MOV DPTR, #data - 16 Load data pointer register with a 16-bit constant
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Addressing Modes of µC 8051 - (4)
Immediate Addressing (2)
Examples:

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Addressing Modes of µC 8051 - (5)
Register Addressing – (1)
✓ In this mode, the selected register bank containing registers R0
through R7 can be accessed by certain instructions which carry a 3-
bit register specification within the opcode of the instruction.
✓ One of four banks is selected by the two bank select bits in the
PSW.
✓ Example:
▪ ADD A, Rn - Add the content of register Rn to the accumulator
▪ SUBB A, Rn – Subtract the content of the register from the accumulator
with borrow
▪ MOV Rn, A – Move data from the accumulator to register Rn.
▪ INC DPTR - Increment data pointer register by one.

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Addressing Modes of µC 8051 - (6)
Register Addressing – (2)
▪ Examples

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Addressing Modes of µC 8051 - (7)
Register Specific/Implied Addressing

▪ Inherent in the instruction, these refer to a specific register,


such as an accumulator (A) or DPTR
▪ Examples
✓ SWAP A - Swap the contents of the lower and higher nibbles
✓ RL A – Rotate the accumulator (A) content towards the left
✓ RR A – Rotate the accumulator (A) content towards the right
✓ CPL A – Complement accumulator content

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Addressing Modes of µC 8051 - (8)
Direct Byte Addressing - (1)
▪ There are 128 bytes of RAM in the 8051

▪ The RAM has been assigned addresses 00 to 7FH.

▪ The following is a summary of the allocation of these 128


bytes.
1) RAM locations 00–1FH are assigned to the register banks and
stack.
2) RAM locations 20–2FH are set aside as bit-addressable space
to save single-bit data.
3) RAM locations 30–7FH are available as a place to save byte-
sized data.

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Addressing Modes of µC 8051 - (9)
Direct Byte Addressing - (2)
▪ Although the entire 128 bytes of RAM can be accessed using
direct addressing mode, it is most often used to access RAM
locations 30–7FH.

▪ This is because register bank locations are accessed by the


register names of R0–R7, but there is no such name for other
RAM locations.

▪ In the direct addressing mode, the data is in a RAM location


whose address is known, and this address is given as a part of the
instruction

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Addressing Modes of µC 8051 - (10)
Direct Byte Addressing - (3)
Examples :

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Addressing Modes of µC 8051 - (11)
Direct Byte Addressing - (4)
Examples:
▪ MOV A, 33H This instruction is used to transfer the content of
internal memory (RAM) location 33H to the accumulator
▪ MOV 32, R1 The content of register R1 moves to internal memory
location 32H as depicted in Fig.

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Addressing Modes of µC 8051 - (12)
Stack and Direct Addressing
▪ Another major use of the direct addressing mode is the stack.
▪ In the 8051 family, only the direct addressing mode is allowed for
pushing onto the stack. (PUSH instruction)
▪ Direct addressing mode must be used for the POP instruction as
well
▪ Examples

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Addressing Modes of µC 8051 - (13)
Register Indirect Addressing – (1)
▪ In this mode, a register is used as a pointer to the data.
▪ If the data is inside the CPU, only registers R0 and R1 are used
for this purpose
▪ When R0 and R1 are used as pointers, that is, when they hold
the addresses of RAM locations, they must be preceded by the
“@” sign
▪ Examples:

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Addressing Modes of µC 8051 - (14)
Register Indirect Addressing – (2)
Example:
▪ MOV @Ri , A - Move the content of the accumulator to indirect RAM specified by
Ri (R0 or R1)
▪ MOV A, @Ri - Moves a byte of data from internal RAM at a location whose
address is in Ri (R0 or R1) to the accumulator
▪ DEC @Ri - Decrement indirect RAM specified by Ri (R0 or R1)
▪ ADD A, @R0 - Add the contents of the address specified by the R0 register to the
accumulator

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Addressing Modes of µC 8051 - (15)
Base + Index Register Addressing - (1)
✓ In indexed addressing, only the program memory can be
accessed and it can only be read.
✓ This addressing mode is used for reading look-up tables in
program memory.
✓ The effective address of a program memory is calculated as
the summation of the content of the base register (program
counter PC or data pointer DPTR) and an offset, i.e., the
contents of the accumulator.
✓ Effective Address = Base Register (PC or DPTR) + Index Register (A)
✓ This addressing mode is intended for a JMP or MOVC
instruction.
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Addressing Modes of µC 8051 - (16)
Base + Index Register Addressing - (2)
Example:
▪ MOVC A,@A+PC - Move a byte of data from program memory, whose
address can be determined by the sum of the accumulator and program
counter, to the accumulator.

▪ JMP @A+DPTR – Jump indirect relative to the data pointer; the address
of a jump instruction is calculated as the sum of the accumulator and the
data pointer.
▪ MOVC A,@A+DPTR - Move a byte of data from program memory, whose
address can be found by adding the accumulator and the data pointer, to
the accumulator.

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Addressing Modes of µC 8051 - (17)
Base + Index Register Addressing - (3)
Example: MOVC A, @A+DPTR
Where, A – Index Register, DPTR- Base Register, C- Code/Program memory

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Addressing Modes of µC 8051 - (18)
Relative Addressing – (1)
✓ Generally, this addressing mode is used in certain jump
instructions.

✓ The relative address is an 8-bit signed number (–128 to 127),


which is added to the program counter to determine the
address of the next instruction.

✓ Before addition, the program counter is incremented.

✓ Therefore, the new address relative to the next instruction is


determined before a jump to the new address instruction.

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Addressing Modes of µC 8051 - (19)
Relative Addressing – (2)

✓ For example, when the SJMP


Level offset. instruction is
executed, the new address can
be obtained from the sum of
the PC and offset.

✓ Then, a jump to the new


address occurs as depicted in
Fig.

✓ The advantage of relative


addressing is that it has
position-independent codes

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Addressing Modes of µC 8051 - (20)
Absolute Addressing
✓ The absolute addressing is only used with AJMP and ACALL
instructions.

✓ The 11 least significant bits of the destination address come


from the opcode and the upper five bits are the current
upper five bits in the program counter.

✓ In this addressing mode, the destination address will be


within 2K (211) memory.

✓ For example, ACALL addr11.

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Addressing Modes of µC 8051 - (21)
Long Addressing
✓ The long addressing is used only with the LJMP and LCALL
instructions.

✓ These instructions include a full 16-bit destination address.

✓ In this mode, the full 64K code space is available and the
instruction is long and position-dependent.

✓ For example, when LJMP, 9500H. instruction is executed, it


jumps to memory location 9500H

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Addressing Modes of µC 8051 - (22)
Example
Find the addressing modes of the following instructions:
1) ADD A, R7
2) ADD A, 55H
3) MOV A, @R0
4) MUL AB
5) MOV A, #FF
6) MOV DPTR, #8000
7) MOVC A, @A+DPTR
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Addressing Modes of µC 8051 - (23)
Example- Solution
1) ADD A, R7 instruction is an example of register addressing

2) ADD A, 55H instruction is an example of direct addressing

3) MOV A, @R0 instruction is an example of indirect addressing

4) MUL AB instruction is an example of register addressing

5) MOV A, #FF instruction is an example of immediate addressing

6) MOV DPTR, #8000 instruction is an example of immediate


addressing

7) MOVC A, @A+DPTR instruction is an example of index addressing.


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Instruction Formats of 8051 (1)
▪ The 8051 has 111 Instructions.

▪ Each instruction has a 1-byte opcode.

▪ With an 8-bit binary code, we can generate different


binary codes.

▪ The size of the 8051 instruction is 1 to 3 bytes.

▪ The remaining bytes are either data or address

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Instruction Formats of 8051 (2)

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Instructions Types of 8051 Microcontroller
▪ 8051 microcontroller has a set of instructions to
perform different operations in 8051 micro-controller.
▪ There are five groups of instructions, which are listed
below.
1. Data Transfer Instructions (28)
2. Arithmetic Branch Instructions (24)
3. Logical Instructions (25)
4. Boolean Variable/Bit-oriented Instructions (17)
5. Branching Instructions (17)

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8051 µC- Data Transfer Instructions- (1)
▪ There are 28 instruction types in the data transfer type of
operations
▪ Transfer data between registers or external program
memory, or external data memory.
▪ None of the flags are affected
▪ Rn any of the registers R0 to R7;
▪ Ri any of the registers R0 and R1;
▪ d8 any 8-bit immediate data (range 00H–FFH);
▪ d16 any 16-bit immediate data (range 0000H–FFFFH);
▪ a8 8-bit address. This could refer to an SFR or a data RAM
location.
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8051 µC- Data Transfer Instructions- (2)

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8051 µC- Data Transfer Instructions- (3)
✓ MOV A, Rn - Move the register to the accumulator

✓ MOV A, direct - Move direct byte to accumulator

✓ MOV A, @Ri - Move indirect RAM to the accumulator

✓ MOV A, #data - Move immediate data to the accumulator

✓ MOV Rn, A - Move accumulator to register

✓ MOV Rn, direct - Move direct byte to register

✓ MOV Rn, #data - Move immediate data to register

✓ MOV direct, A - Move accumulator to direct byte


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8051 µC- Data Transfer Instructions- (4)
✓ MOV direct, Rn - Move register to direct byte

✓ MOV direct, direct - Move direct byte to direct

✓ MOV direct, @Ri - Move indirect RAM to direct byte

✓ MOV direct, #data- Move immediate data to direct byte

✓ MOV @Ri, A -Move accumulator to indirect RAM

✓ MOV @Ri, direct -Move direct byte to indirect RAM

✓ MOV @Ri, #data- Move immediate data to indirect RAM

✓ MOV DPTR, #data16 - Load data pointer with a 16-bit constant


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8051 µC- Data Transfer Instructions- (5)
✓ MOVC A,@A +DPTR- Move code byte relative to DPTR to ACC

✓ MOVC A,@A+PC - Move code byte relative to PC to ACC

✓ MOVX A, @Ri - Move external RAM (8-bit addr) to ACC

✓ MOVX A,@ DPTR -Move external RAM (16-bit addr) DPTR to


ACC

✓ MOVX A, @Ri - Move ACC to external RAM (8-bit addr)

✓ MOVX A,@DPTR - Move ACC to external RAM (16-bit addr)

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8051 µC- Data Transfer Instructions (6)
PUSH,POP and Exchange Instructions

✓ PUSH direct - Push direct byte onto stack

✓ POP direct - Pop direct byte from stack

✓ XCH A, Rn - Exchange register with accumulator

✓ XCH A, direct - Exchange direct byte with accumulator

✓ XCH A, @ Ri - Exchange indirect RAM with accumulator

✓ XCHD A, @ Ri - Exchange low-order digit indirect RAM


with ACC

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8051 µC- Data Transfer Instructions- (7)

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8051 µC- Data Transfer Instructions- (8)

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8051 µC- Arithmetic Instructions- (1)

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8051 µC- Arithmetic Instructions- (2)

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8051 µC- Arithmetic Instructions- (3)
✓ADD A, Rn - Add register to the accumulator
✓ADD A, direct - Add direct byte to the accumulator
✓ADD A, @Ri - Add indirect RAM to the accumulator
✓ADD A, #data - Add immediate data to the accumulator
✓ADDC A, Rn - Add register to the accumulator with carry
✓ADDC A, direct - Add direct byte to the accumulator
✓ADDC A, @Ri - Add indirect RAM to the Accumulator with
carry
✓ADDC A, #data - Add immediate data to the ACC with carry
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8051 µC- Arithmetic Instructions- (4)
✓ SUBB A, Rn -Subtract register from ACC with borrow
✓ SUBB A, direct- Subtract direct byte from ACC with borrow
✓ SUBB A,@Ri -Subtract indirect RAM from ACC with borrow
✓ SUBB A, #data - Subtract immediate data from ACC with
borrow
✓ MUL AB - Multiply A and B
✓ DIV AB - Divide A by B
✓ DA A - Decimal adjust accumulator

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8051 µC- Arithmetic Instructions- (5)
✓ INC A - Increment accumulator
✓ INC Rn -Increment register
✓ INC direct- Increment direct byte
✓ INC @Ri - Increment indirect RAM
✓ INC DPTR - Increment data pointer
✓ DEC A - Decrement accumulator
✓ DEC Rn - Decrement register
✓ DEC direct - Decrement direct byte
✓ DEC @Ri - Decrement indirect RAM
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8051 µC- Arithmetic Instructions- (6)

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8051 µC- Arithmetic Instructions- (7)

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8051 µC- Logical Instructions- (1)

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8051 µC- Logical Instructions- (2)

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8051 µC- Logical Instructions- (3)
✓ ANL A, Rn - AND register to accumulator

✓ ANL A, direct - AND direct byte to accumulator

✓ ANL A,@Ri -AND indirect RAM to accumulator

✓ ANL A,#data -AND immediate data to accumulator

✓ ANL direct, A -AND accumulator to direct byte

✓ ANL direct, #data - AND immediate data to direct byte

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8051 µC- Logical Instructions- (4)
✓ ORL A, Rn - OR register to the accumulator

✓ ORL A, direct - OR direct byte to accumulator

✓ ORL A,@Ri - OR indirect RAM to accumulator

✓ ORL A,#data - OR immediate data to accumulator

✓ ORL direct, A - OR accumulator to direct byte

✓ ORL direct, #data - OR immediate data to direct byte

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8051 µC- Logical Instructions- (5)
✓ XRL A, Rn – Exclusive-OR register to the accumulator

✓ XRL A, direct - Exclusive-OR direct byte to accumulator

✓ XRL A,@Ri - Exclusive-OR indirect RAM to accumulator

✓ XRL A,#data - Exclusive-OR immediate data to accumulator

✓ XRL direct, A - Exclusive-OR accumulator to direct byte

✓ XRL direct, #data - Exclusive-OR immediate data to direct


byte

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8051 µC- Logical Instructions- (6)
✓ CLR A -Clear accumulator

✓ CPL A -Complement accumulator

✓ SWAP A -Swap nibbles within the accumulator

✓ RL A -Rotate accumulator left

✓ RLC A -Rotate accumulator left through the carry

✓ RR A -Rotate accumulator right

✓ RRC A -Rotate the accumulator right through the carry

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8051 µC- Logical (Rotate) Instructions- (6-a)
✓ RL A -Rotate accumulator left

✓ RLC A -Rotate accumulator left through the carry

✓ RR A -Rotate accumulator right

✓ RRC A -Rotate the accumulator right through the carry

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8051 µC- Boolean/Bit-oriented Instructions- (1)

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8051 µC- Boolean/Bit-oriented Instructions- (2)

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8051 µC- Boolean/Bit-oriented Instructions- (3)
✓ CLR C - Clear carry

✓ CLR bit - Clear direct bit

✓ SETB C - Set carry

✓ SETB bit - Set direct bit

✓ CPL C - Complement carry

✓ CPL bit - Complement direct bit

✓ ANL C, bit - AND direct bit to carry

✓ ANL C, bit -AND complement of direct bit to carry


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8051 µC- Boolean/Bit-oriented Instructions- (4)
✓ ORL C, bit - OR direct bit to carry
✓ ORL C, bit - OR complement of direct bit to carry
✓ MOV C, bit - Move a direct bit to carry
✓ MOV bit, C – Move carry to a direct bit
✓ JC rel - Jump if carry is set
✓ JNC rel - Jump if carry is not set
✓ JB Bit, rel - Jump if the direct bit is set
✓ JNB Bit, rel – Jump if the direct bit is not set
✓ JBC bit, rel - Jump if direct bit is set and clear bit
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8051 µC- Program Branching Instructions- (1)

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8051 µC- Program Branching Instructions- (2)

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8051 µC- Branching Instructions- (3)
✓ ACALL addr11 - Absolute subroutine call 24
✓ LCALL addr16 - Long subroutine call
✓ RET - Return from subroutine
✓ RETI -Return from interrupt
✓ AJMP addr11 -Absolute jump
✓ LJMP addr16 -Long jump
✓ SJMP rel - Short jump (relative addr)
✓ JMP @A+ DPTR- Jump indirect relative to the DPTR
✓ JZ rel - Jump if accumulator is zero
✓ JNZ rel - Jump if accumulator is not zero
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8051 µC- Branching Instructions- (4)
✓ CJNE A, direct, rel - Compare direct byte to ACC and jump if
not equal
✓ CJNE A, #data, rel - Compare immediate to ACC and jump if
not equal
✓ CJNE Rn, #data, rel - Compare immediate to register rel and
jump if not equal
✓ CJNE @Ri, # data, rel- Compare immediate to indirect and
jump if not equal
✓ DJNZ Rn, rel - Decrement register and jump if not zero
✓ DJNZ direct,rel - Decrement direct byte and jump if not zero
✓ NOP – No operation
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Simple Programming Examples (1)

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Simple Programming Examples (2)

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Simple Programming Examples (3)

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Simple Programming Examples (4)

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Simple Programming Examples (5)

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Simple Programming Examples (6)

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Simple Programming Examples (7)

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Applications of 8051 Microcontroller

▪ Keyboard and Display Interface


▪ Temperature Control System
▪ Stepper Motor Control

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Keyboard and Display Interface (1)
LCD Interfacing (1)
In recent years, the LCD has been found in widespread use
replacing LEDs (seven-segment LEDs or other multi-segment
LEDs). This is due to the following reasons:

✓ The declining prices of LCDs.

✓ The ability to display numbers, characters, and graphics

✓ Incorporation of a refreshing controller into the LCD

✓ Ease of programming for characters and graphics.

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Keyboard and Display Interface (2)
LCD Interfacing (2)
Pin Positions for Various LCDs from Optrex

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Keyboard and Display Interface (3)
LCD Interfacing (3)
LCD -14 Pins:

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Keyboard and Display Interface (4)
LCD Interfacing (4)
LCD Command Codes Code Command to LCD Instruction (Hex) Register

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Keyboard and Display Interface (5)
LCD Interfacing - Operations (5)
1) Sending commands and data to LCDs with a Time Delay
✓ To send any of the commands to the LCD, make pin RS = 0
✓ For data, make RS = 1
✓ Then send a high-to-low pulse to the E pin to enable the
internal latch of the LCD
2) Sending code or data to the LCD with checking Busy Flag
✓ Put a long delay between issuing data or commands to the
LCD
✓ To monitor the busy flag before issuing a command or data
to the LCD
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Keyboard and Display Interface (6)
LCD Interfacing - Diagram (6)

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Keyboard and Display Interface (7)
LCD Instructions (1)

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Keyboard and Display Interface (8)
LCD Instructions (2)

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Keyboard and Display Interface (9)
LCD - Assembly Language Program (1)

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Keyboard and Display Interface (10)
LCD - Assembly Language Program (2)

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Keyboard and Display Interface (11)
Keyboard Interfacing (1)
▪ At the lowest level, keyboards are organized in a matrix of rows
and columns.

▪ The CPU accesses both rows and columns through ports; therefore,
with two 8-bit ports, an 8 x 8 matrix of keys can be connected to a
microprocessor.

▪ When a key is pressed, a row and a column make contact;


otherwise, there is no connection between rows and columns.

▪ In IBM PC keyboards, a single microcontroller (consisting of a


microprocessor, RAM and EPROM, and several ports all on a single
chip) takes care of hardware and software interfacing of the
keyboard.
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Keyboard and Display Interface (12)
Keyboard Interfacing - Operations (1)
1. Scanning and Identifying the Key
✓ 4 x 4 matrix connected to two ports.
✓ The rows are connected to an output port, and the columns
are connected to an input port.
✓ If no key has been pressed, reading the input port will yield 1s
for all columns since they are all connected to high (VCC).
✓ If all the rows are grounded and a key is pressed, one of the
columns will have 0 since the key pressed provides the path to
the ground.
✓ It is the function of the microcontroller to scan the keyboard
continuously to detect and identify the key-pressed
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Keyboard and Display Interface (13)
Keyboard Interfacing - Operations (2)
2. Grounding Rows and Reading the Columns
✓ To detect a pressed key, the microcontroller grounds all rows by
providing 0 to the output latch, and then it reads the columns.
✓ If the data read from the columns is D3–D0 = 1111, no key has
been pressed, and the process continues until a key press is
detected.
✓ However, if one of the column bits has a zero, this means that a
key press has occurred.
✓ For example, if D3–D0 = 1101, this means that a key in the D1
column has been pressed.
✓ After a key press is detected, the microcontroller will go through
the process of identifying the key.
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Keyboard and Display Interface (14)
Keyboard Interfacing - Diagram (1)
4x4 Matrix Keyboard Connection to Ports

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Keyboard and Display Interface (15)
4x4 Matrix Keyboard – Identification of pressed Key
From the previous slide, identify the row and column of the
pressed key for each of the following.
(a) D3–D0 = 1110 for the row, D3–D0 = 1011 for the column
(b) D3–D0 = 1101 for the row, D3–D0 = 0111 for the column

Solution:
From the previous slide, the row and column can be used to
identify the key.
(a) The row belongs to D0 and the column belongs to D2; therefore,
key number 2 was pressed.
(b) The row belongs to D1 and the column belongs to D3; therefore,
key number 7 was pressed.
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Keyboard and Display
Interface (16)
Keyboard Interfacing
- Flowchart (1)

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Keyboard and Display Interface (17)
Assembly Language Program (1)

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Keyboard and Display Interface (18)
Assembly Language Program (2)

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Keyboard and Display Interface (19)
Assembly Language Program (3)

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Keyboard and Display Interface (20)
Assembly Language Program (4)

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Temperature Control System (1)
Introduction
▪ Transducers convert physical data such as temperature, light
intensity, flow, and speed to electrical signals.

▪ Depending on the transducer, the output produced is in the


form of voltage, current, resistance, or capacitance.

▪ For example, temperature is converted to electrical signals


using a transducer called a thermistor.

▪ A thermistor responds to temperature change by changing


resistance, but its response is not linear

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Temperature Control System (2)
LM34 Temperature Sensors
▪ The sensors of the LM34 series are precision integrated-circuit
temperature sensors whose output voltage is linearly
proportional to the Fahrenheit temperature
▪ The LM34 requires no external calibration since it is internally
calibrated.
▪ It outputs 10 mV for each degree of Fahrenheit temperature

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Temperature Control System (3)
LM35 Temperature Sensors
▪ The LM35 series sensors are precision integrated-circuit
temperature sensors whose output voltage is linearly
proportional to the Celsius (centigrade) temperature
▪ The LM35 requires no external calibration since it is internally
calibrated.
▪ It outputs 10 mV for each degree of centigrade temperature.

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Temperature Control System (4)
Signal Conditioning & Interfacing the LM35 to the 8051 (1)
▪ Signal conditioning is widely used in the world of data
acquisition.
▪ The most common transducers produce an output in the form of
voltage, current, charge, capacitance, and resistance.
▪ However, we need to convert these signals to voltage in order to
send input to an A-to-D converter.
▪ This conversion (modification) is commonly called signal
conditioning.
▪ Signal conditioning can be a current-to-voltage conversion or a
signal amplification.
▪ For example, the thermistor changes resistance with temperature
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Temperature Control System (5)
Signal Conditioning & Interfacing the LM35 to the 8051 (2)

Getting Data from the


Analog World

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Temperature Control System (6)
Signal Conditioning & Interfacing the LM35 to the 8051 (3)
▪ The change of resistance must be translated into voltages in order
to be of any use to an ADC
▪ In the case of connecting an LM35 to an ADC0848, since the
ADC0848 has 8-bit resolution with a maximum of 256 (2 8 ) steps,
and the LM35/LM34) produces 10mV for every degree of
temperature change
▪ We can condition Vin of the ADC0848 to produce a Vout of 2560 mV
(2.56 V) for full-scale output
▪ Therefore, to produce the full-scale Vout of 2.56V for the ADC0848,
we need to set Vref = 2.56.
▪ This makes the Vout of the ADC0848 correspond directly to the
temperature as monitored by the LM35
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Temperature Control System (7)
Signal Conditioning & Interfacing the LM35 to the 8051 (4)

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Temperature Control System (8)
8051 Connection to ADC0848 and Temperature Sensor

▪ LM336-2.5 zener diode to fix the voltage across the 10K pot at 2.5V
▪ LM336-2.5 should overcome any fluctuations in the power supply.
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Temperature Control System (9)
Assembly Language Program (1)

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Temperature Control System (10)
Assembly Language Program (2)

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Stepper Motor Control (1)
Basic Concepts (1)
▪ A stepper motor is a widely used device that translates electrical
pulses into mechanical movement
▪ In applications such as disk drives, dot matrix printers, and
robotics, the stepper motor is used for position control.
▪ Stepper motors commonly have a permanent magnet rotor (also
called the shaft) surrounded by a stator.
▪ There are also steppers called variable reluctance stepper motors
that do not have a PM rotor.
▪ The most common stepper motors have 4 stator windings that
are paired with a center-tapped common.
▪ This type of stepper motor is commonly referred to as a 4-phase
or unipolar stepper motor.
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Stepper Motor Control (2)
Basic Concepts (2)
▪ The center tap allows a change of current direction in each of the
two coils when a winding is grounded
▪ Thereby resulting in a polarity change of the stator.
▪ The stepper motor shaft moves in a fixed, repeatable increment,
which allows one to move it to a precise position
▪ This repeatable fixed movement is possible as a result of basic
magnetic theory, where poles of the same polarity repel and
opposite poles attract
▪ The stator poles are determined by the current sent through the
wire coils
▪ As the direction of the current is changed, the polarity is also
changed, causing the reverse motion of the rotor
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Stepper Motor Control (3)
Rotor Alignment

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Stepper Motor Control (4)
Stator Windings Configuration
▪ The stepper motor discussed here has a total of 6 leads: 4 leads
representing the 4 stator windings and 2 commons for the
center-tapped leads.
▪ As the sequence of power is applied to each stator winding, the
rotor will rotate.

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Stepper Motor Control (5)
Step Angle (1)
▪ It is the minimum degree of rotation associated with a single step
▪ Various motors have different step angles.
▪ This depends on the internal construction of the motor, in
particular, the number of teeth on the stator and the rotor.
▪ This is the total number of steps needed to rotate one complete
rotation or 360 degrees (e.g., 180 steps × 2 degrees = 360).
Steps per second and rpm relation
▪ The relation between rpm (revolutions per minute), steps per
revolution, and steps per second is as follows

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Stepper Motor Control (6)
Step Angle (2)

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Stepper Motor Control (7)
Normal 4-Step Sequence
▪ As the sequence of power is applied to each stator winding, the
rotor will rotate.
▪ There are several widely used sequences where each has a
different degree of precision

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Stepper Motor Control (8)
Half-Step/8-Step Sequence
▪ To allow for finer resolutions, all stepper motors allow what is
called an 8-step switching sequence.
▪ The 8-step sequence is also called half-stepping, since in the 8-step
sequence, each step is half of the normal step angle.

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Stepper Motor Control (9)
Common Stepper Motor Types

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Stepper Motor Control (10)
Stepper Motor Specifications

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8051 Connection to Stepper Motor (1)

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8051 Connection to Stepper Motor (2)
▪ The four leads of the stator winding are controlled by four bits of
the 8051 port (P1.0–P1.3)

▪ However, since the 8051 lacks sufficient current to drive the


stepper motor windings, use a driver such as the ULN2003 to
energize the stator.

▪ However, notice that if transistors are used as drivers, we must


also use diodes to take care of the inductive current generated
when the coil is turned off.

▪ One reason that using the ULN2003 is preferable to the use of


transistors as drivers is that the ULN2003 has an internal diode to
take care of back EMF.

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8051 Connection to Stepper Motor (3)
Assembly Language Program

Note:
▪ Change the value of DELAY to set the speed of rotation
▪ Using single-bit instructions SETB and CLR instead of RR A to create the
sequences.
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8051 Connection to Stepper Motor (4)
Using Transistors as Drivers (1)
▪ Instead of the ULN2003, transistors are used as drivers

▪ Unipolar stepper motor using transistors

▪ Diodes are used to reduce the back EMF spike created


when the coils are energized and de-energized

▪ Darlington transistors can accommodate higher voltages


and currents.

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8051 Connection to Stepper Motor (5)
Using Transistors as Drivers (2)

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8051 Connection to Stepper Motor (6)
Controlling Stepper Motor via Optoisolator

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References
• Muhammad Ali Mazidi and Janice Gillispie Mazidi, “ The
8051 Microcontroller and Embedded Systems” ,Fourth
reprint 2002.
• Ajay V Deshmukh “ Microcontrollers: Theory and
Applications” Tata McGraw- Hill Edition, Seventh Reprint
2007.
• http://www.eeeguide.com/intel-8051-architecture-and-
8031-architecture/
• https://www.electronicwings.com/8051/8051-interrupts
• https://www.electronicshub.org/8051-microcontroller-
instruction-set/
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