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VLSI Architecture for Depth Invariant Real-time Fixed/Random

Valued Impulse Noise Removal Algorithm for Back-end of
Ultrasonography Systems
Pradyut Kumar Sanki1 and Rakesh Biswas2
1
SRM University AP - Amaravati
2
Indian Institute of Technology Guwahati Department of Electronics and Electrical
Engineering

October 31, 2022

Abstract
Ultrasound images often get distorted by impulse noise during data acquisition and processing in the Back-
end of the system, which overlay the finer details of the scanned body parts. Generally, a portable low-cost
USG system doesn’t have an impulse noise-cleaning module which hinders detections of smaller details in
the images. A Depth Invariant Impulse Noise Removal (DIINoR) algorithm and its hardware architecture for
real-time impulse noise removal from the corrupt USG image are proposed in this paper. In this decision-based
algorithm, the corrupt pixel is first detected depending on the homogeneity of the processing window and is
restored with the median of the window or previous pixel value. Testing of the DIINoR algorithm on different
USG images establishes that the denoised images have superior quantitative performance compared to those of
existing schemes. Implementation of this architecture in VIRTEX-7 FPGA gives a maximum clock frequency
of 357.96 MHz. Synthesis of this architecture using UMC 90nm technology gives 103 mW power consumption
at a clock frequency of 100 MHz with a gate count of 63K (NAND2) including two memory buffers which
proves its suitability for the real-time fixed and random valued impulse noise cleaning in the Back-end of the
portable USG system.

1
 1

VLSI Architecture for Depth Invariant Real-time

Fixed/Random Valued Impulse Noise Removal
Algorithm for Back-end of Ultrasonography
Systems
Pradyut Kumar Sanki, Senior Member, IEEE, and Rakesh Biswas, Member, IEEE

Abstract—Ultrasound images often get distorted by impulse be the performance, cost or size of the system,
noise during data acquisition and processing in the Back-end of the basic building blocks of the systems remain
the system, which overlay the finer details of the scanned body
parts. Generally, a portable low-cost USG system doesn’t have the same. Modern USG system [9] architecture can
an impulse noise-cleaning module which hinders detections of be broadly divided into three parts namely, the
smaller details in the images. A Depth Invariant Impulse Noise
Removal (DIINoR) algorithm and its hardware architecture for Front-end, the Mid-processor and the Back-end. To
real-time impulse noise removal from the corrupt USG image produce the RAW image data the received echo
are proposed in this paper. In this decision-based algorithm, the signals in the Front-end are passed through the
corrupt pixel is first detected depending on the homogeneity
of the processing window and is restored with the median of receive (Rx) analog front-end, which consists of a
the window or previous pixel value. Testing of the DIINoR low noise amplifier, a gain controller, a low pass
algorithm on different USG images establishes that the denoised
images have superior quantitative performance compared to filter and an Analog to Digital Converter (ADC).
those of existing schemes. Implementation of this architecture During this acquisition phase, the RAW data can
in VIRTEX-7 FPGA gives a maximum clock frequency of 357.96 get corrupted by impulse noise due to sudden
MHz. Synthesis of this architecture using UMC 90nm technology
gives 103 mW power consumption at a clock frequency of 100 transducer movement, noisy sensors, high-voltage
MHz with a gate count of 63K (NAND2) including two memory sparks, error during analog to digital conversion
buffers which proves its suitability for the real-time fixed and
random valued impulse noise cleaning in the Back-end of the and even atmospheric electrical discharge [2], [3].
portable USG system. Transmission channel error and analog transmission
Index Terms—Impulse noise, image denoising, filtering algo- systems can also generate impulse noise. Also, in
rithms, image quality, P SN R, field programmable gate arrays. the USG Back-end, during processing and storing
of an image (during Digital Scan Conversion (DSC)
and Speckle Reduction Imaging (SRI)), impulse
I. I NTRODUCTION
noise effects can degrade the quality of the image,
Ultrasound (USG) imaging is the most widely hindering proper medical diagnosis. Most of the
used non-invasive imaging modality in the field of low-cost portable USG systems pose problems for
cardiology, obstetrics, abdominal imaging, etc. The the practitioners as presence of impulse noise during
primary problem of USG imaging is its suscepti- scanning creates low quality images, as they do not
bility to noise, as images are commonly corrupted have real-time noise cleaning modules. Therefore
with impulse noise during acquisition, transmission, a real-time impulse noise cleaning is necessary for
processing and storage of the images [1]–[3]. This enhancing the features of low-cost portable USG
leads to loss of information [4], [5] and performance systems.
degradation of the processing system. Throughout
the last decade, USG machines are evolved in two Impulse noise is randomly distributed in an image
separate ways, one is high performance system and it can be either fixed-valued or random-valued
development [6] while the other one is low-cost in nature. The fixed-valued impulse noise is re-
portable system development [7]. The low cost- ferred to as Salt-and-Pepper Noise (SPN), for which
systems gained popularity because of its portability the image pixels can be altered into either black
and ease of use, but lacks in many features like (gray level = 0) or white (gray level = 255) [10],
noise cleaning, color Doppler, multi-probe support [11]. Also, impulse noise can be random valued
and many post processing options [8]. Whatever and distributed over a range. As discussed before,
 2

impulse noise can affect the USG system Back-end window. AMF adjusts the processing window de-
in two places: i) during acquisition of RAW data and pending upon the Noise Density (ND) in the region
ii) during storing of the processed images. In the of interest. However, bigger window sizes result in
first case, the RAW data gets corrupted by impulse increased blurring in the output image [31], [32].
noise, as the analog Front-end itself is impulsive A New Adaptive Weighted Mean Filter improves
in nature. Usually, the Front-end generates RAW the drawback of AMF by improving the detection
data with a Noise Figure (NF) of 2.3-3 dB [12], scheme and replacing the corrupted pixel by mean
[13], most of which comes from the Low Noise value. Image quality improves with a overhead of
Amplifier (LNA) and VGA circuits. Therefore, the computational complexity [33].
RAW data needs to be cleaned before it is passed
forward for any kind of image processing. Also, the SWitching Median Filters (SWMFs) restore noisy
size of the RAW data varies with the demand of pixels by an immediate neighbor or the median
the USG system user (for example, from 433 × 256 value of the pixel neighborhood while keeping the
to 487 × 256 in a GE LogicQ USG system). The remaining pixels intact [34], [35]. They perform
size information is available from the USG Front- well under various conditions, but are unable to
end and can be used for cleaning the variable- restore images at high noise densities due to difficul-
sized RAW data. Therefore, a depth invariant noise ties in determining impulse magnitude and impulse
removal algorithm that can work on a variable image strength at sharp edges of the image. A Deci-
size is very much necessary when impulse noise sion Based Switching Median Filter (DBSMF) for
removal on RAW data is needed. Secondly, at the Restoration of Images Corrupted by High Density
end of DSC and SRI processing [14], the speckle- Impulse Noise [36] is able to clean the high density
cleaned image can also get corrupted by impulse noise by expanding the window size depending
noise during intermediate storing and buffering. on the number of corrupted pixels in the current
The post-SRI image is rectangular (for example, procesing window. Window expansion looses the
640 × 480 [14]) and can be cleaned by the same edge informatons sometimes. SWMF with Bound-
algorithm by setting the size of the image to desired ary Discriminative Noise Detection (BDND) tackles
specifications. For real-time impulse noise reduction this problem at the cost of increased execution
in low-cost portable USG systems, a low power time [37]–[39]. On the other hand, Decision Based
consuming hardware implementation is essential Algorithms (DBAs) [40] have low computational
using parallelism and pipelining of such filtering and time complexities, but result in streaking effects
algorithms. Existing Very Large Scale Integration at high noise densities [36], [40]–[43]. A variety of
(VLSI) implementations for impulse noise reduction techniques has been used for impulse noise removal.
algorithms occupy significantly large area [15]–[24]. They are Efficient Edge-Preserving (EEP) algo-
As in the portable USG system power and area rithm [44], fuzzy based adaptive median filtering
budget are limited, an area efficient, high-speed [45]–[48], genetic programming based filters [49],
and low-power VLSI architecture is very much hypergraph-based algorithms [50], partial differen-
necessary that can be a part of the USG Back-end tial equation based filters [51], linear mean-median
for fixed and random valued impulse noise cleaning. filters [43], adaptive decision based kriging in-
terpolation algorithm [52], classified regularization
Median filtering is widely used to eliminate such approaches [53], Min-Max Average Pooling Based
noise while maintaining image quality [25]. The Filter for Impulse Noise Removal [54], An Adaptive
Standard Median Filter (SMF) alters both corrupted Weighted Min-Mid-Max Value Based Filter [55],
as well as uncorrupted pixels resulting in blurring & Conditional Min Pooling and Restructured Con-
of the output image [25]–[30]. To minimize blurring volutional Neural Network [56]. These techniques
and improve image quality, only the noisy pix- involve significant computations on the corrupted
els are detected and restored keeping other pixels images which are performed off-line, making it
unchanged. The Adaptive Median Filter (AMF) difficult to get denoised images in real time, spe-
assumes uncorrupted pixel as noisy if the current cially in real-time portable USG systems. Though
processing pixel is itself minimum value and max- the algorithm reported in [44] shows promising
imum value is salt noise in current the processing results but directional difference calculation requires
 3

extensive computations. Efficient Adaptive Fuzzy

Switching Weighted Mean Filter [48] suffers from
the assumption of the previous pixel is uncorrupted
which is less pobable for the image corrupted with
high density noise. Most recently, algorithm [52]
for high density noise cleaning is based on sem- (a) Original Image
ivariance calculation of each pair of uncorrupted
pixels shows better results for weight calculation.
But, it requires a minimum of three uncorrupted
value for interpolation which is practically challeng-
ing.
A Depth Invariant Impulse Noise Removal (DI-
INoR) algorithm and its VLSI implementation are (b) Corrupted with 10% Noise (c) Image cleaned with DBA
proposed in this paper. It is organized as follows: Density algorithm

Section II discusses the background of impulse

noise. In Section III, the proposed DIINoR algo-
rithm for the detection and reduction of impulse
noise is discussed. The hardware architecture of the
proposed algorithm and its VLSI implementation
are detailed in Section IV, where the maximum size
(d) corrupted with 50 % noise (e) Image cleaned with DBA
of the image is taken as 640 × 480. Section V deals density algorithm
with the performance analysis of the reconstructed
image. Lastly, Section VI draws the conclusions. Fig. 1: Artifacts observed in USG images using DBA algo-
rithm for impulse noise removal.

II. I MPULSE N OISE : T HEORETICAL BACKGROUND

Let a digital image I(i,j), after being corrupted homogeneous regions. In ultrasound images, a large
with impulse noise of density d be represented as portion of the image is homogeneous and black,
n(i,j). Then, the noisy image n(i,j) is mathematically having gray value = 0. The DBA algorithm treats
represented as: this black background as pepper noise and tries to
 clean it. Therefore, two kinds of image artifacts
 I(i, j) p = 1 − d; are generated. One is the generation of white lines
n(i, j) = 1 p = d/2; (salt − noise) from the corrupt edge pixels (streaking effect), and
0 p = d/2; (pepper − noise)

another one is blurring of the edge of USG cone.
(1) These artifacts are shown in Figure 1. Also, There is
where p is the probability of distribution of impulse a need for calculating median value of all the W3×3
noise. window in the image for making decisions on fixing
Median filtering is used, in general, to remove the value of the centre pixel. This makes the DBA
impulse noise. But, standard median filter tends algorithm computationally intensive. Moreover, the
to blur the image, as it replaces both the corrupt algorithm works on fixed sized image. Therefore, it
and uncorrupt pixels. As information of edge and fails to clean the variable sized RAW data coming
smooth regions is important for a USG image, from the USG Front-end.
simple median filter is a bad choice for removing To overcome these limitations, a depth invariant
impulse noise in these images. Therefore, decision impulse noise removal algorithm, namely DIINoR,
based filters are a good choice for removal of is proposed and implemented in FPGA, targeting
impulse noise as they can differentiate between USG system Back-end.
noise and information. One such algorithm, namely
DBA, has been proposed in [40]. The algorithm
III. P ROPOSED DIIN O R A LGORITHM
works well on the images having lots of edges and
intensity variations (PSNR of 38.43 dB at 10% ND The pixel values in an image I(i, j) are changed
for Lena image), but not on images having large to 0 or 255 when they become corrupted by salt or
 4

pepper noise respectively. For denoising a corrupt size in real-time. This property of the proposed
image, a window of size 3 × 3 (W3×3 ) is assumed algorithm ensures that when implemented in
around the current processing pixel P (i, j). VLSI, the same module can be used to clean
To overcome the limitations of DBA, several mod- the variable sized RAW images and fixed sized
ifications are incorporated in the proposed DIINoR processed images.
algorithm which are listed below. The pseudo code of the proposed DIINoR algo-
rithm is given in Algorithm 1.
1) Instead of doing mandatory median calculation
for every W3×3 in the noisy image I(i, j), Algorithm 1 The DIINoR Algorithm
the proposed DIINoR algorithm first checks 1: for each pixel in the image do
whether the processing pixel P (i, j) is corrupt 2: if pixel is noisy (P (i, j) == 255 || P (i, j) == 0)
or not. If the pixel is found to be corrupt, the ||(0 ≤ P (i, j) < 32 || 234 < P (i, j) ≤ 255) then
proposed DIINoR algorithm restores the noisy 3: Take 3 × 3 Window (W3×3 ) around P (i, j);
pixel value depending on the Corrupted Pixel 4: Initialize Corrupted Pixel Count (CP C)
CP C ← 0;
Count (CP C) in W3×3 . For the CPC less than
5: for each pixel in W3×3 equal to P (i, j) do
5 (CP C < 5), only median of the W3×3 is 6: Increment CP C
calculated. Thus, median value calculation is CP C ← CP C + 1;
not required for each pixel detection stage, re- 7: end for
sulting in the reduction in power consumption 8: if (CP C < 5) then
during VLSI implementation of the algorithm. 9: Replace Pixel with Median Value
P (i, j) ← M edian(W3×3 );
2) Pixels from the corrupted image are divided
10: else
into high, medium and low range based on 11: if (CP C == 7) then
the pixel intensity. Medium range values are 12: Leave Pixel Value Unchanged
considered as uncorrupted pixels [37]. The P (i, j) ← P (i, j);
checking of corrupt pixel is done in two stages; 13: end if
at first, the value of the pixel is checked. 14: else
15: Replace Pixel with Previous Value
If the value is 0 or 255 (fixed) or in the
P (i, j) ← P (i, j − 1);
range between 0 to 31 or 235 to 255, the 16: end if
pixel may be a part of a homogeneous region 17: else
or the pixel may be corrupt. Thereafter, a 18: Leave Pixel Value Unchanged
homogeneity test is performed in the 3 × 3 P (i, j) ← P (i, j);
window around the corrupt pixel. If there are 19: end if
20: end for
7 pixels in the window having the same value
as that of the centre pixel, then the pixel is
not corrupt and the window is homogeneous.
This homogeneity threshold of 7 is selected
A. Window Size Selection
empirically after experimenting with different
USG images corrupted by impulse noise at In the proposed algorithm, a processing window
various noise densities. This two stage check- of size 3 × 3 is selected for denoising process
ing helps the proposed DIINoR algorithm to after evaluating the performance of the proposed
successfully detect a noisy pixel in a homo- algorithm with different window sizes on multiple
geneous background. This technique prevents images using MATLAB. The images are restored
the blurring at the edge of the USG cone. from the corrupt images with various noise density
3) To remove the streaking effect, zero-padding using different window sizes. The test image used
technique for boundary correction is adopted. for comparison in MATLAB is RAW USG image
4) The size information coming from the Front- of size 256×512. Increasing the size of window de-
end of the USG system, can be used to cal- grades the qualitative and quantitative performances
culate the size of the RAW image. Using this in terms of P SN R, IEF , M SE, EKI, SSIM and
information, VLSI architecture of the proposed F OM parameters [4], [14], [57], [58], which are
algorithm can process images of any required computed in Table I.
 5

TABLE I: Performance of DIINoR on a USG image with Original Image 30% Noise Density Filtered Image
varying window size. PSNR: 10.65 dB PSNR: 30.64 dB
Noise Window
PSNR EKI SSIM FOM
Density Size
3×3 42.93 0.99 0.99 0.97
10% 5×5 40.58 0.97 0.97 0.96
7×7 37.95 0.96 0.99 0.95
3×3 36.07 0.95 0.97 0.95
30% 5×5 35.00 0.93 0.95 0.90
7×7 33.25 0.75 0.94 0.87
3×3 21.87 0.78 0.60 0.90
90% 5×5 20.01 0.63 0.56 0.55
(a)256 × 433 (b) (c)
7×7 19.12 0.52 0.47 0.42

(g)256 × 468 (h) (i)

(a) RAW Image (b) Corrupted with

30% Noise Density

(m)256 × 487 (n) (o)

Fig. 3: RAW USG images of different sizes with 30% noise
densities cleaned by the proposed DIINoR algorithm in MAT-
LAB.

(c) Filtered image with (d) Filtered image (e) Filtered image with C. MATLAB Simulation Results
mirror extension with zero-padding border replication
As test image, the Front-end data of the USG
Fig. 2: Comparison of filtered images from 30% noise densi- LogicA3 system is used as it generates RAW data
ties after boundary correction using RAW USG image of size
512 × 256 in MATLAB.
of variable depth, which can vary from 433 rows
to 487 rows with fixed number of 256 scanlines
(number of columns) [14]. Also, the receiver end of
B. Boundary Correction the Front-end has a noise figure of 2.3 - 3 dB, which
corresponds to a 30% noise density and therefore
After denoising of the image using 3 × 3 window, the noise density in the MATLAB simulations has
the boundary of the image remains unchanged. been fixed to 30%, although some results have been
Boundary values can be restored using three tech- shown for higher noise densities to measure the
niques. They are mirror extension, zero-padding performance of the proposed algorithm. For impulse
and border replication. Figure 2 shows the im- noise removal after the image processing (DSC and
ages reconstructed from the noisy image with 30% SRI) part, the image size is taken as 640×480 as that
noise density using these techniques to solve the is the standard display size of the low-cost portable
boundary correction problem. It can be seen from USG systems. Random noise is added manually
Figure 2 that the zero-padding method cleans the through MATLAB on these original USG images.
noise most effectively. Some additional memory
elements are needed for implementing zero-padding
method in hardware, but the increased memory Figure 3 shows the property of depth invariance
cost is acceptable considering that the quality of of the proposed DIINoR algorithm. Although RAW
medical images cannot be sacrificed. Therefore, images of five different depths of penetration have
zero-padding technique is adopted for the proposed been shown in this figure, the algorithm can process
DIINoR algorithm. any sized image. It can be seen from the Figure
 6

50
Noisy
900
SMF
3 that at 30% impulse noise density, the proposed
SMF DBSMF
45

40
DBSMF
DBA
Proposed
800

700
DBA
Proposed
DIINoR algorithm removes the impulse noise with
35

30
600 output PSNR of 30.64 dB and can operate on RAW
PSNR (dB)

500
images of any size. In Figure 5(a), a 640×480 image

IEF
25
400
20

15
300
is taken, which is the output of the SRI module. The
200
10

5 100
image is corrupted by 30% noise density, as shown
0
0 10 20 30 40 50
Noise Density (%)
60 70 80 90
0
0 10 20 30 40 50 60
Noise Density (%)
70 80 90 in Figure 5(b), and after being processed by DIINoR
(a) Noise Density vs. P SN R (b) Noise Density vs. IEF
algorithm a noise free output image (Figure 5(c)) is
observed.
4
x 10
2.5 1
Noisy Noisy
SMF
DBSMF
0.9 SMF
DBSMF
TABLE II: Comparative reconstructed results of Lena image
2 DBA 0.8 DBA
Proposed
0.7
Proposed
corrupted with impulse noise of zero noise density
1.5 0.6
Number of False PSNR(dB) of
MSE

Algorithm
EKI

0.5

1 0.4
Detected Pixels Reconstructed Image
0.3 Luo [45] 0 No Change
0.5 0.2
Srinivasan and Ebenezer [40] 0 No Change
0.1
Crnojevic and Petrovic [49] 3238 43.38
0 0
0 10 20 30 40 50
Noise Density (%)
60 70 80 90 0 10 20 30 40 50
Noise Density (%)
60 70 80 90
Chen et al. [18] 1 74.34
Proposed DIINoR 0 No Change
(c) Noise Density vs. M SE (d) Noise Density vs. EKI

1
SMF
1
SMF
The proposed DIINoR algorithm also shows a bet-
0.9 DBSMF DBSMF

0.8
DBA
Proposed
0.9
DBA
Proposed ter performance metric for USG images corrupted
0.7

0.6
0.8
with impulse noise at various noise densities from
5% to 90% as shown in Figure 4. In high noise
SSIM

FOM

0.5 0.7

0.4

0.3
0.6
densities, the DIINoR algorithm outperforms other
0.2

0.1
0.5
methods in terms of P SN R, IEF , M SE, EKI,
0
0 10 20 30 40 50
Noise Density (%)
60 70 80 90
0.4
0 10 20 30 40 50
Noise Density (%)
60 70 80 90 SSIM and F OM parameters [4], [14], [57], [58]
(e) Noise Density vs. SSIM (f) Noise Density vs. F OM make it suitable for use in the Back-end of the USG
system. In DBSMF [36], central pixel is replaced
Fig. 4: Comparison of features of restored image in terms with the previous pixel which may be a corrupted
of P SN R, IEF , M SE, EKI, SSIM and F OM for the
pixel in worst case.
640 × 480 USG image with different noise densities using
MATLAB. The performance of the proposed DIINoR algo-
rithm has also been verified with Lena image cor-
rupted by zero (0%) noise density and comparison
results with those of different filtering algorithms
are furnished in Table II. It is observed that DIINoR
has the capability even to restore noise free image
without disturbing the uncorrupt pixel values as it
(a)
detects only the corrupted pixel first and if the pixel
is not corrupted it remains unchanged.
False detection of the corrupt image is reported
in hardware implementation by Chen et al. [18]
for removal of impulse noise using Simple Edge-
Preserved Denoising (SEPD) technique and Re-
duced SEPD (RSEPD). It is to be noted that in the
(b) PSNR: 9.27 dB (c) PSNR: 36.07 dB proposed DIINoR, the occurrence of false detection
is zero as impulse detector is activated once cor-
Fig. 5: Post-SRI image of 640×480 is cleaned by the proposed
DIINoR algorithm: (a) Original Image, (b) Image corrupted
rupted pixel is detected..
with 30% noise density (c) Image cleaned with DIINoR Comparison of computation time between differ-
algorithm algorithm. ent algorithms has been shown in Figure 6, which
shows that the proposed DIINoR algorithm con-
sumes significantly less time than AMF and DBA
 7

200 memory module. After that, alternately RAM3 and

AMF
180 [39]
DBA
RAM4 is filled by the input image data (ImageIn).
160 Proposed

140 When RAM3 is being written by ImageIn, RAM4

Execution Time (Sec)
120

100
is read by the RB module as input data and vice
80 versa. In the proposed DIINoR algorithm, 3 clock
60

40
cycles are needed to buffer nine registers (R1 to
20 R9) with image pixel values. These data are read
0
0 10 20 30 40 50 60
Noise Density (%)
70 80 90 from the three Random Access Memories (RAMs)
parallelly. Initially, from RAM1, three zero values
Fig. 6: Comparison of computational time.
are loaded those correspond to the zero-padded first
row. After that data (ImgIn) is fed to the RB from
algorithm in a specific noise density. These MAT- RAM3 and RAM2 and the W3×3 window is formed
LAB simulations clearly establish that the proposed inside the Register Bank (RB). Noise detection and
DIINoR algorithm can work on images of any size restoration of each pixel in the corrupt image are
and it can efficiently clean USG images corrupted initiated after a latency of 3 clock cycles. The data-
by random valued impulse noise. flow diagram shown in Figure 8, shows how the data
flows inside the proposed architecture with respect
IV. VLSI I MPLEMENTATION OF THE P ROPOSED to time. A brief description of each block of DIINoR
A LGORITHM architecture for removing impulse noise from the
image is presented below.
MODE
ID
Delay FP
CPCr Comparator FPC
3X3 Window(W) MC

Timescale T = Critical path delay

Initial latency <T 3T <T

Fig. 8: Inter-module data-flow in the proposed architecture of

DIINoR.

Fig. 7: Block diagram of the VLSI architecture of DIINoR. 8x640

8x640
The block diagram of VLSI architecture of the
proposed DIINoR algorithm is shown in Figure 7.
The maximum image size to be processed is taken
as 640 × 480, which can be altered according to
Fig. 9: Architecture of register bank in DIINoR.
the specifications of the USG system. The main
building blocks of the design consist of Register
Bank (RB), Impulse Detector (ID), Corrupted Pixel
Counter (CPCr), Final Pixel Computation (FPC), A. Register Bank (RB)
Median Calculator (MC) and Controller modules. The architecture of the RB to process the image
Four Random Access Memories (RAM1, RAM2, corrupted with fixed or random valued impulse
RAM3 and RAM4) of size 642 × 8 bits have been noise is shown in Figure 9. The register bank com-
used for storing the first three rows of the image. prises nine registers, R1 to R9, those are connected
RAM3 and RAM4 are arranged in a ping-pong serially storing the pixel values, P (i − 1, j − 1) to
manner and at a time only one of them is read by the P (i + 1, j + 1) of the current processing window
RB module for input image data. As zero-padding is W3×3 . Denoising process starts when the last pixel
used in the algorithm, RAM1 is not loaded initially. value P (i + 1, j + 1) is buffered into R9. Current
The first row of valid data is filled in the RAM2 processing pixel P (i, j) stored in register R5 is
 8

used to detect the noisy pixel and the type of R9 R8 R7 R6 R4 R3 R2 R1

corruption caused by either fixed or random noise G3 G3 G3 G3 G3 G3 G3 G3

PNV
SNV
PNV

PNV

PNV

PNV

PNV

PNV

PNV
SNN

SNV

SNV

SNV

SNV

SNV

SNV
is also confirmed with the help of ID block. The
remaining pixels stored in registers are then used 4:1 Mux 4:1 Mux 4:1 Mux 4:1 Mux 4:1 Mux 4:1 Mux 4:1 Mux 4:1 Mux

PN
SN
simultaneously by CP Cr block to determine the B
CI
A B
CI
A B
CI
A

number of corrupt pixels having the same value as SM[1:0] SM[1:0] SM[1:0]

that of P (i, j). The replacement of the corrupt pixel B

CI[1:0]
A

P (i, j) at register R5 with either median value or SM[3:0]

CPC
previous pixel value P (i, j − 1) is performed by
Fig. 11: Architecture for Corrupted Pixel Counter (CPCr).
F P C block.
After the completion of denoising process for
P (i, j), each register shifts its value to read two the output PN of ID is 1. The MOD variable is
new pixel values from RAM1 and RAM2 and one used in ID to determine the fixed and random valued
input pixel through ImgIn from RAM3, followed impulse noise.
by buffering of them into registers R3, R6 and
R9 respectively. Therefore, during the restoration of
C. Corrupted Pixel Counter (CPCr)
next processing pixel P (i, j + 1), the pixel values
P (i, j − 1) and P (i + 1, j − 1) from registers R4 The value to be restored to the corrupted process-
and R7 are written back into RAM1 and RAM2 ing pixel P (i, j) is determined based on the value
respectively. of CPC in the processing window. This decision, as
described in Algorithm 1, is taken based on the total
count of corrupt pixels, including the center pixel
B. Impulse Detector (ID) P (i, j), in the processing window. During hardware
Figure 10(a) presents the architecture for impulse implementation, P (i, j) is not counted in the CPC
detector (ID) designed to analyze the current pro- value, as it has already been detected in the ID
cessing pixel P (i, j). Logic blocks G1, G2 and module whether P (i, j) is corrupt or not. For this
G3, shown in Figures 10(b), 10(c) and 10(d) re- reason, CP C < 4 and CP C == 6 conditions are
spectively, are designed to determine the gray level checked in place of CP C < 5 and CP C == 7, as
value of ”255” or ”235-255” and ”0” or ”0-31” for described in Algorithm 1. Therefore, only 8 pixels
impulse noise detection respectively. The type of need to be checked for noise detection and the center
noise is determined from the outputs SNF, PNF, pixel is used as a reference for detecting the same
SNV and PNV of G1, G2 and G3 respectively. type of noise or presence of homogeneity in the rest
Image pixel affected by salt noise is determined of the window.
from the pixel value of the register R5 for which The architecture for Corrupted Pixel Counter
SN of ID is 1. On the other hand, the image pixel (CPCr) is shown in Figure 11. All the registers
is considered to be corrupted with pepper noise if in RB, except R5 simultaneously perform bit-wise
AND and NOR operations for detecting the salt and
pepper noise. The type of noise corruption of the
SNV SNF PNV PNF SNS SNF PNP PNF R5[0] R5[0]
G1
MOD 0 1 0 1 0 1 0 1
R5[1]
R5[2]
R5[1]
R5[2]
G2
current processing pixel stored in R5 is detected
SN PN
R5[3]
R5[4]
R5[3]
R5[4]
by the two outputs SN and PN of the previous
R5[5]
R5[6]
SNF
R5[5]
R5[6] PNF block vide Figure 10(a). SN and PN are used as
R5[7]
ND R5[7]
selection lines for the set of 8 multiplexers (4:1
(a) Architecture for ID. (b) Logic block G1. (c) Logic block G2. MUXs) for detecting the same type of noise as R5
R5[2]
R5[3]
G3 in the rest of the pixels in the processing window.
R5[1]

R5[0]
SNV
The outputs of the MUXs are used as the inputs
R5[5] SNS
R5[6]
R5[7]
R5[4]
PNP to an adder-bank (4 adders), in the architecture for
PNV
calculating the value of CP C. First condition for
(d) Logic block G3. impulse noise corruption is ND =1. For fixed valued
impulse noise, pixels corrupted with salt noise and
Fig. 10: Architecture for salt noise and pepper noise detection. pepper noise are counted when [(SN,PN)=(1,0)] and
 9

[(SN,PN) = (0,1)], respectively and For random Register

valued impulse noise, corrupted pixels are counted

when [(SN,PN)=(0,0)] and [(SN,PN)=(1,1)], respec-
tively.
Register
D. Decision Block (DB)
The decision for replacing the centre pixel P (i, j) Fig. 13: Architecture for sorting three numbers.
with suitable value is generated by Decision Block
(DB). A simplified boolean expression is imple- X0 8
8 R1
Max1
Mid1
8
8 C1
Max
X1
mented to realize the DB, as shown in Figure 12. X2
8 S3 Min1 8 S3

If the two most significant bits (MSBs) of CPC i.e

Max2
8 8 8
X3
8 R2 Mid2 8 C2 Mid 8 RD
X4
8 S3 8 S3 S3
CPC[3] and CPC[2] as zero, CPC is less than 4 X5
Min2 8
8

Max3
Median
(CP C < 4) and the output of the DB is logic high X6
X7
8
8 R3 Mid3
8
8 C3
8 S3 Min3 8 S3 Min
(RP Sel = 1) otherwise logic low (RP Sel = 0). X8

When CPC[2] and CPC[1] are logic high with Fig. 14: Architecture for median calculation in DIINoR.
CPC[0] in the logic low state, it ensures that CPC
is equal to 6 and the P P Sel output of DB is made
These six combinations are given as inputs to the
high.
24-bit 6:1 MUX, as shown in Figure 13. Three
E. Median Calculator (MC)
selection lines of this MUX are the three binary
outputs of three comparators namely CMP1, CMP2
Median value calculation is performed when each and CMP3 used to determine the sorted output (SO).
time RP Sel = 1. Three steps are followed sequen- Generally, sorting of three numbers is performed by
tially to calculate the median value of 9 pixels stored connecting two comparators serially. A two-stage
in RB. The first step is the sorting of rows followed comparator based approach increases the critical
by sorting of columns. Finally, in the third step right path delay, which can be improved by using three
diagonal sorting of 3 pixels [40] is performed to get single stage comparators (CMP1, CMP2 and CMP3)
the middle (Mid) value which is the median of 9 parallelly, as shown in the proposed architecture in
pixels of the W3×3 processing window. The Sorting Figure 13. Therefore, seven S3 blocks are required
Block (S3) is the primary building block, as shown to calculate the median value of current processing
in Figure 13, of the Median Calculator (MC). window W3×3 . The architecture, shown in Figure
TABLE III: Truth table for sorting three numbers 14, is implemented for calculating the median value
Input Output of the Comparators Select Line of W3×3 in DIINoR architecture.
Combi- CMP1 CMP2 CMP3 Combinations
nation agb alb bgc blc agc alc agb bgc agc
A>B>C 1 0 1 0 1 0 1 1 1
A>C>B 1 0 0 1 1 0 1 0 1 F. Final Pixel Computation (FPC)
B>A>C 0 1 1 0 1 0 0 1 1
B>C>A 0 1 1 0 0 1 The final pixel (F P ) value for each processing-
0 1 0
C>A>B 1 0 0 1 0 1 1 0 0
C>B>A 0 1 0 1 0 1
pixel (center pixel R5) is selected depending upon
0 0 0
the value of Psel, ND and RPSel, as shown in
To determine the median value, a look-up table Figure 12. For N D = 0, Final Pixel (FP) remains
(LUT) based sorting combinations for three num- unchanged (F P = P (i, j)); otherwise FP is se-
bers are presented in truth table vide Table III. lected depending on the RP Sel and P Sel values.
The processing pixel is replaced with the median
R5
8
R4
8
value (P (i, j) = M edian(W3×3 )) for RP Sel = 1.
CPC[1]
CPC[2]
CPC[0]
PSel 2:1 MUX
8-bit If RP Sel = 0 and P Sel = 0, the processing
Median 8 8
CPC[2]
CPC[3]
RPSel 2:1 MUX
8-bit
pixel is replaced by the left neighborhood value
R5 8
2:1 MUX
8 RP (P (i, j) = P (i, j − 1)). Otherwise the FP value
ND
8-bit
8
remains the same (P (i, j) = P (i, j)) if RP Sel = 0
FP
and P Sel = 1 as the centre pixel in the processing
Fig. 12: Architecture for Final Pixel Computation (FPC). window. The architecture is shown in Figure 12.
 10

G. Controller TABLE V: Features of different denoising hardware imple-

mentations in Altera platform
The controller module is designed to control the
overall operation of noise removal architecture. The [18] [19] [22] DIINoR
Work
data read and write operations in RB are governed Image
512 × 512 640 × 480 512 × 512 512 × 512
Size
by the controller. The controller guides the schedule Filtering
SEPD CMF DTBDM DIINoR
for writing into and reading from memories RAM1, Algorithm
PSNR
RAM2 and RAM3. In the architecture for the pro- (dB)
42.5 37.33 38.22 42.93

posed DIINoR, an input reset signal initiates the Device

STX CycII STX STX CycII
(Altera)
process of impulse noise removal by activating the Logic
709 513 1743 210 215
controller which directs all the steps from taking in Cells
Maximum
a noisy image, ImageIn to giving out a restored 173.9 129.58 144.11 167.9 323.56
Frequency
image, ImageOut. The controller uses 42 flip-flops MHz MHz MHz MHz MHz
**STX=STRATIX and CycII=CycloneII; PSNR @ 10% ND
and 67 look-up tables and runs at 507 MHz, when ND= Noise Density
implemented in Xilinx Virtex-7 device.
TABLE VI: Features of different denoising hardware imple-
V. H ARDWARE I MPLEMENTATION R ESULTS AND mentations in Xilinx platform
D ISCUSSIONS
[24] DIINoR [21] [20] DIINoR
The proposed architecture has been implemented Work
FPGA
in XC7VX330T-FFG1761 VIRTEX-7 device and Device
XC5VLX50T XC3S500E
the maximum operating frequency and device uti- Image
512 × 512 128 × 128 512 × 512
Size
lization after post place and route simulation using Window
5×5 3×3 5×5 3×3 3×3
Xilinx ISE have been reported in Table IV. The Size
Filtering
total dynamic power consumption of DIINoR ar- Algorithm
AMF DIINoR EEPA EPA DIINoR
chitecture is 178.52 mW at an operating frequency PSNR (dB)
38.4* 42.93 42.04 42.06 42.93
@ 10% ND
of 100 MHz as per Xilinx XPower Analyzer. The Number of
1352 217 14371 3705 359
architecture has also been implemented using UMC Slices
Number of
90 nm CMOS process in Synopsys Design Compiler Flip Flops
192 240 8710 2251 240
where 110 mW power is consumed at a clock Number of
2504 471 28262 7242 713
LUTs
frequency of 100 MHz. The total gate count of Maximum 253.54 42.475 40.97 77.87
-
DIINoR architecture is 2.4K gates (NAND2) along Frequency MHz MHz MHz MHz
*PSNR @ 5% ND; ND= Noise Density
with 3 memory buffers of size 642 × 8 bits each.
TABLE IV: Synthesis report of the proposed architecture
(Device Selected: XC7VX330T - FFG1761 VIRTEX-7)
performance in case of PSNR, hardware utilization
Proposed Architecture : DIINoR
and speed. In the median calculation, use of 3
Max. Operating Frequency: 357.96 MHz
Resource Available Utilized Utilization comparator-MUX stage (Figures 13 and 14), makes
No. of Slice Registers 408000 252 1% the proposed architecture faster than other designed
No. of Slice LUTs 204000 464 1%
No. of 18Kb BRAM 1500 2 1% [18], [21], [24] those used 6 comparators to sort the
values for median calculation. The comparison re-
The proposed DIINoR has also been implemented sults establish the superiority of the proposed algo-
in STRATIX and CycloneII Altera FPGA platform rithm than those of existing works. To compare with
and compared with other reported in Table V. other existing architectures, as shown in Table VI,
The simple edge-preserved denoising technique [18] The proposed DIINoR has also been implemented in
has similar performance as the proposed DIINoR Virtex-5 and Spartan-3 FPGA. The results of PSNR,
algorithm, but it consumes more logic cells (more area consumption and maximum frequency show
than three times) than the proposed architecture. In that the proposed algorithm performs better than the
comparison with the DIINoR algorithm, Decision AMF [24], Edge Preserving Algorithm (EPA) [20]
Tree Based Denoising Method (DTBDM) [22] and and Enhanced Edge Preserving Algorithm (EEPA)
Conditional Median Filter (CMF) [19] have lower [21].
 11

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