Introduction to Electronics Engineering - 22ESC143/ 243

Module- 1: Power Supplies

 The block diagram of a d.c. power supply is shown in Fig-1.

Figure-1.1 Block diagram of a d.c. power supply

 The mains input is relatively high voltage, a step-down transformer ofappropriate turns
ratio is used to convert this to alow voltage.
 The a.c. output from the transformersecondary is then rectified using conventionalsilicon
rectifier diodes to producean unsmoothed (or pulsating d.c.) output.
 This is then smoothed andfiltered before being applied to a circuit which willregulate (or
stabilize) the output voltage so thatit remains relatively constant in spite of variationsin
both load current and incoming mains voltage.
 Fig. 1.2 shows the realization of the block diagram of a d.c. power supply using the
electronic components in Fig. 1.1

Figure 1.2 Block diagram of a d.c. power supply showing principal components
 The iron-cored step-down transformerfeeds a rectifier arrangement (often based ona
bridge circuit).
 The output of the rectifier isthen applied to a high-value reservoir capacitor.This
capacitor stores a considerable amount ofcharge and is being constantly topped-up by
therectifier arrangement. The capacitor also helps tosmooth out the voltage pulses
produced by therectifier.
 Finally, a stabilizing circuit (often basedon a series transistor regulator and a
zenerdiode voltage reference) provides a constantoutput voltage. .

1. Rectifiers
 Rectifiers are the circuits which converts a.c voltage to pulsating d.c voltage. Rectifiers
can be grouped into two types:
1. Half-wave Rectifier 2. Full-wave Rectifier
 The simplest form of rectifier circuit makes use of a single diode and, since it operates on
only either positive or negative half-cycles of the supply, it is known as a half-wave
rectifier. Fig. 1.3 shows a simple half- wave rectifier circuit.

Figure 1.3 A simple half-wave rectifier circuit

22ESC143/243-Intro. to Electronics Engg. 1

 The mains voltage (220 to 240V) is applied to the primary of a step-down transformer
(T1). The secondary of T1 steps down the 240 V r.m.s. to 12 V r.m.s.
 Diode D1 will only allow the current to flow in the direction shown (i.e. from cathode to
anode). D1 will be forward biased during each positive half-cycle and will effectively
behave like a closed switch as shown in Fig. 1.4.

Figure 1.4 Half-wave rectifier circuit with D1 conducting (positive-going half- cycles of secondary voltage)

 When the circuit current tries to flow in the opposite direction, the voltage bias across the
diode will be reversed, causing the diode to act like an open switch as shown in Fig. 1.5.

Figure 1.5 half-wave rectifier with D1 not conducting (negative-going half- cycles of secondary voltage)

 During positive half cycle, the diode D1 is forward biased, thus the current flows through
the load RL and voltage is developed across it.
 During negative half cycle, the diode D1 is reverse biased, thus there will be no flow of
current through the load RL, thereby the output voltage is zero.
 The input and output voltage waveform of a half-wave rectifier is shown in Fig. 1.6.

Figure 1.6 The input and output voltage waveform of a half-wave rectifier
 The relation between turns ratio and voltage of the primary and secondary of the
transformer is given by:

 The peak voltage output from the transformer’s secondary winding will

22ESC143/243-Intro. to Electronics Engg. 2

1.1. Half-Wave Rectifier:
 A half wave rectifier is defined as a type of
rectifier that only allows one half-cycle of an
AC voltage waveform to pass, blocking the other
half-cycle.
 Half-wave rectifiers are used to convert AC voltage
to DC voltage, and only require a single diode to
construct as in fig-1.
Fig-1.1

 Operation:
 During positive half cycle of the AC sine wave, the diode is forward biased as the
anode is positive with respect to the cathode resulting in current flowing through the
diode.
 Since the load is resistive, the current flowing in the load resistor is therefore
proportional to the voltage, and the voltage across the load resistor will therefore be
the same as the supply voltage, Vi (minus Vƒ(threshold voltage)), that is the “DC”
voltage across the load is sinusoidal for the first half cycle only so vo = vias in fig-1.2

Fig-1.2

 During negativehalf cycle of the AC sinusoidal input waveform, the diode is reverse
biased as the anode is negative with respect to the cathode. Therefore, no current
flows through the diode or circuit. Then in the negative half cycle of the supply, no
current flows in the load resistor as no voltage appears across it therefore, vo = 0 as in

Fig-1.2
 The input viand the output voare sketched together in below fig-1.3

22ESC143/243-Intro. to Electronics Engg. 3

 Fig-1.3

Average value of Half Wave rectifier:

1
1 1 ⁄ 𝑇
𝑣 −𝑐𝑜𝑠
𝑡 𝑇⁄
𝑣𝑚 𝑠𝑖𝑛𝑡 𝑑𝑡 + 0 𝑑𝑡 = { }
2
𝑉𝑑𝑐 ∫0 𝑉 ∫0 𝑣𝑚𝑠𝑖𝑛𝑡
2
𝑇
= ∫0 ∫𝑇
𝑇 𝑇 𝑇 0
𝑑𝑡 = 𝑑𝑡 =

⁄2

𝑣𝑚 2𝜋 𝑣𝑚
𝑉 = 𝑇 } × 𝑇 {−𝑐𝑜(𝜋) + 𝑐𝑜𝑠0}
{−𝑐𝑜𝑠(
𝑑𝑐
× )+ =
𝑇 2𝜋
𝑇 𝑐𝑜𝑠02 𝑇


𝑣𝑚
𝑉 = {−𝑐𝑜𝑠(𝜋) + 𝑐𝑜𝑠0} = {1 + 𝒗𝒎
𝑚
= = 𝟎. 𝟑𝟏𝟖𝟑𝒗
1} → 𝑽
𝑑𝑐
2𝜋 2 𝒅𝒄
𝝅 𝒎
𝑇 𝜋

RMS value of Half Wave rectifier

1 𝑇
1 ∫ 𝑇𝑉2 𝑑𝑡 1 ∫ 𝑇𝑉2 𝑑𝑡 1 ∫ ⁄2𝑣2𝑚 𝑠𝑖𝑛2𝑡 𝑑𝑡
𝑇
𝑉𝑟𝑚𝑠 = ∫ 𝑉2 𝑑𝑡 →
= =
√ 𝑉2𝑟𝑚𝑠 = 𝑇 0
𝑇 0 𝑇 0 𝑇 0

=𝑣 =∫ 2𝑠𝑖𝑛2𝑡 𝑑𝑡 𝑣 (1 − (𝑡 𝑠𝑖𝑛2 ) ⁄2
𝑇⁄ 𝑇⁄2
𝑑𝑡
𝑇
𝑉
2𝑚 𝑚 𝑣 𝑚
2
2 ∫ 𝑐𝑜𝑠2𝑡) = 2 − 𝜔𝑡
𝑟𝑚
𝑠 𝑇 0 𝑇 0 2𝑇 2𝜔 0

𝑠𝑖𝑛 2
× )
𝑇
𝑣2 𝑣 𝑇 𝑣2 𝒗
𝑇 (
4𝜋 2
𝑠𝑖(0)
= { −0 } = × →
𝑚 𝑚
𝑉 + 𝑽
𝑚
𝑇
2 − = =
𝒎
2
𝑟𝑚
𝑠 2𝑇 2 2 2 2𝑇 2 4 𝒓𝒎𝒔
𝟐
𝜔

Ripple Factor of Half Wave rectifier

The measure of ripples (pulsating components) present in the output is obtained by a
factor called ripple factor denoted by . Smaller the ripple factor closer is the output toa pure
dc.For HWR,  is
22ESC143/243-Intro. to Electronics Engg. 4
 𝑉
2
𝑣𝑚 2 2
√ − 1 = (𝑣 ⁄ ) − 1 → 𝜸 = 𝟏. 𝟐𝟏
√
𝛾 =
𝑟𝑚𝑠
) (
𝑉𝑎𝑣𝑔 𝑚⁄
𝜋

Peak Inverse Voltage (PIV):

It is the peak voltage across the diode in reverse biased condition when diode is not
conducting.
For HWR, PIV =Vm

22ESC143/243-Intro. to Electronics Engg. 5

1.2. FullWave Rectifier:
 A full wave rectifier is a type of rectifier which converts both half cycles of the AC signal
into pulsating DC signal.The full wave rectifier is further classified into two types: Center
Tapped Full Wave Rectifier and Full Wave Bridge Rectifier.

1.2.1. Center Tapped Full Wave Rectifier (Bi-phase rectifier)

 A center tapped full wave rectifier is a type of rectifier which uses a center tapped
transformer and two diodes to convert the complete AC signal into DC signal.

Fig-1.2.1.1

 During the positive half cycle, current flows only in the upper part of the circuit while
the lower part of the circuit carry no current to the load because the diode D 2 is
reverse biased as in below fig. Thus, during the positive half cycle of the input AC
signal, only diode D1 allows electric current while diode D2 does not allow electric
current.

Fig-1.2.1.2
 During the negative half cycle, current flows only in the lower part of the circuit while
the upper part of the circuit carry no current to the load because the diode D1 is
reverse biasedas in below fig. Thus, during the negative half cycle of the input AC
signal, only diode D2 allows electric current while diode D1 does not allow electric
current.

Fig-1.2.1.3
 Thus, the diode D1 allows electric current during the positive half cycle and diode
D2 allows electric current during the negative half cycle of the input AC signal. As a

22ESC143/243-Intro. to Electronics Engg. 6

 result, both half cycles (positive and negative) of the input AC signal are allowed. So the
output DC voltage is almost equal to the input AC voltage.

1.2.2. Full Wave Bridge Rectifier

 This type of single phase rectifier uses four individual rectifying diodes connected
in a closed loop “bridge” configuration to produce the desired output as shown in
below fig-11.2.1

Fig-1.2.2.1
 During the period t =0 to T/2 the polarity of the input is as shown in below Fig-
1.2.2.2. The resulting polarities across the ideal diodes are also shown. Diodes D2 and
D3 are conducting, whereas D1 and D4 are in the “off” state. The net result is the
configuration as in of fig with its indicated current and polarity across R. Since the
diodes are ideal, the load voltage isvo= vi, as shown in the same figure.

Fig-1.2.2.2
 For the negative region of the input the conducting diodes are D1 and D4, resulting in
the configuration of fig-1.2.2.3. The important result is that the polarity across the
load resistor R is the same as in fig-1.2.2.2, establishing a second positive pulse, as
shown in fig-1.2.2.4. Overone full cycle the input and output voltages will appear as
shown in fig-1.2.2.4.

22ESC143/243-Intro. to Electronics Engg. 7

 Fig-1.2.2.3

Fig-1.2.2.4

𝑇 value of Full Wave

Average 𝑇
rectifier 𝑇
𝑇
𝑉 1 1 𝑑𝑡 1= 2𝑣𝑚= −𝑐𝑜𝑠𝜔𝑡
∫ 𝑣= ∫ 𝑉 𝑑𝑡 = 𝑠𝑖𝑛𝜔𝑡
∫ 𝑣 2 𝑠𝑖𝑛𝜔𝑡 𝑑𝑡 { }2
2

𝑑𝑐
𝑇 𝑇 0 𝑇 𝑇 𝜔
� �
0 0
� �
0

−2𝑣 −2𝑣𝑚 −2𝑣

{𝑐𝑜(𝜋
2𝜋 } 𝑚 ) − 𝑐𝑜𝑠0} = × 𝑇 {−1 − 1}
𝑉 = 𝑚
{𝑐𝑜𝑠(𝑇
× ) − 𝑐𝑜𝑠0 𝜔
𝑑𝑐
𝜔 𝑇 2𝜋
𝑇
= 2
𝑇 𝑇
2𝑣𝑚
𝑉𝑑𝑐 → 𝑽𝒅𝒄 = 𝟎. 𝟔𝟑𝟔𝒗𝒎
= 𝜋

RMS value of Full Wave rectifier

𝑉𝑟 1 𝑇⁄
2𝑣 𝑚 𝑇⁄
𝑉2 𝑑𝑡 2 ∫
𝑇⁄
∫ 2𝑉2 𝑑𝑡 2 ∫ ∫
𝑇⁄
=
2
𝑠𝑖𝑛2𝜔𝑡 𝑑𝑡 𝑠𝑖𝑛2𝜔𝑡 𝑑𝑡
2
√
2
=
𝑇 =
𝑚𝑠
2

= 0
0 𝑇 0 𝑣2𝑚 �
𝑇 0 �

2𝑣
𝑇⁄
𝑉 2 (1 − 𝑑𝑡 𝑣 (𝑡 𝑠𝑖𝑛2 ) ⁄2
𝑚 𝑇
2
= 𝑐𝑜𝑠2𝜔𝑡) = 2 − 𝜔𝑡
2

𝑚 ∫
𝑟𝑚
𝑠 𝑇 0 2 𝑇 2𝜔 0

𝑣2 𝑠𝑖𝑛 ×𝑇 𝑠𝑖(0) 𝑣2𝑚 × 𝑇

𝑉 = − { −0 } 𝑣 → = 𝒗𝒎
(
4𝜋 𝑚
2 ) + = = 𝑽
𝑇 2 2
𝑟𝑚
𝑠 𝑇 2 2 2 𝑇 2
𝒓𝒎
𝒔 √𝟐
𝜔 𝜔 2

Ripple Factor of Full Wave rectifier

22ESC143/243-Intro. to Electronics Engg. 8

 The measure of ripples (pulsating components) present in the output is obtained by a
factor called ripple factor denoted by. Smaller the ripple factor closer is the output toa pure
dc.

𝑣𝑚
For FWR,  is
2 2
⁄
𝛾= − 1 = √( − 1 → 𝜸 = 𝟎. 𝟒8
𝑉𝑟𝑚𝑠
√( )
𝑉𝑎𝑣𝑔 √2)

2𝑣 ⁄𝜋
𝑚

22ESC143/243-Intro. to Electronics Engg. 9

Peak Inverse Voltage (PIV):
It is the peak voltage across the diode in reverse biased condition when diode is not
conducting.
For FWR, PIV =2Vm

Other useful Formulae:

1. Power consumed by the load or dc output power 𝐏𝐝𝐜

= 𝐈𝐝𝐜𝟐 × 𝐑𝐋
𝟐 𝑉𝑑𝑐
𝐕𝐝𝐜
= 𝑊ℎ𝑒𝑟𝑒,
𝐑 𝐼
𝑑𝑐 =
𝑅𝐿
𝐋

2. Power input to the load or AC input power 𝐏𝐚𝐜 = 𝐈𝐫𝐦𝐬𝟐 × (𝐫𝐟 + 𝐑𝐋)
𝟐
𝐕
= (𝐫𝐟𝐫𝐦𝐬
+𝐑𝐋)
𝑉𝑟𝑚𝑠
𝑊ℎ𝑒𝑟𝑒, 𝐼𝑟𝑚𝑠 = & 𝑟𝑓 𝑖𝑠 𝑓𝑜𝑟𝑤𝑎𝑟𝑑
𝑟𝑒𝑠𝑖𝑠𝑡𝑎𝑛𝑐𝑒 𝑜𝑓 𝑑𝑖𝑜𝑑𝑒
𝑅
𝐿

3. Rectifier efficiency is defined as the ratio of the DC output power to the AC input power.

𝐄𝐟𝐟𝐢𝐜𝐢𝐞𝐧𝐜𝐲,  𝐝𝐜 𝐨𝐮𝐭𝐩𝐮𝐭 𝐏𝐝𝐜

%= =
𝐩𝐨𝐰𝐞𝐫 𝐏𝐚𝐜
𝐚𝐜 𝐢𝐧𝐩𝐮𝐭
𝐩𝐨𝐰𝐞𝐫

2. Reservoir and smoothing circuits

 Fig. 2.1 shows a simple half-wave rectifier circuit with reservoir capacitor.

Fig-2.1A simple half-wave rectifier circuit with reservoir capacitor

 The capacitor, C1, has been added to ensure that the output voltage remains at, or near,
the peak voltage even when the diode is not conducting.
 When the primary voltage is first applied to T1, the first positive half- cycle output from
the secondary will charge C1 to the peak value seen across RL.
 Hence C1 charges to 16.3 V at the peak of the positive half-cycle. Because C1 and R L are
in parallel, the voltage across RL will be the same as that across C1.
 The time required for C1 to charge to the maximum (peak) level is determined by the
charging circuit time constant (the series resistance multiplied by the capacitance value).
 In this circuit, the series resistance comprises the secondary winding resistance together
with the forward resistance of the diode and the (minimal) resistance of the wiring and
connections. Hence C1 charges very rapidly as soon as D1 starts to conduct.
22ESC143/243-Intro. to Electronics Engg. 10
 The time required for C1 to discharge is, in contrast, very much greater. The discharge
time constant is determined by the capacitance value and the load resistance, R L. In
practice, RL is very much larger than the resistance of the secondary circuit and hence C1

22ESC143/243-Intro. to Electronics Engg. 11

takes an appreciable time to discharge. During this time, D1 will be reverse biased and will
thus be held in its non-conducting state.
 As a consequence, the only discharge path for C1 is through R L. C1 is referred to as a
reservoir capacitor. It stores charge during the positive half-cycles of secondary voltage
and releases it during the negative half- cycles.
 The circuit of Fig-2.1 is thus able to maintain a reasonably constant output voltage across
RL. Even so, C1 will discharge by a small amount during the negative half-cycle periods
from the transformer secondary.
 Fig-2.2 shows the secondary voltage waveform together with the voltage developed
across RL with and without C1 present.

Fig-2.2: A simple half-wave rectifier circuit with reservoir capacitor

 This gives rise to a small variation in the d.c. output voltage (known as ripple). Since
ripple is undesirable an additional precaution has to be taken to reduce it.
 One obvious method of reducing the amplitude of the ripple is that of simply increasing
the discharge time constant. This can be achieved either by increasing the value of C1 or
by increasing the resistance value of RL.
 Fig-2.4 shows a further refinement of the simple power supply circuit.

Fig-2.4: Half-wave rectifier circuit with R–C smoothing filter

 This circuit employs two additional components, R1 and C1, which act as a filter to
remove the ripple.
 The value of C1 is chosen so that the component exhibits a negligible reactance at the
ripple frequency (50 Hz for a half-wave rectifier or 100 Hz for a full-wave rectifier).
 In effect, R1 and C1 act like a potential divider. The amount of ripple is reduced by an
approximate factor equal to:

𝑋𝐶

√𝑅2 + 𝑋𝐶2

3. Voltage regulators

22ESC143/243-Intro. to Electronics Engg. 12

 Voltage regulator is a circuit that maintains a constant d.c output voltage irrespective of
variations in the input line voltage or in the load.
 Voltage regulator is one of the important applications of a Zener diode.
 A simple voltage regulator is shown in Fig-3.1

Fig-3.1: A simple shunt Zener voltage regulator

 RS is included to limit the zener current to a safe value when the load is disconnected.
 When a load (RL) is connected, the zener current (I Z) will fall as current is diverted into
the load resistance (it is usual to allow a minimum current of 2 mA to 5 mA in order to
ensure that the diode regulates).
 The output voltage (VZ) will remain at the Zener voltage until regulation fails at the point
at which the potential divider formed by RS and RL produces a lower output voltage that
is less than VZ.

𝑅𝐿
 The ratio of RS to RL is thus important. Regulated output VZ is given by:

𝑉𝑍 = 𝑉𝐼𝑁 ×
�𝐿 + 𝑅𝑆
�where VIN is the unregulated input voltage.

4. Output resistance and voltage regulation

 In a perfect power supply, the output voltage would remain constant regardless of the
current taken by the load.
 Output resistance Rout is defined as the change in output voltage divided by the
corresponding change in output current and hence is given by
𝑐ℎ𝑎𝑛𝑔𝑒 𝑖𝑛 𝑜𝑢𝑡𝑝𝑢𝑡 ∆𝑉𝑜𝑢𝑡
𝑣𝑜𝑙𝑡𝑎𝑔𝑒
𝑅𝑜𝑢𝑡 = =
𝑐ℎ𝑎𝑛𝑔𝑒 𝑖𝑛 𝑜𝑢𝑡𝑝𝑢𝑡 𝑐𝑢𝑟𝑟𝑒𝑛𝑡 𝑜𝑢∆𝐼
𝑡
where△𝐼𝑜𝑢𝑡 represents a small change in output (load) current and △𝑉𝑜𝑢𝑡represents a
corresponding small change in output voltage.

 The regulation of a power supply is given by the relationship:

𝑐ℎ𝑎𝑛𝑔𝑒 𝑖𝑛 𝑜𝑢𝑡𝑝𝑢𝑡 𝑣𝑜𝑙𝑡𝑎𝑔𝑒
𝑅𝑒𝑔𝑢𝑙𝑎𝑡𝑖𝑜𝑛 = × 100
𝑐ℎ𝑎𝑛𝑔𝑒 𝑖𝑛 𝑙𝑖𝑛𝑒 (𝑖𝑢𝑡𝑝𝑢𝑡) 𝑣𝑜𝑙𝑡𝑎𝑔𝑒
 Ideally, the value of regulation should be very small.Simple shunt zener diode regulators
of the type shown in Fig. 1.17 are capable of producing values of regulation of 5% to
10%.
 More sophisticated circuits based on discrete components produce values of between 1%
and 5% and integrated circuit regulators often provide values of 1% or less.

Voltage multipliers
 By adding a second diode and capacitor, the output of the simple half- wave rectifier can
be increased. A voltage doubler using this technique is shown in Fig. 1.19.
22ESC143/243-Intro. to Electronics Engg. 13
 Figure 1.19 A voltage doubler
 In this arrangement C1 will charge to the positive peak secondary voltage while C2 will
charge to the negative peak secondary voltage.
 Since the output is taken from C1 and C2 connected in series the resulting output voltage
is twice that produced by one diode alone.
 The voltage doubler can be extended to produce higher voltages using the cascade
arrangement shown in Fig. 1.20.

Figure 1.20 A voltage Tripler

 Here C1 charges to the positive peak secondary voltage, while C2 and C3 charge to twice
the positive peak secondary voltage.
 The result is that the output voltage is the sum of the voltages across C1 and C3 which is
three times the voltage that would be produced by a single diode.
 The ladder arrangement shown in Fig. 1.18 can be easily extended to provide even higher
voltages but the efficiency of the circuit becomes increasingly impaired and high-order
voltage multipliers of this type are only suitable for providing relatively small currents.

Numerical:
1. An AC supply of 230V is applied to HWR through a transformer of turns ratio 10:1. Find
a) dc output voltage and b) Peak Inverse Voltage (PIV). Assume ideal diode
Soln.:
The given 230V is rms voltage at primary denoted by Vp(rms) then Maximum primary voltage,
Vp(m) = √2 × Vp(rms) = √2 × 230 = 325.26𝑉

Vp(m) Np
Maximum secondary voltage Vs(m)is calculated as
p

Vs(m) Ns
= ⇒ Vs(m) = Vp(m) ×
Ns N
22ESC143/243-Intro. to Electronics Engg. 14
 1
∴ Vs(m) =
325.26 ×
= 𝟑𝟐.
10
𝟓𝟐𝟔𝐕

22ESC143/243-Intro. to Electronics Engg. 15

1.
DC output voltage Vdc=0.3183Vs(m)= 0.3183 X 32.526=10.353V
2.
PIV of HWR = the maximum value of the secondary voltage= Vs(m)=32.526V

2. In a HWR the input voltage is 230V and transformer ratio is 2:1. Determine the maximum
and Average values of power delivered to the load. Assume RL=200Ω
Soln.:
The given 230V is rms voltage at primary denoted by Vp(rms) then Maximum primary voltage,
Vp(m) = √2 × Vp(rms) = √2 × 230 = 325.26𝑉

Vp(m) Np 1
Maximum secondary voltage Vs(m)is

Vs(m) ∴ Vs(m) = 325.26 × = 𝟏𝟔𝟐. 𝟔𝟑𝐕

Ns 2
= ⇒ Vs(m) = Vp(m) ×
Ns N
p

(0.3183 × 162.63)2
2. Average value of power delivered to the load
(0.3183
Pdc =
Vs(m))2= 200 = 13.398𝑊
RL

3. A FWR has a load of 1kΩ. The AC voltage applied is 200-0-200V. Calculate a) dc voltage
b) dc current c) ripple voltage. Assume ideal diodes. Draw the circuit

a)Vdc = V0.636 ×127.2

vm = 0.636 × 200 = 127.2V
Soln:

b) I = d𝔀 = = 127.2mA
1×103
dc RL
vm 2 200 2
c) γ = √(2v⁄ √2) − 1 = √(
⁄ √2
) − 1 = 0.48
⁄ 2×200⁄
m π π

4. In a c-t FWR, RL is 2kΩ. Each diode has forward resistance of 10Ω. The peak value of
voltage across secondary is 210V. Find the peak value of current, rms value of current, and

Soln: Given: vm = 210V, rf = 10Ω, RL = 2kΩ

ripple factor. Draw the circuit.

= rf + R L
At any instant in a C-T FWR one diode is conducting

1. i = = = 0.1044A
vm
Circuit resistance 210

m r𝐹+RL 10+2×103

2. i
= = = 0.073A
im 0.1044

rm
s
√2 √2 2
0.1044 2
im 2
3. γ = √( ) −1=
⁄√2 ⁄
)2
√
− 0.0738
1= − 1 = √0.2353 = 0.48
2i π √ √( )
m⁄
( 2×0.1044⁄π
0.0664

22ESC143/243-Intro. to Electronics Engg. 16

5. For a Zener Regulator, if Vz=10V, Rs=1kΩ, RL=2kΩ, and the input voltage varies from
22V to 40V. Find the maximum and minimum values of Zener current. Draw the circuit.
Soln:

22ESC143/243-Intro. to Electronics Engg. 17

 Fig-1 Fig-2
The first step is to determine the state of the zener diode. It is easy to see that for the given
range of voltages (22-40V), the voltage across the zener is greater than V Z (= 10 V). Hence
the zener diode will be in the “on” state for this range of applied voltages. Consequently, it
can be replaced by a battery of 10 V as shown in Fig-2.

Maximum zener current: The zener will conduct maximum current when the input voltage is
maximum i.e. 40 V. Under such conditions:

Current through 1K, 𝐼 =

Voltage across 1K=40-10=30V
30 = 30𝑚𝐴 
1𝑘
Load current, = = 5𝑚𝐴
10

𝐼𝐿 2𝑘

By KCL, I= IL+IZ, Maximum Zener Current IZ(max) = I- IL=30-5=25mA

Minimum Zener current: The zener will conduct minimum current when the input voltage is
minimum i.e. 22 V. Under such conditions, we have,

Current through 1K, 𝐼 =

Voltage across 1K=22-10=12V
12 = 12𝑚𝐴 
1𝑘
Load current, 𝐼𝐿 = 5𝑚𝐴
By KCL, I= IL+IZ, Minimum Zener Current Iz(min) = I - IL=12 – 5 = 7mA

22ESC143/243-Intro. to Electronics Engg. 18

 Module- 1: Amplifiers

2.1. Common-Emitter (CE) amplifier:

a. Without feedback:
 Fig-1shows a simple common emitter circuit
which uses an npn transistor whose:
 Collector terminal (output terminal) is
connected to supply voltage VCC through
the collector resistor RC.
 Base terminal is provided with the AC
signal which needs to be amplified.
 Emitter terminal is grounded (hence also
referred to as Grounded Emitter Fig-1
configuration).
 In this arrangement, as the input voltage V in increases, the base current I B also increases
which in turn increases the collector current IC.This causes an increase in the voltage drop

𝑉0 = 𝑉𝑐𝑐 − 𝐼𝐶 𝑅𝐶
across the collector resistor RC which results in a decreased output voltage V0 as given by

 Similarly as the input voltage goes on decreasing, I B and hence IC decrease, due to which
the voltage drop across RC also decreases thereby increasing the output voltage. This
indicates that for the positive half-cycle of the input waveform, amplified negative half-
cycle is obtained and for the negative input pulse, the output will be an amplified positive
pulse. Hence there exists a phase-shift of 180 o between the input and the output
waveforms of the common emitter amplifier for which it is also referred to as Inverting
Amplifier.
 This common-emitter amplifier, inverts the input signal as it is amplified. In other words,
a positive-going input voltage causes the output voltage to decrease, or move toward the
negative, and vice versa.
 In other words, with no feedback resistor, V BE equals input (Vin). Therefore, for instance
if input Vinincreases by 100mV, then VBEincreases by 100mV: a change in one is the
same as a change in the other since the two voltages are equal to each other.

b. With feedback.
 The amplifier configuration shown in fig-2 is a
common-emitter with feedback resistor R E
connected between emitter and ground.
 The new feedback resistor (RE) drops voltage
proportional to the emitter current through the
transistor, and it does this to oppose the input
signal influence on the base-emitter junction of
the transistor.
 With REin the Vin- VBE loop, VBE will no
longer be equal to Vin. The REwill drop a Fig-2

voltage proportional to emitter current, which

is in turn controlled by the base current, which is in turn controlled by the voltage
dropped across the base-emitter junction of the transistor (VBE). Thus, if Vin increases in a
positive direction, it would increase VBE, causing more base current, causing more
collector (load) current, causing more emitter current, and causing more feedback voltage
to be dropped across RE. This increase of voltage drop across the feedback resistor,
22ESC143/243-Intro. to Electronics Engg. 19
 though, subtracts from Vin to reduce the VBE, so that the actual voltage increase for V BE
will be less than the voltage increase of Vin.
 The emitter bypass capacitor CE when added into the circuit, increases its gain
considerably by short-circuiting the emitter resistance R E for high frequency signals,
which results in the reduction of the overall transistor load.
 No longer will a 100mV increase in V in result in a full 100mV increase for V BE, because
the two voltages are not equal to each other.
 Consequently, the input voltage has less control over the transistor than before, and the
voltage gain for the amplifier is reduced due negative feedback.
 In practical common-emitter circuits, negative feedback is a necessity for stable
operation. A common-emitter transistor amplifier with no negative feedback, has the full
amplitude of Vin impressed across the transistor’s base-emitter-junction. This gives a
large voltage gain. Unfortunately, the relationship between base-emitter voltage and base-
emitter current changes with temperature, as predicted by the “diode equation”. As the
transistor heats up, there will be less of a forward voltage drop across the base-emitter
junction for any given current. This causes a problem, as the R1/R2 voltage divider
network is designed to provide the correct quiescent current through the base of the
transistor so that it will operate in desired class of operation. If the transistor’s
voltage/current relationship changes with temperature, the amount of DC bias voltage
necessary for the desired class of operation will change. A hot transistor will draw more
bias current for the same amount of bias voltage, making it heat up even more, drawing
even more bias current. The result, if unchecked, is called thermal runaway.

Need of Negative Feedback in Amplifiers

1. Stabilizes Amplifier Gain
 The negative feedback stabilizes the gain of the amplifier by reducing the dependence of
amplifier gain on various transistor parameters or variation in the supply voltage.

2. Reduces Non-linear Distortion

 The use of negative feedback also reduces the non-linear distortion level in the large
signal amplifiers.

3. Increases Circuit Stability

 The output of an amplifier without negative feedback is affected by the variations in the
temperature, frequency, or amplitude of the signal which further changes the gain of the
amplifier and as result, a distorted signal is obtained at the output. Hence, the negative
feedback is applied so that the gain of the amplifier is stabilized.

4. Increases Input Impedance/Resistance

 The use of negative feedback increases the input impedance or resistance of the amplifier.

5. Decreases Output Impedance/Resistance

 The use of negative feedback decreases the output impedance or resistance of the
amplifier.

6. Reduces Noise Level

 The negative feedback applied to the amplifiers is in the opposite phase to that of the
applied input signal, hence it cancels out the noises which are introduced in the output

22ESC143/243-Intro. to Electronics Engg. 20

 signal by the amplifier circuit. As a result, one gets the output signal with a reduced noise
level.

7. Improves Frequency Response & Bandwidth

 The negative feedback which is applied to the amplifiers is a resistive network, hence the
gain of the amplifier with negative feedback is independent of signal frequency. As a
result, the gain becomes constant over a wide range of signal frequencies in this way the
frequency response of the amplifier with negative feedback is improved.

8. More Linear Operations

 In the case of an ordinary amplifier, one gets a very high value of the output signal even
for a small value of the input signal hence the output signal is not proportional to the
applied input signal. But in the case of an amplifier with negative feedback, every
parameter is controlled by the applied feedback network. Hence in the case of an
amplifier with negative feedback, the relation between the output and the input signal is
more linear.

Note: The main disadvantage of using negative feedback in amplifiers is that, the overall gain of
the amplifier is reduced by the factor of (1+βAv).

2.2. Multi-stage amplifiers:

 In order to provide sufficiently large values ofgain, it is frequently necessary to use a
numberof interconnected stages within an amplifier. Theoverall gain of an amplifier with
several stages(i.e. a multi-stage amplifier) is simply the productof the individual voltage
gains. Hence:AV = AV1 × AV2 × AV3
 Note, however, that the bandwidth of a multistageamplifier will be less than the
bandwidth ofeach individual stage. In other words, an increasein gain can only be
achieved at the expense of areduction in bandwidth.
 Signals can be coupled between the individualstages of a multi-stage amplifier using one
of anumber of different methods shown in Fig-3.

Fig-3
 The most commonly used method is that ofR–C coupling as shown in In Fig-3(a). In
thiscoupling method, the stages are coupled togetherusing capacitors having a low
reactance at thesignal frequency and resistors (which also providea means of connecting
the supply). Fig-4 shows a practical example of this couplingmethod.

22ESC143/243-Intro. to Electronics Engg. 21

 A similar coupling method, known as L–C coupling, is shown in Fig-3(b). In this
method,the inductors have a high reactance at the signalfrequency. This type of coupling
is generally onlyused in RF and high-frequency amplifiers.
 Two further methods, transformer coupling anddirect coupling, are shown in Fig-3(c) and
3(d), respectively. The latter method is usedwhere d.c. levels present on signals must
bepreserved.

Fig-4: A typical two-stage high-gain R–Ccoupled common-emitter amplifier

2.3. Transistor as a Switch:

 Transistor as a switch operates in two regions i.e., saturation region (fully-ON) and the
cutoff region (fully-OFF).

Cut-off Region
 The operating conditions of the
transistor are zero input base current
(IB=0), zero output collector
current(IC=0), and maximum
collector voltage (VCE) which results
in a large depletion layer and no
Fig-5
current flowing through the device
as in below fig-5

Saturation Region
 In this region, the transistor will be
biased so that the maximum amount
of base current (IB) is applied,
resulting in maximum collector
current(IC=VCC/RL) and then
resulting in the minimum collector-
emitter voltage (VCE ~ 0) drop. At
this condition, the depletion layer
becomes as small as the possible Fig-6
and maximum current flows through
the transistor. Therefore the
transistor is switched “Fully-ON” as
in fig-6

22ESC143/243-Intro. to Electronics Engg. 22

 Module - 2: Operational Amplifiers& its practical circuits
Op-amp
Characteristics:
Characteristics Ideal Op-Amp Practical Op-Amp
 An ideal op amp will have infinite voltage gain.
 Apractical op-amp can only produce a
 An ideal op amp will produce mega-gain, practically, produce infinite
1. Infinite Voltage Gain finite gain.
gain.
 It will amplify the signal infinite times which is never needed.
 An ideal op amp will have infinitely high input impedance.
 The higher the impedance, the lower the current that an op-amp  A practical
op amp has finite input
2. Infinite Input
draws. impedance.
impedance
 A high input impedance is required so that the op amp does not
disturb the original circuit by pulling current from it.
 An ideal op amp will have zero output impedance.
 A practical op amp will always have some
 When an op amp produces its output signal, op amp should have a
3. Zero Output Impedance output impedance, though it is low. A
zero voltage so that the maximum voltage will be transferred to the
output load. typical value can be 75Ω.

 In an ideal op amp, the gain that the op amp produces will be  In practical op amps, the gain that is
independent of frequency. produced is only for a certain bandwidth
4. Gain Independent of
 This means that regardless of the frequency of the input signal going of frequencies. Outside of this bandwidth,
Frequency
into the op amp, the gain that is produced will be constant and good the gain that the op amp produces will
across all frequencies. decline.
 In an ideal op amp, if no voltage is applied to the inverting and  A practical op amp will have slight offset
5. Zero Input Voltage noninverting input pins, the op amp will output a voltage of zero (0), even if the voltage applied to the pins are
Offset since there is no difference at all of the voltage applied to the two the same. To correct this offset, voltage
input pins. must be applied to the offset pin.
 In an ideal op amp, the ac voltage which is fed into the op amp to be
6. Output Swings to  In practical op amps, the amplified signal
amplified will swing all the way up for the DC positive supply rail
positive and negative will not fully reach the DC supply rails.
and all the way down for the DC negative supply rail, making 100%
voltage supply rails They will fall short of it.
efficient use of the DC voltage supplied to an op amp.
 In an ideal op amp, the output will swing instantly to the amplified  In practical op amps, the amplified signal
7. Output swings instantly voltage value. There will be no time delay between the time the will take time to reach the fully amplified
to the correct value voltage is input into the op amp till the time it is output. It will all be voltage value. This is determined by the
instantaneous. slew rate of the op amp.

22ESC143/243-Intro. to Electronics Engg. notes by Omkar Yatgal 18

 An operational amplifier, or op-amp, is a very high gain differential amplifier with high
input impedance and low output impedance. Typical uses of the operational amplifier are
to provide voltage amplitude changes (amplitude and polarity), oscillators, filter circuits,
and many types of instrumentation circuits. An op-amp contains a number of differential
amplifier stages to achieve a very high voltage gain.

Fig-1: Basic op-amp.

(a) Practical (b) ideal

Fig-2: AC equivalent of op-amp circuit:

 Fig-1 shows a basic op-amp with two inputs and one output as would result using a
differential amplifier input stage. Each input results in either the same or an opposite
polarity (or phase) output, depending on whether the signal is applied to the plus (+) or
the minus (-) input, respectively
 The ac equivalent circuit of the op-amp is shown in Fig-2. As shown, the input signal
applied between input terminals sees an input impedance Ri that is typically very high.
The output voltage is shown to be the amplifier gain times the input signal taken through
an output impedance Ro, which is typically very low. An ideal op-amp circuit, as shown
in Fig-2b, would have infinite inputimpedance, zero output impedance, and infinite
voltage gain.

Other parameters related to op-amp

 Differential gain ‘Ad’:
The gain with which differential amplifier amplifies the difference between two input
signals
𝑉 𝑉𝑂
𝐴𝐷 = = 1 − 𝑉2
𝑂

�𝑑
 Common Mode Gain ‘Ac’: �𝑉
For an ideal op-amp the output of the differential amplifier is zero, however for practical
op-amp the output of the differential amplifier is not only depends on difference of two
input signal but also depends on average of two input signals
𝑉
𝑉𝑂
𝐴𝐶 = =
𝑂

�𝐶 1 + 𝑉2)⁄2
� (𝑉
 Common Mode Rejection Ratio ‘ρ’:
𝐴𝑑
𝜌=
𝐴
𝐶
 Slew rate: Slew rate of an op-amp is defined as the maximum rate of change of the
output voltage due to a step input voltage.
Virtual ground in op-amp:
 In op-amp the term virtual ground means that
the voltage at a particular node is almost equal V1 
to ground voltage (0V), this is because of
feedback due to R2 and the high gain of the op
amp as in fig-3.It is not physically connected
to ground. This concept is very useful in V2=0
analysis of op-amp circuits and it will make a
lot of calculations very simple.
 Since Zin = ∞, current I flowing through op- Fig-3

amp is zero and voltage V1at inverting pin / node is equal to voltage V2(=0) at non-
inverting pin, by virtual ground concept.
1. Inverting Amplifier:
 An inverting amplifier (also known as an inverting operational amplifier or an inverting
op-amp) is a type of operational amplifier circuit which produces an output which is out
of phase with respect to its input by 180 o. This means that if the input pulse is positive,
then the output pulse will be negative and vice versa.
 The input signal is applied to the inverting terminal of the op-amp via the resistor Ri.
Non-inverting terminal is grounded. The necessary feedback to stabilize the circuit and to
control the output, is provided through a feedback resistor Rfas in fig-4.
 By virtual ground concept, 𝑉1 = 𝑉2 = 0
 Mathematically the voltage gain offered by the
circuit is given as
𝑉
𝐴𝑉 =𝑜𝑢𝑡
𝑉𝑖𝑛

Currents Ii& If are given by,

𝑉𝑖−𝑉1 𝑉𝑖−0 𝑉𝑖
𝐼 = = =
𝑖 𝑅𝑖 𝑅
𝑅𝑖
and
𝑖
Fig-4

𝐼𝑓 = 𝑉1 − 0− 𝑉𝑜
𝑉𝑜 = 𝑉 = −
�𝑓
𝑜

𝑅𝑓 𝑅 𝑓 �
 Ideal op amp has infinite input impedance
due to which the currents flowing into its
input terminals are zero i.e. I 1 = I2 = 0,
Thus, Ii = If.
𝑉𝑜 = −
𝑉𝑖 𝑉𝑜 � 𝑖
=− �
𝑅𝑖 𝑅𝑓
𝑉𝑜 𝑅𝑓
= −
𝑉𝑖 𝑅𝑖
𝑅𝑓
 𝑉𝑖

𝑉𝑜 = 𝐴𝑉𝑉𝑖
 𝑹𝒇
∴ 𝑨𝑽 = −
𝒊𝑹

 This indicates that the voltage gain of the inverting amplifier is decided by the ratio of the
feedback resistor to the input resistor with the minus sign indicating the phase-reversal.

2. Non-Inverting Amplifier:
 Non inverting amplifier is an op amp
based amplifier with positive voltage
gain.
 When any signal is applied to the non –
inverting input, it does not change its
polarity when it gets amplified at the
output terminal. So, in that case, the gain
of the amplifier is always positive.

𝑉1 = 𝑉2 = 𝑉𝑖
 As in fig-5, By virtual ground concept,

 Mathematically the voltage gain offered Fig-5

by the circuit is given as

𝐴𝑉 = 𝑉𝑜𝑢𝑡
𝑉𝑖𝑛

 Currents I1& If are given by,

𝑉 𝑖 − 0 𝑉1
𝐼1 𝑉
=1 − 0
𝑅𝑖 𝑅𝑖 𝑅𝑖

and

𝑉𝑜 − = 𝑉𝑜 − 𝑉𝑖
𝐼𝑓
𝑉1 𝑅𝑓
=
𝑅𝑓

 Ideal op-amp has infinite input impedance due to

which the currents flowing into its input terminals are zero i.e. I1 = I2 = 0, Thus, I1 = If.
𝑉1 𝑉𝑜 − 𝑉𝑖
𝑅𝑖 =
𝑅𝑓
𝑉𝑜 � 𝑉𝑖
𝑅𝑓 �+
𝑅𝑓
=
𝑖

𝑅
1

𝑉𝑜 𝑅𝑓
𝑉𝑖 = (1 )
𝑅1
+
𝑅𝑓
𝑉𝑜 = 𝑉(1 + 1 )
𝑅
𝑉𝑜 = 𝐴𝑉𝑉𝑖

𝑹𝒇
∴ 𝑨𝑽 = (𝟏 + )
�𝟏
�
 This term does not contain any negative part. Hence, it proves that the input signal to the
circuit gets amplified without changing its polarity at the output.
 From the expression of voltage gain of non-inverting op-amp, it is clear that, the gain will
be unity when Rf = 0 or R1= .
 When Rf = 0 When R1= 

∴ 𝐴𝑉 = 𝑅 0 𝑅 𝑅
(1 + 𝑓 ) = (1 )= ∴ 𝐴𝑉 = (1 𝑓 ) = (1 𝑓 )=1
+ 𝑅1 + +
𝑅 1 𝑅 
1 1

 So, if the feedback path is short circuited and/or open the external resistance of the
inverting pin, the gain of the circuit becomes 1.

Fig-6: Voltage Follower/Unity Gain Amplifier

 This above circuitis called voltage follower or unity gain amplifier. This is used to isolate
two cascaded circuits, because of its infinitely large impedance, at op-amp inputs.
3. Summing Amplifier:
 A summing amplifier is an op-amp circuit that combines several inputs and produces an
output that is weighted sum of the inputs.

 Two types:
1. Inverting:An inverting summing amplifier is one whose output is the inverted sum
of the constituent inputs
2. Non-inverting:A non-inverting summing amplifier is one whose output is the sum
of the constituent inputs
3a.Inverting Summing Amplifier:
 Multiple inputs are applied to the inverting
input terminal of the Op-Amp, while the non-
inverting input terminal is connected to ground.
Due to this configuration, the output of voltage
Inverting Summing Amplifiercircuit is out of
phase by 180o with respect to the input.
Fig-7

𝑖 = 𝑖1 + 𝑖2 + 𝑖3+…….+ 𝑖𝑛
 From the circuit of fig-7, ‘i’ is the sum of currents of input terminals.

𝑖 = (𝑣1 − 0) (𝑣2 − (𝑣3 − (𝑣𝑛 −

+
𝑅1 0) + 0) +…….+ 0)
𝑅2 𝑅3 𝑅𝑛

𝑣 𝑣 𝑣 𝑣𝑛
𝑖
+ + 𝑅3
2 3
=
+…….+
1

and 𝑅 𝑅 𝑅
2 3
1

𝑖𝑓 =(0 − 𝑣𝑜
𝑣0) = −
�𝑓
�
𝑅𝑓
 For an ideal op amp, the current at the inverting and non-inverting terminal are zero, and
the total current i flows through Rf,
𝑣1 𝑣2 𝑣3 𝑣𝑜
∴
𝑅1 𝑅 + 𝑅 +…….+
+ =−
𝑛

2 3 𝑅 𝑅𝑓
3

 Output voltage of Inverting Summing Amplifier is given by

𝑅𝑓 𝑅𝑓 𝑅𝑓 𝑅
𝑣𝑜 = − ( 𝑉 + 𝑉 + 𝑓 𝑉𝑛)
𝑅1 𝑉3 + ⋯ +
1 2

𝑅 2𝑅 3 �𝑛
�
 This indicates that output voltage v0 is weighted sum of numbers of input voltages.If R1 =
R2 = R3 =….Rn= R then

𝒗𝒐 = −(𝑽𝟏 + 𝑽𝟐 + 𝑽𝟑 + ⋯ + 𝑽𝒏)

3b.Non-Inverting Summing Amplifier:

 The input voltages are applied to the non-
inverting input terminal of the Op-Amp and
a part of the output is fed back to the
inverting input terminal, through voltage-
divider-bias feedback.
Fig-8
 The circuit of a Non-Inverting Summing
Amplifier is shown in fig-8. For the sake of
convenience, the following circuit consists of only three inputs, but more inputs can be
added.
 Voltage at node A and B are same

VA=VB
 From input side

𝑉1− 𝑉2−
𝐼1 𝑉𝐵 𝑎𝑛𝑑 𝐼2 𝑉𝐵
= =
𝑅1 𝑅2
 As input current of op-amp is zero

𝐼1 + 𝐼2 = 0
𝑉1−𝑉𝐵 𝑉2−𝑉𝐵
+ =0
𝑅1 𝑅2

𝑉1 𝑉 � 𝑉𝐵
�2 − = 0
𝑅1 − 𝐵
+ 2

𝑅 1𝑅 2

𝑅2𝑉1 +
𝑉𝐵 𝑅1𝑉2
=
𝑅1 + 𝑅2
 At node A,
� 𝑉 𝑉0−𝑉𝐵
�𝐴 𝑉0−𝑉𝐴
=
𝐵

𝐼 = = 𝑎𝑠 𝑉𝐴 = 𝑉𝐵 𝑅𝑓 𝑅𝑓
𝑅 𝑅
𝑎𝑛𝑑 𝐼 =
 Equating above equations
𝑉𝐵 𝑉0−
𝑉𝐵
𝑅
=
𝑅𝑓
𝑉0
=
𝑉 1 1
[ + ]
𝑅𝑓 𝑅𝑓
𝐵
𝑅

𝑉0 = 𝑉𝐵 [ 𝑅 + 𝑅𝑓
]
 Substituting VB in above equation, 𝑅

𝑉0 = 𝑅2𝑉1 + 𝑅1𝑉2 (𝑅 +
𝑅𝑓)
(𝑅1 + 𝑅2)
𝑅2 (𝑅 + 𝑅𝑓) 𝑅2 (𝑅 + 𝑅𝑓)
𝑉0 = 𝑉1 +
(𝑅1 + ) + 𝑉2
)
𝑅2 (𝑅 1 𝑅2

 If 𝑅1 = 𝑅1 = 𝑅 = 𝑅𝑓, then

𝑽𝟎 = 𝑽𝟏 + 𝑽𝟐
4. Integrator or Op Amp
Integrator:
 An integrator is an op amp circuit, whose output is proportional to the integral of input
signal.
 An inverting amplifier can be modified to an op-amp integrator circuit, if the feedback
resistor Rfis replaced by a capacitor C as in fig-9.
 Applying KCL to node 1,
𝑉𝑖 (𝑣1 − 𝑣𝑜)
=
𝑅
𝐶 𝑑𝑡
 𝑉𝑖 (0 − 𝑣𝑜)
= 𝑑𝑡
𝑅
𝐶
𝑑𝑣𝑜
𝑉𝑖
= −𝐶 𝑑𝑡
𝑅

=>𝑑𝑣𝑜 = −
1 𝑉𝑖𝑑𝑡
𝑅𝐶
Fig-9

 Integrating both side

𝟏
𝒗𝒐 = − ∫
𝑹𝑪
𝑽𝒊 𝒅𝒕

 Output voltage is the integral function of input voltage.

5. Op-Amp Differentiator:
 Differentiator is an op amp based circuit, whose
output signal is proportional to differentiation of
input signal.
 An op-amp differentiator is basically an
inverting amplifier with a capacitor of suitable
value at its input terminal.
 Considering an ideal op amp, applying KCLat
node 1 of fig-10, Fig-10

(𝑣𝑖−𝑣1) 𝑣𝑜
𝐶 =−
𝑑𝑡 𝑅
(𝑣𝑖 − 0) 𝑣𝑜
𝐶 =−
𝑑𝑡 𝑅

𝑑𝑣𝑖 𝑣𝑜
𝐶 =−
𝑑𝑡 𝑅

𝒅𝒗𝒊
∴ 𝒗𝒐 = −𝑹𝑪
𝒅𝒕

 The above equation shows that the output voltage is the derivative of the input voltage
6. Difference Amplifier (Subtractor):
 A differential amplifier (also known as a
difference amplifier or op-amp subtractor) is
a type of electronic amplifier that amplifies
the difference between two input voltages
but suppresses any voltage common to the
two inputs as in fig.
 In the fig-11, applying KCL to node a,
𝑉1 − 𝑉𝑎 𝑉𝑎 − 𝑉𝑜
Fig-11

𝑅1 =
𝑅𝑓
𝑅𝑓 𝑅𝑓
=>𝑉 = ( + 1) 𝑉 − 𝑉 1
𝑜 𝑅1 𝑎 𝑅1 1

𝑉𝑏 − 0
 Applying KCL to node b,
𝑉2 −
=
𝑉𝑏 𝑅3
𝑅2

= 𝑅3
𝑉 𝑅 𝑉2
𝑏

2+
2

𝑅3

 But summing point va = vb& substituting eqn(2) into eqn(1) yields

𝑅𝑓 𝑅3 𝑅𝑓
𝑉𝑜 = + 1) 𝑉 2 − 𝑉1
( 𝑅 +
𝑅 1 2 𝑅3 𝑅 1

𝑅(1 + 𝑅1⁄𝑅𝑓)
Rearranging
𝑉 = 𝑅𝑓
− 𝑉
𝑉
3

𝑜 𝑅1(1 + 𝑅1 1

𝑅2⁄𝑅3) 2

 Since a difference amplifier must reject a signal common to the two inputs, the

𝑅1 𝑅2
amplifier must have the property that vo = 0 when v1 = v2. This property exists when

𝑅𝑓 = 𝑅
3

𝑅𝑓
 Then cqn(3) becomes

(𝑉2 − 𝑉1)
𝑉𝑜 =
𝑅 1
 If Rf = R1 and R2 = R3, the difference amplifier becomes a subtractor, with the output
𝑉𝑜 = (𝑉2 − 𝑉1)