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EE203 Wk6 LabReport

digital electronics lab

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0% found this document useful (0 votes)
19 views15 pages

EE203 Wk6 LabReport

digital electronics lab

Uploaded by

tannerlooney
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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EE203-03

Laboratory Exercise 6

Switches, Lights, and Multiplexors

Tanner Looney
February 17, 2025

1. Introduction
The goal of this exercise is to apply the knowledge gained in previous weeks to control the
DE-10 board’s LED’s. using the switches, by programming with Verilog. In the previous weeks,
the exercises have developed the engineering skillset required to perform basic functions with
the Quartus software and DE-10 board. This three-part exercise will be a culmination of those
skills to create multiplexors and implement them on the DE-10. The first part will be a program
to control the LEDs on the DE-10 with the switches on the board. The second part will
implement a 2 to 1 multiplexer, and the third part will implement a 4 to 1 multiplexer. As
mentioned, the student uses the Quartus software, DE-10 Lite board, and the Verilog
programming language to implement these circuits.

2. Theory and Analysis


2.1. Theory
2.1.1. Part I
In Part I of this exercise the DE-10 will be programmed with a basic circuit that allows
the user to control the LEDs on the board using the switches. This is done by assigning
the pins of the board and writing Verilog code that activates each LED with the switch on
the board.
2.1.2. Part II
In Part II, a 2-to-1 multiplexer is implemented to the DE-10. A multiplexer is a
circuit that takes two inputs and a select bit. The select bit determines which of the two
inputs are passed to the output. The circuit is composed of a NOT gate, 2 AND gates, and
an OR gate. The circuit diagram and truth table is shown below in Figure 1.

Figure 1: 2-to-1 Multiplexer

2.1.3. Part III


In Part III the 4-to-1 multiplexer is demonstrated. It abides by the same concepts as
the 2-to-1 multiplexer but the number of select bits, inputs, and outputs are expanded so
the circuit is also expanded to handle these extra components. The circuit will have 2
select bits, 4 inputs, and 1 output. The configuration of the select bits will determine
which input will be passed to the output.

Figure 2: 4-to-1 Multiplexer Circuit


Figure 3: 4-to-1 Multiplexer Circuit

2.2. Analysis
2.2.1. Part I
The program below assigns switches 0-9 as inputs and LEDs 0-9 as outputs. The
assignment statement on line 5 activates the LED to it’s corresponding switch. This means that if
the user were to set switch 1 to the on position, LED 1 would illuminate.

Figure 4: Program for Part I

2.1.2. Part II
The program for Part 2 is the 2-to-1 multiplexer. As stated earlier this circuit is composed of a
NOT gate, 2 AND gates, and an OR gate. Switch 9 is the select bit. The select bit and an input bit
are taken as a pair to determine which output LED is illuminated. This program uses Verilog to
render the circuit. In lines 8-11 the assignment statements are actual logic statements rendering
the circuit from Figure 1. The (~) is the NOT gate, (&) is the AND gate, and (|) is the OR gate.
For example, if the user were to set switch 9(select bit) and switch 4 to on, LED 0 would
illuminate.

Figure 5: Program for Part 2

2.1.3. Part III


The program in Figure 6 is the Verilog rendering of the circuit in Figure 2. This program
is similar to the program in Part II, but there are more inputs, outputs and select bits. This calls
for the use of wires to combine the outputs of one logic gate to the next logic gate in the circuit.
The wires are assigned w1, w2, w3, and w4. The output bits are assigned LED[0] and LED[1].

Figure 6: Program for Part 3


3. Procedures
The procedure for this experiment is set forth in the lab manual and there were no
deviations from the prescribed procedure. The first step is to create a new project in the
Quartus software environment. Then a Verilog file was created so that our program could be
written which implements our circuit. Once the program is written it is compiled and tested.
If there are no errors the pin assignments are the made from the .qsf file provided by the
instructor. After that, the program is flashed to the board for further verification.

4. Results
4.1.1. Part I

Figure 7:This image shows the output of Part I of the exercise. The LEDs whose corresponding switch is
set to on, are activated.
4.1.2. Part II
The images below show some examples of the outputs of the circuit in Part II after being
flashed to the DE-10 board.

Figure 8: LED[0] is activated when SW[9] and SW[4] are set to on


Figure 9: LED[1] is activated when SW[9] and SW[5] are set to on
Figure 10: LED[2] is activated when SW[9] and SW[6] are set to on
Figure 11: LED[3] is activated when SW[9] and SW[7] are set to on
Figure 12: None of the output LEDs are activated because only the select bit is activated

4.1.3. Part III


The images below shows some examples of the output of the circuit in Part III after being
flashed to the DE-10 board.

Figure 13: LED[0] is activated because SW[9], SW[8], and SW[5] is set to on
Figure 14: LED[1] is activated because SW[9], SW[8], and SW[7] are set to on

5. Discussion and Conclusion


5.1. Discussion
This experiment applies the skills developed in previous labs to control the board interface
and implement multiplexers using Verilog. Verilog programming language is a powerful way for
engineers to create logic circuits from a different level of abstraction. Instead of explicitly
creating logic circuits with circuit diagrams the circuits are implemented via logic statements.
This allows the engineer to build circuits by describing the desired behavior, which is sometimes
more efficient than using a circuit.

5.2. Conclusion
This experiment implemented three programs to control the board in various ways. The first was
a simple example of how to assign inputs and outputs using Verilog. The other two programs
implemented multiplexers using logic statements. There were no deviations from the prescribed
procedure and the desired outcome was achieved.

Appendices
DE10_LITE_Default.qsf

Wk 6 Exercise.pdf

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