Branch : Electronics & Telecommunication Engineering

Semester 3rd Year / 5th Semester

Microcontroller & Embedded System

3.7.4 Interrupt Priority in the 8051.

After every instruction, the 8051 automatically checks the interrupts. The Interrupt
conditions are checked in the following order from highest priority to lowest priority order.

Sl. No. Interrupt Flag Priority Level

1 External Interrupt 0, INT0 IE0 Highest
2 Timer 0 Interrupt TF0
3 External Interrupt 1, INT1 IE1
4 Timer 1 Interrupt TF1
5 Serial Interrupt RI / TI Lowest

Whenever External Interrupt 0 and Timer 1 interrupt occur at the same time, the 8051
executes the ISR of External Interrupt 0 first. Then the 8051 returns to the main program,
executes one instruction, and then executes the ISR of Timer 1 interrupt.

3.8 Interfacing With ADC & DAC.

Interfacing Of Digital-To-Analog Converter ( DAC ) With 8051.

Microcontroller can process only the digital data. So a DAC interfacing with 8051 is very
important for reading the result from the microcontroller at the output device. DAC chip
can be directly connected with the Intel—8051 through its ports. Normally, Port—1 is
available for this purpose.

Interfacing Circuit :
A typical interfacing circuit of DAC 0800 with 8051 is shown below.
Intel 8051 DAC 0800

P1.0
P1.1
P1.2 Voltage
P1.3 DAC 0800 Amplifier Vo
P1.4
P1.5
P1.6
P1.7

Page | 23
 Branch : Electronics & Telecommunication Engineering
Semester 3rd Year / 5th Semester
Microcontroller & Embedded System

PROCEDURE OF A/D CONVERSION :

1. By programming, the data is transferred from A—register of 8051 to the DAC

through the port—1.
2. The output of DAC is fed to an amplifier to get desired analog output voltage Vo.

PROGRAM FOR CONVERSION :

MOV A , # 05 H : Load the data 05 H into the Accumulator register.

MOV P1 , A : Transfer of digital data from A—reg. to DAC through Port—1
END ;

Interfacing Of Analog-To-Digital Converter ( ADC ) With Intel—8051.

Microcontroller can process only the digital data. So an ADC interfacing with 8051 is very
important for receiving and processing input analog signal. ADC chips can be directly
connected with the Intel—8051 through its ports. Normally, Port—1 is available for this
purpose.

Interfacing Circuit :
A typical interfacing circuit of ADC 0808 / 0809 with 8051 is shown below.

Intel 8051 ADC 0808 / 0809

P1.0 IN0
P1.1 IN1
P1.2 IN2
P1.3 IN3
P1.4 IN4
P1.5 IN5
P1.6 IN6
P1.7
A IN7
P0.0 B
P0.1 C
P0.2 SC OE EOC

P0.3
P0.4
P0.5

Page | 24
 Branch : Electronics & Telecommunication Engineering
Semester 3rd Year / 5th Semester
Microcontroller & Embedded System
PROCEDURE OF A/D CONVERSION :

1. There are 8—input channels for analog signals in the ADC 0808 / 0809. At a time
one channel is selected by decoding signal A B C which is obtained from the pins
P0.0, P0.1 & P0.2 of Port—0.
2. A start conversion pulse ( SC ) is given to ADC from the P0.3 pin and ADC starts
conversion of analog signal into digital signal.
3. When conversion is complete, end of conversion ( EOC ) signal is sent to the 8051
through pin P0.5.

4. Now 8051 sends the output enable signal ( OE ) to ADC and reads the digital data
from ADC and save it into the accumulator register. Thus conversion is completed.

PROGRAM FOR CONVERSION :

MOV P0 , # 03 [ To select the input analog channel IN3 ]

SETB P0.3
NOP : Trigger pulse for start conversion ( SC )
NOP
CLR P0.3
CHK : JNB P0.5, CHK : Check for end of conversion ( EOC ), polling of EOC pin.
SETB P0.4 : Enable Output ( OE ) for data transfer to accumulator.
MOV A , P1 : Transfer of digital data to A—reg. through Port—1
END ;

Program 1 : Program to generate a square wave of 1 KHz, obtained at the

output of DAC through Port 1. Crystal frequency is about 12 MHz.

ORG 0000 H
START : MOV P1, #0FF H : Move highest data FF H to the Port 1
MOV R0, #0FF H : Set count value FF H in R0 for ON period.
LOOP1 : DJNZ R0, LOOP1 : Execute loop for duration of ON period.
MOV P1, #00 H : Move lowest data FF H to the Port 1
MOV R1, #0FF H : Set count value FF H in R1 for OFF period.
LOOP2 : DJNZ R1, LOOP2 : Execute loop for duration of OFF period.
SJMP START : Repeat the program for continuous wave.
END : Program Terminated.
The count value in R0 and R1 may be adjusted for variable Duty Cycle and Frequency of
Square Wave.

Page | 25
 Branch : Electronics & Telecommunication Engineering
Semester 3rd Year / 5th Semester
Microcontroller & Embedded System

Short Answer Type Questions

1. How many timers are available in the 8051 ?

2. A Timer of 8051 is a ___ bit register.

(a) 8 (b) 16

3. A Timer can count upto____

(a) FF00 H (b) FFFF H

4. When does overflow in a Timer occur ?

5. Timer / Counter operates in Counter mode when C/T is __ . ( 0 / 1 )

6. Timer / Counter operates in Timer mode when C/T is __ . ( 0 / 1 )

7. In Timer mode, Counter receives clock pulses form_____ .

(a) Internal Clock generator (b) External Clock source

8. In Counter mode, Counter receives clock pulses form_____ .

(b) Internal Clock generator (b) External Clock source

9. When a Timer register is loaded with the value FF00 H, it counts from_____

(a) 0000 H to FF00 H (b) FF00 H to FFFF H

10. To Run the Timer 0, _____ instruction is used.

(a) SETB TR0, (b) CLR TR1

11. To Stop the Timer 1, _____ instruction is used.

(b) SETB TR0, (b) CLR TR1

12. ____ instruction loads the data 45 H into higher byte of Timer 1.

(a) MOV TH1, 45 H (b) MOV TH1, #45 H

13. The selection for “Timer” or “Counter” is done by ____ bit TMOD register.

14. Timer Interrupt flag TF1 is set when the count rolls over from____ to _____.

(a) 0000 H to FFFF H (b) FFFF H to 0000 H

15. An 8—bit counter can count_____ events before overflow.

(a) 255 , (b) 65535

Page | 27
 Branch : Electronics & Telecommunication Engineering
Semester 3rd Year / 5th Semester
Microcontroller & Embedded System
16. If the crystal frequency is 12 MHz, then the Timer clock frequency will be ___.

(a) 12 MHz, (b) 1 MHz

17. When the Timer/Counter 0 overflows TF0 goes to _____

(a) High ( 1 ), (b) Low ( 0 )

18. In Mode 0, Timer 0 or Timer 1 operate as ____ bit Counter.

(a) 13—bit, (b) 16—bit

19. In Mode 0, Timer 0 or Timer 1 can count maximum value____.

(a) FFFF H, (b) 1FFF H

20. In Mode 1, Timer 0 or Timer 1 operate as ____ bit Counter.

(b) 13—bit, (b) 16—bit

21. In Mode 1, Timer 0 or Timer 1 can count maximum value____.

(b) FFFF H, (b) 1FFF H

22. In Mode 0, Timer 0 or Timer 1 overflows for roll over from ____.

(c) FFFF H to 0000 H , (b) 1FFF H to 0000 H

23. In Mode 1, Timer 0 or Timer 1 overflows for roll over from ____.

(d) FFFF H to 0000 H , (b) 1FFF H to 0000 H

24. In Mode 2, Timer 0 or Timer 1 operate as ____ bit Counter.

(c) 8—bit, (b) 16—bit

25. Start bit and Stop bit are used in _____ serial communication.

(a) Synchronous, (b) Asynchronous

26. What are the functions of TCON register ?

27. What are the functions of TMOD register ?

28. ____ is used as line driver in the connection or RS232 with the 8051.

(a) DB 9 , (b) MAX 232

29. SBUF is _____ bit register. (a) 8—bit, (b) 16—bit

30. The 8051 has _____ SBUF registers. (a) 1, (b) 2.

31. What are the functions of SCON register ?

32. When is the Transmit Interrupt flag set ( TI = 1 ) by microcontroller ?

33. When is the Receive Interrupt flag set ( RI = 1 ) by microcontroller ?

Page | 28
 Branch : Electronics & Telecommunication Engineering
Semester 3rd Year / 5th Semester
Microcontroller & Embedded System
34. What do you mean by half-duplex transmission mode ?

35. What do you mean by full-duplex transmission mode ?

36. What do you mean by simplex transmission mode ?

37. Serial port interrupt RI/TI is set by _______

(a) Microcontroller, (b) Programmer

38. Serial port interrupt RI/TI is reset by _______

(b) Microcontroller, (b) Programmer

39. In RS232, ____ is represented by -3 V to – 25 V. (a) 0, (b) 1

40. In RS232, ___ is represented by +3 V to + 25 V. (a) 0, (b) 1

41. In TTL, ____ is represented by 0 V. (a) 0, (b) 1
42. In TTL, ____ is represented by +5 V. (a) 0, (b) 1
43. When SMOD is ____ in PCON register, the data rate will be doubled.
(a) 0, (b) 1

44. The 9th bit in serial communication represents a parity bit. ( True / False ).

45. The 8051 has _____ interrupt sources. (a) 2 (b) 5

46. The External Interrupts of 8051 are ____ & _____.

47. Serial port Interrupt RI/TI has the lowest priority. ( True / False ).

48. External hardware interrupt 0, INT0 has the lowest priority. ( True / False ).

49. TCON register controls the triggering level of two hardware interrupts. (True/False).

50. Interrupt Enable (IE) register is used to enable/disable the interrupts. (True/False).

51. Each interrupt has its own ______ .

(a) Delay Subroutine, (b) Interrupt Service Subroutine, (ISR)

52. Starting address of Interrupt Service Subroutine, (ISR) is called Interrupt Vector
Address. ( True / False ).
53. Interrupt Service Subroutine, (ISR) is terminated by _____ instruction.

(a) RET, (b) RETI, (c) Both (a) & (b)

54. When Serial port interrupt occurs, ______ interrupt flag bit is set.

(a) RI (b) TI (c) RI or TI

55. _____ instruction makes the INT0 interrupt negative edge triggered.

Page | 29