Module 1: Introduction to VLSI Design

Lecture 1: VLSI Design Concepts, Moore's Law, Scale of Integration (SSI, MSI, LSI, VLSI,
and ULSI – basic idea only), ASIC, FPGA, Design using PLD (Recaptitulation)

1.1 Introduction to ICs (Integrated Circuits)

Integrated circuit (IC) is the most significant technological development of the 21st century. It has
forever transformed the world of electronics. It has reduced the size of electronics from a
refrigerator size to palm size electronics or even less. An IC consists of interconnected transistors,
capacitors, resistors, diodes etc. These components are interconnected with an external connecting
terminals contained in a small package.
“An integrated circuit (IC) is a small semiconductor-based electronic device consisting of
fabricated transistors, resistors and capacitors. Integrated circuits are the building blocks of most
electronic devices and equipment. An integrated circuit is also known as a chip or microchip”.

1.2 Types of ICs (Integrated Circuits)

Based on the method or techniques used in manufacturing them, types of ICs can be divided into
three classes:
1. Thin and thick film ICs
2. Monolithic ICs
3. Hybrid or multichip ICs
Below are the simple explanation of different types of ICs as mentioned above.
 Thin and Thick ICs:
In thin or thick film ICs, passive components such as resistors, capacitors are integrated but the
diodes and transistors are connected as separate components to form a single and a complete
circuit. Thin and thick ICs that are produced commercially are merely the combination of
integrated and discrete (separate) components.
Thick and thin ICs have similar characteristics, similar appearance except the method of film
deposition. Method of deposition of films distinguished Thin ICs from Thick ICs.
 Monolithic ICs
In monolithic ICs, the discrete components, the active and the passive and also the interconnections
between then are formed on a silicon chip. The word monolithic is actually derived from two Greek
words “mono” meaning one or single and Lithos meaning stone. Thus monolithic circuit is a circuit
that is built into a single crystal.
Monolithic ICs are the most common types ICs in use today. Its cost of production is cheap and is
reliable. Commercially manufactured ICs are used as amplifiers, voltage regulators, in AM
receivers, and in computer circuits. However, despite all these advantages and vast fields of
application of monolithic ICs, it has limitations. The insulation between the components of
monolithic ICs is poor. It also have low power rating, fabrication of insulators is not that possible
and so many other factors.
 Hybrid or Multi chip ICs
As the name implies, “Multi”, more than one individual chips are interconnected. The active
components that are contained in this kind of ICs are diffused transistors or diodes. The passive
components are the diffused resistors or capacitors on a single chip.
These components are connected by metallized patterns. Hybrid ICs are widely used for high
power-amplifier applications from 5W to more than 50W. Its performance is better than that of
monolithic ICs.
 Digital Integrated Circuits
These types of ICs work on the basic digital system i.e. two defined level which is 0’s and 1’s (in
other words, Low and High or ON and OFF respectively). Microprocessor and Micro controller is
the example of Digital ICs which contains of millions of flip flops and logic gates.
 Analog Integrated Circuits
Analog ICs work by processing continuous signals i.e. analog signal. OP-AMP (Operational
Amplifier), NE 555 Timers and Sensors are the example of Analog ICs. These types of ICs are
used for amplification, filtering, modulation, demodulation etc.
 Mixed Signal ICs
Mixed Signal Integrated Circuit is a kind of ICs where both Digital and Analog ICs are combine
on a single chip.

 Advantages and Applications of ICs

ICs have advantages over those that are made by interconnecting discrete components some of
which are its small size. It is a thousand times smaller than the discrete circuits. It is an all in one
(components and the interconnections are on a single silicon chip). It has little weight. Its cost of
production is also low. It is reliable because there is no soldered joints. ICs consumes little energy
and can easily be replaced when the need arises. It can be operated at a very high temperature.
Different types of ICs are widely applied in our electrical devices such as high power amplifiers,
voltage regulators, TV receivers and computers etc. So the advantages can be summarized as
1. Miniaturization and hence increased equipment density.
2. Cost reduction due to batch processing.
3. Increased system reliability due to the elimination of soldered joints.
4. Improved functional performance.
5. Matched devices.
6. Increased operating speeds.
7. Reduction in power consumption

 Limitation for different types of ICs

Despite the advantages that ICs provide us with, it have limitations some of which are:
 Limited power rating
 It operates at low voltage
 High grade of PNP is not possible
 It produces noise during operation
 Its components such as resistors and capacitors are voltage dependent
 It is delicate i.e it cannot withstand rough handling etc.

DIP (Dual in-line package) IC

In term of Electronics or microelectronics, a dual in-line package (DIP or DIL), or dual in-line pin
package (DIPP) is an electronic component package with a rectangular housing and two parallel
rows of electrical connecting pins.
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1.3 Scale of Integration (SSI, MSI, LSI, VLSI, ULSI)
ERA Year Complexity(**Number of logic
blocks/chip)
Single transistor 1958 <1
Small Scale Unit Logic (One Gate) 1960 1
Integration(SSI) Multi function 1962 2-4
Complex Function 1964 5-20
Medium Scale Integration (MSI) 1967 20-200
Large Scale Integration(LSI) 1972 200-2000
Very Large Scale Integration (VLSI) 1978 2000-20,000
Ultra Large Scale Integration (ULSI) 1989 20,000-20,0000
Super Large Scale Integration(SLSI) 20,0000-20,00000
Extra Large Scale Integration (ELSI) 20,00000-20,000000
Giant Large Scale Integration(GLSI) 2000
or Till Now
Giant Scale Integration(GSI)
**A logic block can contain anywhere from 10 to 100 transistors, depending on the function.
1.4 Moore’s Law:
Gordon E. Moore was Chairman Emeritus of Intel Corporation. In 1965 he observed trends in
industry i.e. number of transistors on ICs vs release dates. He noticed number of transistors are
doubling with release of each new IC generation. Observing this he predicted “The number of
transistors on an integrated circuit will double every 18 months”. The level of integration of
silicon technology as measured in terms of number of devices per IC Semiconductor industry has
followed this prediction with surprising accuracy. So his prediction becomes law.

Introduction to Embedded System

Q1 Write short notes on ASIC/Classification of ASIC with brief description

ASIC, short form of Application Specific Integrated Circuit , is a microchip design to perform a specific
and unique applications. It is used as replacement to conventional general purpose logic chips. Because of
using single chip for integrates several functions there by reduces the system development cost. As a single
chip ASIC consumes a very small area in the total system and thereby helps in the design of smaller system
with high capabilities or functionalities. The developers of such chips may not be interested in revealing
the internal detail of it. ASICs can be pre-fabricated for a special application or it can be custom fabricated
by using the components from a re-usable “building block” library of components for a particular customer
application. Fabrication of ASICs requires a non-refundable initial investment (Non Recurring Engineering
(NRE) charges) for the process technology and configuration expenses. If the Non-Recurring Engineering
Charges (NRE) is born by a third party and the Application Specific Integrated Circuit (ASIC) is made
openly available in the market, the ASIC is referred as Application Specific Standard Product (ASSP). The
ASSP is marketed to multiple customers just as a general-purpose product, but to a smaller number of
customers since it is for a specific application. Some ASICs are proprietary products; the developers are
not interested in revealing the internal details.
Types of ASIC
Full Custom- Full-custom ASICs like microprocessors, which were designed and built to order for use by
a specific company. In the case of full-custom devices, design engineers have complete control over every
mask layer used to fabricate the silicon chip. The design of full-custom devices is highly complex and time-
consuming, but the resulting chips contain the maximum amount of logic with minimal waste of silicon
real estate.
Semi Custom- In this type of IC all of the logic cells are predesigned, precharacterized and pretested and
some of the mask layers are customized.
Gate arrays-Gate arrays are based on the idea of a basic cell consisting of a collection of unconnected
transistors and resistors. Each ASIC vendor determines what it considers to be the optimum mix of
components provided in its particular basic cell. Gate arrays offer considerable cost advantages in that the
transistors and other components are prefabricated, so only the metallization layers need to be customized.
The disadvantage is that most designs leave significant amounts of internal resources unutilized, the
placement of gates is constrained, and the routing of internal tracks is less than optimal. All of these factors
negatively impact the performance and power consumption of the design.
Channeled Gate Array-
Basic Cell
Space for Interconnect
Basic Cell

Here only the interconnect is customized. The interconnect uses predefined spaces between rows of basic
cell.
Channel less Gate Array-There is no predefined areas set aside for routing between cells on a channel less
Gate array. Instead routing is done over the top of the gate array devices. So some of the basic cells can not
be used in this case.
Structured Gate Array-It combines some of the features of standard cell based ASIC and Gate array based
ASIC. Here some of the chip area can be set aside for incorporation of memory cell, microcontroller even
small mechanical structure etc.
Standard Cell Based ASIC- In order to address the problems associated with gate arrays, standard cell
devices became available in the early 1980s. Unlike gate arrays, standard cell devices do not use the concept
of a basic cell, and no components are prefabricated on the chip. Special tools are used to place each logic
gate individually in the netlist and to determine the optimum way in which the gates are to be routed
(connected together). The results are then used to create custom photo-masks for every layer in the device’s
fabrication. The standard cell concept allows each logic function to be created using the minimum number
of transistors with no redundant components, and the functions can be positioned so as to facilitate any
connections between them. Standard cell devices, therefore, provide a closer-to-optimal utilization of the
silicon than do gate arrays. It save time, money and reduce risk by using a predesigned pretested and
precharacterized standard cell library.

Q2. Write short notes on CPLD.

The CPLD (Complex Programmable Logic Device) is a step up in complexity from the SPLD(Simple
Programmable Logic Device like PLA,PAL,PROM,GAL etc.); it builds on SPLD architecture and creates
a much larger design. Consequently, the SPLD can be used to integrate the functions of a number of discrete
digital ICs into a single device and the CPLD can be used to integrate the functions of a number of SPLDs
into a single device. The CPLD architecture is based on a small number of logic blocks and a global
programmable interconnect.
The CPLD consists of a number of logic blocks (sometimes referred to as functional blocks), each of which
contains a macrocell and either a PLA or PAL_ circuit arrangement. In this view, eight logic blocks are
shown. The macrocell provides additional circuitry to accommodate registered or nonregistered outputs,
along with signal polarity control. Polarity control provides an output that is a true signal or a complement
of the true signal. The actual number of logic blocks within a CPLD varies; the more logic blocks available,
the larger the design that can be configured. In the center of the design is a global programmable
interconnect. This interconnect allows connections to the logic block macrocells and the I/O cell arrays (the
digital I/O cells of the CPLD connecting to the pins of the CPLD package).
The programmable interconnect is usually based on either array-based interconnect or multiplexer-based
interconnect:
• Array-based interconnect allows any signal within the programmable interconnect to connect to any logic
block within the CPLD. This is achieved by allowing horizontal and vertical routing within the
programmable interconnect and allowing the crossover points to be connected or unconnected (the same
idea as with the PLA and PAL_), depending on the CPLD configuration.
• Multiplexer-based interconnect uses digital multiplexers connected to each of the macrocell inputs within
the logic blocks. Specific signals within the programmable interconnect are connected to specific inputs of
the multiplexers. It would not be practical to connect all internal signals within the programmable
interconnect to the inputs of all multiplexers due to size and speed of operation considerations.

Generic CPLD Architecture

Example Of CPLD Families
Some CPLD families from different vendors are listed below:
· Altera MAX 7000 and MAX 9000 families
· Atmel ATF and ATV families
· Lattice ispLSI family
· Lattice (Vantis) MACH family
· Xilinx XC9500 family

Q3. Write short notes on FPGA

Introduction to FPGA

Field programmable gate arrays (FPGAs) are digital integrated circuits (ICs) that contain configurable
(programmable) blocks of logic along with configurable interconnects between these blocks. Design
engineers can configure (program) such devices to perform a tremendous variety of tasks. Depending on
the way in which they are implemented, some FPGAs may only be programmed a single time (One time
programmable (OTP)), while others may be reprogrammed over and over again.

Why FPGA

There are different types of digital ICs including memory devices and microprocessors. Our interest
particularly lies on Programmable logic device (PLDs) ,Application specific integrated circuits (ASICs),
Application specific standard parts and of course FPGA.
PLDs are the devices whose internal architecture is predetermined by the manufacturer in such a way that
they can be performed by the engineers in the field to perform variety of different functions. In comparison
to FPGA, these devices contain a relatively less number of logic gates and so simple circuits with less
number of functions can be implemented by this.
ASICs and ASSPs can contain hundreds of millions logic gates and can be used to implement large and
complex functions. ASICs and ASSPs are custom designed to address a specific functions. The only
difference between ASIC and ASSP is that ASIC is designed and built to order by a specific company
where as ASSP is marketed to multiple customers.
Although ASICs offer the ultimate in size, complexity and performance but designing ASIC is very time
consuming and expensive and final design cannot be modified without creating a new version of the ASIC
device.
Thus FPGA occupy a place in between PLDs and ASICs because their functionality can be customized in
the field like PLD and they can contain hundreds of millions of gates and can be used to implement very
complex functions. The cost of FPGA is very much lower than that of ASIC and at the same time change
in design can be implemented in the same FPGA very easily.

FPGA Architecture:
Each FPGA vendor has its own FPGA architecture, but in general terms they are all a variation of that
shown in Figure.
The architecture consists of configurable logic blocks, configurable I/O blocks, and programmable
interconnect. Also, there will be clock circuitry for driving the clock signals to each logic block, and
additional logic resources such as ALUs, memory, and decoders may be available. The two basic types of
programmable elements for an FPGA are Static RAM and anti-fuses.

Configurable Logic Blocks (CLBs) contain the logic for the FPGA. Generally these CLBs will contain
enough logic to create a small state machine. It also contains flip-flops for clocked storage elements, and
multiplexers in order to route the logic within the block and to and from external resources.

A Configurable I/O Block is used to bring signals onto the chip and send them back off again. It consists
of an input buffer and an output buffer with three state and open collector output controls. Typically there
are pull up resistors on the outputs and sometimes pull down resistors. In addition, there is often a flip-flop
on outputs so that clocked signals can be output directly to the pins without encountering significant delay.
The interconnect of an FPGA is of two types. There are long lines which can be used to connect critical
CLBs that are physically far from each other on the chip without inducing much delay. There are also short
lines which are used to connect individual CLBs which are located physically close to each other. There
are often one or several switch matrices to connect these long and short lines together in specific ways.
Programmable switches inside the chip allow the connection of CLBs to interconnect lines and interconnect
lines to each other and to the switch matrix. Special long lines, called global clock lines, are specially
designed for low impedance and thus fast propagation times. These are connected to the clock buffers and
to each clocked element in each CLB. This is how the clocks are distributed throughout the FPGA.
Example FPGA Families

Examples of SRAM based FPGA families include the following:

· Altera FLEX family
· Atmel AT6000 and AT40K families
· Lucent Technologies ORCA family
· Xilinx XC4000 and Virtex families

Examples of Anti-fuse based FPGA families include the following:

· Actel SX and MX families
· Quicklogic pASIC family

Uses of FPGA

FPGAs are used extensively in four major areas of application: ASIC and custom silicon, DSP,
Microcontroller and communication chips.

 ASIC and custom silicon : FPGA is extensively used to implement a variety of designs that could
be previously implemented only by ASICs and custom silicon

 DSP (Digital Signal Processing) : High speed DSP is generally performed by DSP processors. But
now a days FPGAs can contain embedded microprocessors, dedicated arithmetic routing and large
amount of on chip RAM all of which helps DSP operations and it has been seen that if FPGAs are
being used the system would be faster by 500 times.

 Embedded Microcontroller: In the recent years Small microprocessors with memory and input
output devices are embedded in FPGA to find higher speed and low cost implementation.
  Communication chips: FPGAs are used to implement the glue logic that interfaces between
physical layer communication chips and high level networking layer. Today communication chips
and networking functions can be incorporated into a single FPGA

Q4. Difference in between ASIC and FPGA

Parameter ASIC FPGA
Programmability Not Programmable Programmable
Area 20 to 35 times less area than FPGA FPGA requires approximately
20 to 35 times more area than a
standard cell ASIC
Speed 3 to 4 times faster speed performance roughly 3 to
4 times slower than an ASIC
Power 10 times less dynamic power roughly 10 times as much
Consumption dynamic power
Turnaround Time Slow (minimum 4 weeks to 6 months) Very fast (within 1 day)

Q5.Difference in between CPLD and FPGA

Parameter CPLD FPGA
Architecture 1. Mainly PAL/PLA (AND-OR) 1. Gate Array type and dominated
and very limited clocked register by interconnect.
2. Programmable but Less flexible 2. Programmable and More flexible
Speed Fast and predictable Application dependent
Gate capacity 300 to 6000 (Low to medium) 800 to above 500000 (Medium to
very high)
Number of I/Os 30 to 200 50 to 400
Power 0.5 to 2.0 Watt static Very low static
Consumption 0.5 to 4.0 watt dynamic 0.1 to 2.0 watt dynamic
Application PAL type device integration Complex Board Integration
Fast memory Interface Complex controller Interface

Programmable Logic Device (PLD)

The first programmable ICs were generically referred to as programmable logic devices (PLDs).
It is broadly categorized as complex PLDs (CPLDs) and simple PLDs (SPLDs).Generally SPLD
consists of approx. maximum 300 transistor and CPLD consists of approx. maximum 30,000
transistors.
 PLD

SPLD CPLD

PROM PLA PAL

The three main types of SPLD architecture—programmable read only memories (PROM)
programmable logic array (PLA), programmable array of logic (PAL) are described below.

General Architecture:
PROMs, PLAs and PALs consist of AND plane and OR plane. They are programmable by users
only one time. Which plane is programmable by user is shown by the following table.

PLD AND plane OR plane

PROM fixed programmable
PLA programmable programmable
PAL programmable fixed

During design generally the following notation is used

Programmable----------x

Fixed-------------------- •
Programmable Read Only Memories (PROMs)
Programmable Read Only Memories, or PROMs, are simply memories that can be inexpensively
programmed by the user. Some PROMs can be programmed once only. Other PROMs, such as
EPROMs or EEPROMs can be erased and programmed multiple times. PROMs are excellent for
implementing any kind of combinatorial logic with a limited number of inputs and outputs. For
sequential logic, external clocked devices such as flip-flops or microprocessors must be added.
Also, PROMs tend to be extremely slow, so they are not useful for applications where speed is an
issue.

Function design using PROM

Here the AND plane is implemented by suitable decoder.
Example: Design the following function using PROM
A (X, Y, Z) = Σ m (3, 5, 6, 7)
B (X, Y, Z) = X.Z + X.Y

NOTE: To design function using PROM you need to convert the function as sum of minterms

Ans.
A (X, Y, Z) = Σ m (3, 5, 6, 7)
B (X, Y, Z) = X.Z + X.Y =Σ m (5, 6, 7) [This is left for readers to convert]
As there are 3 variables we need 3 x 8 decoder
So the design would look like

Programmable Logic Arrays (PLAs)

Programmable Logic Arrays (PLAs) were a solution to the speed and input limitations of PROMs.
PLAs consist of a large number of inputs connected to an AND plane, where different
combinations of signals can be logically ANDed together according to how the part is
programmed. The outputs of the AND plane go into an OR plane, where the terms are ORed
together in different combinations and finally outputs are produced. At the inputs and outputs there
are typically inverters so that logical NOTs can be obtained. These devices can implement a large
number of combinatorial functions, though not all possible combinations like a PROM can.
However, they generally have many more inputs and are much faster.
Example: Design the following functions using PLA
A(X, Y, Z) =Σ m (4, 6, 7)
B (X, Y, Z) = 𝑋. 𝑌+𝑌𝑍+Y.Z
NOTE: To design using PAL convert the function using SOP

Answer:
A(X, Y, Z) =Σ m (4, 6, 7) = 𝑋. 𝑌 + 𝑋. 𝑍 [minimize using K-map—left for user]
B (X, Y, Z) = 𝑋. 𝑍+𝑋𝑌+YZ

Programmable Array Logic (PALs)

The Programmable Array Logic (PAL) is a variation of the PLA. Like the PLA, it has a wide,
programmable AND plane for ANDing inputs together. However, the OR plane is fixed, limiting
the number of terms that can be ORed together. Other basic logic devices, such as multiplexers,
exclusive ORs, and latches are added to the inputs and outputs.

Example: Design the following functions using PALs

A(X, Y, Z) =Σ m (4, 6, 7)
B (X, Y, Z) = 𝑋. 𝑌+𝑌𝑍
NOTE: To design using PAL convert the function using SOP

Answer:
A(X, Y, Z) =Σ m (4, 6, 7) = 𝑋. 𝑌 + 𝑋. 𝑍
B (X, Y, Z) = 𝑋. 𝑌+𝑌𝑍

----------------------------------------------------END OF LECTURE-------------------------------------------------

Reference:
1. CMOS Digital Integrated Circuit, S.M.Kang & Y.Leblebici, TMH.
2. VLSI Design, Debaprasad Das, OUP
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Prepared By
Tapas Tewary , ECE Department, Academy of Technology