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The document discusses a CPU clock design that ensures alignment with the bus clock (HCLK) through the use of latches, allowing for adjustments in frequency and voltage while maintaining data integrity. It also describes ARM's Intelligent Energy Manager (IEM), which optimizes task performance and energy efficiency by monitoring operating system interfaces and task requirements. The IEM aims to enhance system performance without altering user applications, potentially allowing for additional energy savings through task annotations.

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Serajeldeen Ghalyoub 201-801-104
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5 views1 page

New Microsoft Word Document

The document discusses a CPU clock design that ensures alignment with the bus clock (HCLK) through the use of latches, allowing for adjustments in frequency and voltage while maintaining data integrity. It also describes ARM's Intelligent Energy Manager (IEM), which optimizes task performance and energy efficiency by monitoring operating system interfaces and task requirements. The IEM aims to enhance system performance without altering user applications, potentially allowing for additional energy savings through task annotations.

Uploaded by

Serajeldeen Ghalyoub 201-801-104
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as DOCX, PDF, TXT or read online on Scribd
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This approach requires a CPU clock that is always a multiple of the bus clock

(HCLK). We add latches at the interface between the CPU and the AMBA bus.
The CPU clock is adjusted so that its rising edge occurs roughly aligned to
the active (ris ing-edge) of bus clock HCLK With careful design, we can
maintain this relationship to within half a CPU clock period over all operating
conditions (including changing the voltage and clock frequency). We then
need to deal with the fact that the CPU clock can be early or late relative to
HCLK. To deal with the case of an early CPU clock, we over-constrain
synthesis to guarantee that data arrives early (by our worst case skew). If
the CPU clock is late, the latch assures that data is still available

Frequency and Voltage Scaling Design 137 ARM’s Intelligent Energy Manager
(IEM) is an example of an approach that instru ments certain operating
system interfaces to build a task level view of the underlying requirements at
the individual task or thread level. From this it builds an awareness of
producer and consumer task frequencies and deadlines. For example, for a
Graphical User Interface the calls to the window server and the perceived
display refresh rates may be used to judge the right level of performance for
interactive tasks. An extensible stack of “IEM” policies is added alongside the
operating system which then builds an aggregate level of performance
sufficient to meet the deadlines of the dynamically changing task load. The
aim is to leave the user applications unchanged, although in a high-volume
sys tem design there may be additional energy savings possible from simple
annotation of key real-time tasks to indicate their specific requirements to
the policy stack. Figure 9-14 shows how the example utilization trace shown
in the previous figure can be broken down with task knowledge to determine
that certain tasks are periodic. In this particular example there happened to
be a lightweight sound daemon running fre quently. This daemon is interrupt
driven and consumes data from a main audio decoder producer task. This
task needs to produce the next buffer of sound samples every 180ms or so.
In the mean time, the foreground user task consumes the rest of the
bandwidth some of the time, or is waiting on user interaction much of the
rest of the time

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