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 EM BED D ED SY STEM S:
REAL-TIME OPERATING SYSTEMS FOR
ARM CORTEX-M MICROCONTROLLERS

Volume 3
Fourth Edition,
January 2017

Jonathan W. Valvano
 Fourth edition
January 2017
ARM and uVision are registered trademarks of ARM Limited.
Cortex and Keil are trademarks of ARM Limited.
Stellaris and Tiva are registered trademarks Texas Instruments.
Code Composer Studio is a trademark of Texas Instruments.
All other product or service names mentioned herein are the trademarks of their respective
owners.

In order to reduce costs, this college textbook has been self-published. For more
information about my classes, my research, and my books, see
http://users.ece.utexas.edu/~valvano/

For corrections and comments, please contact me at: [email protected].

Please cite this book as: J. W. Valvano, Embedded Systems: Real-Time Operating
Systems for ARM ® Cortex  -M Microcontrollers, Volume 3,
http://users.ece.utexas.edu/~valvano/, ISBN: 978-1466468863.

Copyright © 2017 Jonathan W. Valvano

All rights reserved. No part of this work covered by the copyright herein may be
reproduced, transmitted, stored, or used in any form or by any means graphic,
electronic, or mechanical, including but not limited to photocopying, recording,
scanning, digitizing, taping, web distribution, information networks, or
information storage and retrieval, except as permitted under Section 107 or 108 of
the 1976 United States Copyright Act, without the prior written permission of the
publisher.
ISBN-13: 978-1466468863
ISBN-10: 1466468866
 Table of Contents

Preface to The Fourth Edition

Preface to Volume 3
Acknowledgements
1. Computer Architecture
1.1. Introduction to Real-Time Operating Systems
1.1.1. Real-time operating systems
1.1.2. Embedded Systems
1.2. Computer Architecture
1.2.1. Computers, processors, and microcontrollers
1.2.2. Memory
1.3. Cortex-M Processor Architecture
1.3.1. Registers
1.3.2. Stack
1.3.3. Operating modes
1.3.4. Reset
1.3.5. Clock system
1.4. Texas Instruments Cortex-M Microcontrollers
1.4.1. Introduction to I/O
1.4.2. Texas Instruments TM4C123 LaunchPad I/O pins
1.4.3. Texas Instruments TM4C1294 Connected LaunchPad I/O pins
1.4.4. Texas Instruments MSP432 LaunchPad I/O pins
1.4.5. Interfacing to a LaunchPad
1.5. ARM Cortex-M Assembly Language
1.5.1. Syntax
1.5.2. Addressing modes and operands
1.5.3. List of twelve instructions
1.5.4. Accessing memory
 1.5.5. Functions
1.5.6. ARM Cortex Microcontroller Software Interface Standard
1.5.7. Conditional execution
1.5.8. Stack usage
1.5.9. Floating-point math
1.5.10. Keil assembler directives
1.6. Pointers in C
1.6.1. Pointers
1.6.2. Arrays
1.6.3. Linked lists
1.7. Memory Management
1.7.1. Use of the heap
1.7.2. Simple fixed-size heap
1.7.3. Memory manager: malloc and free
1.8. Introduction to debugging
1.9. Exercises
2. Microcontroller Input/Output
2.1. Parallel I/O
2.1.1. TM4C I/O programming
2.1.2. MSP432 I/O programming
2.2. Interrupts
2.2.1. NVIC
2.2.2. SysTick periodic interrupts
2.2.3. Periodic timer interrupts
2.2.4. Critical sections
2.2.5. Executing periodic tasks
2.2.6. Software interrupts
2.3. First in First Out (FIFO) Queues
2.4. Edge-triggered Interrupts
2.4.1. Edge-triggered interrupts on the TM4C123
2.4.2. Edge-triggered Interrupts on the MSP432
 2.5. UART Interface
2.5.1. Transmitting in asynchronous mode
2.5.2. Receiving in asynchronous mode
2.5.3. Interrupt-driven UART on the TM4C123
2.5.4. Interrupt-driven UART on the MSP432
2.6. Synchronous Transmission and Receiving using the SSI
2.7. Input Capture or Input Edge Time Mode
2.7.1. Basic principles
2.7.2. Period measurement on the TM4C123
2.7.3. Period measurement on the MSP432
2.7.4. Pulse width measurement
2.7.5. Ultrasonic distance measurement
2.8. Pulse Width Modulation
2.8.1. Pulse width modulation on the TM4C123
2.8.2. Pulse width modulation on the MSP432
2.9. Analog Output
2.10. Analog Input
2.10.1. ADC Parameters
2.10.2. Internal ADC on TM4C
2.10.3. Internal ADC on MSP432
2.10.4. IR distance measurement
2.11. OS Considerations for I/O Devices
2.11.1 Board Support Package
2.11.2 Path Expression
2.12. Debugging
2.12.1. Functional Debugging
2.12.2. Performance Debugging (FFT analysis)
2.12.3. Debugging heartbeat
2.12.4. Profiling
2.13. Exercises
3. Thread Management
 3.1. Introduction to RTOS
3.1.1. Motivation
3.1.2. Parallel, distributed and concurrent programming
3.1.3. Introduction to threads
3.1.4. States of a main thread
3.1.5. Real-time systems
3.1.6. Producer/Consumer problem using a mailbox
3.1.7. Scheduler
3.2. Function pointers
3.3. Thread Management
3.3.1. Two types of threads
3.3.2. Thread Control Block (TCB)
3.3.3. Creation of threads
3.3.4. Launching the OS
3.3.5. Switching threads
3.3.6. Profiling the OS
3.3.7. Linking assembly to C
3.3.8. Periodic tasks
3.4. Semaphores
3.5. Thread Synchronization
3.5.1. Resource sharing, nonreentrant code or mutual exclusion
3.5.2. Condition variable
3.5.3. Thread communication between two threads using a mailbox
3.6. Process Management
3.7. Dynamic loading and linking
3.8. Exercises
4. Time Management
4.1. Cooperation
4.1.1. Spin-lock semaphore implementation with cooperation
4.1.2. Cooperative Scheduler
4.2. Blocking semaphores
 4.2.1. The need for blocking
4.2.2. The blocked state
4.2.3. Implementation
4.2.4. Thread rendezvous
4.3. First In First Out Queue
4.3.1. Producer/Consumer problem using a FIFO
4.3.2. Little’s Theorem
4.3.3. FIFO implementation
4.3.4. Three-semaphore FIFO implementation
4.3.5. Two-semaphore FIFO implementation
4.3.6. One-semaphore FIFO implementation
4.3.7. Kahn Process Networks
4.4. Thread sleeping
4.5. Deadlocks
4.6. Monitors
4.7. Fixed Scheduling
4.8. Exercises
5. Real-time Systems
5.1. Data Acquisition Systems
5.1.1. Approach
5.1.2. Performance Metrics
5.1.3. Audio Input/Output
5.2. Priority scheduler
5.2.1. Implementation
5.2.2. Multi-level Feedback Queue
5.2.3. Starvation and aging
5.2.4. Priority inversion and inheritance on Mars Pathfinder
5.3. Debouncing a switch
5.3.1. Approach to debouncing
5.3.2. Debouncing a switch on TM4C123
5.3.3. Debouncing a switch on MSP432
 5.4. Running event threads as high priority main threads
5.5. Available RTOS
5.5.1. Micrium uC/OS-II
5.5.2. Texas Instruments RTOS
5.5.3. ARM RTX Real-Time Operating System
5.5.4. FreeRTOS
5.5.5. Other Real Time Operating Systems
5.6. Exercises
6. Digital Signal Processing
6.1. Basic Principles
6.2. Multiple Access Circular Queue
6.3. Using the Z-Transform to Derive Filter Response
6.4. IIR Filter Design Using the Pole-Zero Plot
6.5. Discrete Fourier Transform
6.6. FIR Filter Design
6.7. Direct-Form Implementations.
6.8. Exercises
7. High-Speed Interfacing
7.1. The Need for Speed
7.2. High-Speed I/O Applications
7.3. General Approaches to High-Speed Interfaces
7.3.1. Hardware FIFO
7.3.2. Dual Port Memory
7.3.3. Bank-Switched Memory
7.4. Fundamental Approach to DMA
7.4.1. DMA Cycles
7.4.2. DMA Initiation
7.4.3. Burst versus Single Cycle DMA
7.4.4. Single Address versus Dual Address DMA
7.4.5. DMA programming on the TM4C123
7.6. Exercises
8. File system management
8.1. Performance Metrics
8.1.1. Usage
8.1.2. Specifications
8.1.3. Fragmentation
8.2. File System Allocation
8.2.1. Contiguous allocation
8.2.2. Linked allocation
8.2.3. Indexed allocation
8.2.4. File allocation table (FAT)
8.3. Solid State Disk
8.3.1. Flash memory
8.3.2. Flash device driver
8.3.3. eDisk device driver
8.3.4. Secure digital card interface
8.4. Simple File System
8.4.1. Directory
8.4.2. Allocation
8.4.3. Free space management
8.5. Write-once File System
8.5.1. Usage
8.5.2. Allocation
8.5.3. Directory
8.5.4. Append
8.5.5. Free space management
8.6. Readers-Writers Problem
8.7. Exercises
9. Communication Systems
9.1. Fundamentals
9.1.1. The network
9.1.2. Physical Channel
 9.1.3. Wireless Communication
9.1.4. Radio
9.2. Controller Area Network (CAN)
9.2.1. The Fundamentals of CAN
9.2.2. Texas Instruments TM4C CAN
9.3. Embedded Internet
9.3.1. Abstraction
9.3.2. Message Protocols
9.3.3. Ethernet Physical Layer
9.3.4. Ethernet on the TM4C1294
9.4. Internet of Things
9.4.1. Basic Concepts
9.4.2. UDP and TCP Packets
9.4.3. Web server
9.4.4. UDP communication over WiFi
9.4.5. Other CC3100 Applications
9.4. Bluetooth Fundamentals
9.4.1. Bluetooth Protocol Stack
9.4.2. Client-server Paradigm
9.5. CC2650 Solutions
9.5.1. CC2650 Microcontroller
9.5.2. Single Chip Solution, CC2650 LaunchPad
9.6. Network Processor Interface (NPI)
9.6.1. Overview
9.6.2. Services and Characteristics
9.6.3. Advertising
9.6.4. Read and Write Indications
9.7. Application Layer Protocols for Embedded Systems
9.7.1. CoAP
9.7.2 MQTT
9.8. Exercises
10. Robotic Systems
10.1. Introduction to Digital Control Systems
10.2. Binary Actuators
10.2.1. Electrical Interface
10.2.2. DC Motor Interface with PWM
10.3. Sensors
10.4. Odometry
10.5. Simple Closed-Loop Control Systems.
10.6. PID Controllers
10.6.1. General Approach to a PID Controller
10.6.2. Design Process for a PID Controller
10.7. Fuzzy Logic Control
10.8. Exercises
Appendix 1. Glossary
Appendix 2. Solutions to Checkpoints
Reference Material
Preface to The Fourth Edition
There are two major additions to this fourth edition. First, this version supports both
the TM4C and the MSP432 architectures. The material for the LM3S series has been
removed. Volumes 1 and 2 focused on the hardware and software aspects I/O
interfacing. In this volume we provide a set of low level device drivers allowing this
volume to focus on real-time operating systems, digital signal processing, control
systems, and the internet of things. The second addition is Bluetooth Low Energy
(BLE), which will be implemented by interfacing a CC2650, in a similar manner
with which IEEE802.11b wifi is implemented in this book using the CC3100.
Running on the CC2650 will be an application programmer interface called Simple
Network Processor (SNP). SNP allows the TM4C123/MSP432 microcontroller to
implement BLE using a simple set of UART messaging. Off-loading the BLE
functions to the CC2650 allows the target microcontroller to implement system level
functions without the burden of satisfying the real-time communication required by
Bluetooth.
Preface to Volume 3
Embedded systems are a ubiquitous component of our everyday lives. We interact
with hundreds of tiny computers every day that are embedded into our houses, our
cars, our toys, and our work. As our world has become more complex, so have the
capabilities of the microcontrollers embedded into our devices. The ARM Cortex-M
family represents the new class of microcontrollers much more powerful than the
devices available ten years ago. The purpose of this book is to present the design
methodology to train young engineers to understand the basic building blocks that
comprise devices like a cell phone, an MP3 player, a pacemaker, antilock brakes,
and an engine controller.
This book is the third in a series of three books that teach the fundamentals of
embedded systems as applied to the ARM Cortex-M family of microcontrollers. This
third volume is primarily written for senior undergraduate or first-year graduate
electrical and computer engineering students. It could also be used for professionals
wishing to design or deploy a real-time operating system onto an ARM platform. The
first book Embedded Systems: Introduction to ARM Cortex-M Microcontrollers is an
introduction to computers and interfacing focusing on assembly language and C
programming. The second book Embedded Systems: Real-Time Interfacing to ARM
Cortex-M Microcontrollers focuses on interfacing and the design of embedded
systems. This third book is an advanced book focusing on operating systems, high-
speed interfacing, control systems, and robotics.
An embedded system is a system that performs a specific task and has a computer
embedded inside. A system is comprised of components and interfaces connected
together for a common purpose. This book presents components, interfaces and
methodologies for building systems. Specific topics include microcontrollers, design,
verification, hardware/software synchronization, interfacing devices to the computer,
timing diagrams, real-time operating systems, data collection and processing, motor
control, analog filters, digital filters, and real-time signal processing.
In general, the area of embedded systems is an important and growing discipline
within electrical and computer engineering. In the past, the educational market of
embedded systems has been dominated by simple microcontrollers like the PIC, the
9S12, and the 8051. This is because of their market share, low cost, and historical
dominance. However, as problems become more complex, so must the systems that
solve them. A number of embedded system paradigms must shift in order to
accommodate this growth in complexity. First, the number of calculations per second
will increase from millions/sec to billions/sec. Similarly, the number of lines of
software code will also increase from thousands to millions. Thirdly, systems will
involve multiple microcontrollers supporting many simultaneous operations. Lastly,
the need for system verification will continue to grow as these systems are deployed
into safety critical applications. These changes are more than a simple growth in size
and bandwidth. These systems must employ parallel programming, high-speed
synchronization, real-time operating systems, fault tolerant design, priority interrupt
handling, and networking. Consequently, it will be important to provide our students
with these types of design experiences. The ARM platform is both low cost and
provides the high performance features required in future embedded systems.
Although the ARM market share is large and will continue to grow. Furthermore,
students trained on the ARM will be equipped to design systems across the complete
spectrum from simple to complex. The purpose of writing these three books at this
time is to bring engineering education into the 21st century.
This book employs many approaches to learning. It will not include an exhaustive
recapitulation of the information in data sheets. First, it begins with basic
fundamentals, which allows the reader to solve new problems with new technology.
Second, the book presents many detailed design examples. These examples illustrate
the process of design. There are multiple structural components that assist learning.
Checkpoints, with answers in the back, are short easy to answer questions providing
immediate feedback while reading. Homework problems, which typically are
simpler than labs, provide more learning opportunities. The book includes an index
and a glossary so that information can be searched. The most important learning
experiences in a class like this are of course the laboratories. More detailed lab
descriptions are available on the web. Specifically for Volume 1, look at the lab
assignments for EE319K. For Volume 2 refer to the EE445L labs, and for this
volume, look at the lab assignments for EE445M/EE380L.6.
There is a web site accompanying this book
http://users.ece.utexas.edu/~valvano/arm. Posted here are ARM Keil™ uVision®
and Texas Instruments Code Composer Studio™ projects for each of the example
programs in the book. You will also find data sheets and Excel spreadsheets relevant
to the material in this book.
The book will cover embedded systems for ARM ® Cortex™-M microcontrollers
with specific details on the TM4C123, TM4C1294, and MSP432. Most of the topics
can be run on any Texas Instruments Cortex M microcontroller. In these books the
terms MSP432 and TM4C will refer to any of the Texas Instruments ARM Cortex-M
based microcontrollers. Although the solutions are specific for the MSP432 and
TM4C families, it will be possible to use these books for other ARM derivatives.
Acknowledgements
I owe a wonderful debt of gratitude to Daniel Valvano. He wrote and tested most of
the software examples found in these books. Secondly, he maintains the example web
site, http://users.ece.utexas.edu/~valvano/arm. Lastly, he meticulously proofread
this manuscript.
Many shared experiences contributed to the development of this book. First I would
like to acknowledge the many excellent teaching assistants I have had the pleasure of
working with. Some of these hard-working, underpaid warriors include Pankaj
Bishnoi, Rajeev Sethia, Adson da Rocha, Bao Hua, Raj Randeri, Santosh Jodh,
Naresh Bhavaraju, Ashutosh Kulkarni, Bryan Stiles, V. Krishnamurthy, Paul Johnson,
Craig Kochis, Sean Askew, George Panayi, Jeehyun Kim, Vikram Godbole, Andres
Zambrano, Ann Meyer, Hyunjin Shin, Anand Rajan, Anil Kottam, Chia-ling Wei,
Jignesh Shah, Icaro Santos, David Altman, Nachiket Kharalkar, Robin Tsang, Byung
Geun Jun, John Porterfield, Daniel Fernandez, Deepak Panwar, Jacob Egner, Sandy
Hermawan, Usman Tariq, Sterling Wei, Seil Oh, Antonius Keddis, Lev Shuhatovich,
Glen Rhodes, Geoffrey Luke, Karthik Sankar, Tim Van Ruitenbeek, Raffaele Cetrulo,
Harshad Desai, Justin Capogna, Arindam Goswami, Jungho Jo, Mehmet Basoglu,
Kathryn Loeffler, Evgeni Krimer, Nachiappan Valliappan, Razik Ahmed, Sundeep
Korrapati, Song Zhang, Zahidul Haq, Matthew Halpern, Cruz Monrreal II, Pohan
Wu, Saugata Bhattacharyya, Dayo Lawal, Abhishek Agarwal, Sparsh Singhai,
Nagaraja Revanna, Mahesh Srinivasan, Victoria Bill, Alex Hsu, Dylan Zika, Chun-
Kai Chang, Zhao Zheng, Ce Wei, Kelsey Taylor Ball, Brandon Nguyen, Turan Vural,
Schuyler Christensen, Danny Vo, Justin Nguyen, Danial Rizvi, Armand Behroozi,
Vivian Tan, Anthony Bauer, Jun Qi Lau, Corey Cormier, Cody Horton, Youngchun
Kim, Ryan Chow, Cody Horton, Corey Cormier, and Dylan Zika. These teaching
assistants have contributed greatly to the contents of this book and particularly to its
laboratory assignments. Since 1981, I estimate I have taught embedded systems to
over 5000 students. My students have recharged my energy each semester with their
enthusiasm, dedication, and quest for knowledge. I have decided not to acknowledge
them all individually. However, they know I feel privileged to have had this
opportunity.
Next, I appreciate the patience and expertise of my fellow faculty members here at
the University of Texas at Austin. From a personal perspective Dr. John Pearce
provided much needed encouragement and support throughout my career. Over the
last few years, I have enjoyed teaching embedded systems with Drs. Ramesh
Yerraballi, Mattan Erez, Andreas Gerstlauer, and William Bard. Bill has contributed
to both the excitement and substance of our laboratory based on this book. Many of
the suggestions and corrections from Chris Shore and Drew Barbier of ARM about
Volume 1 applied equally to this volume. Austin Blackstone created and debugged the
Code Composer StudioTM versions of the example programs posted on the web.
Austin also taught me how to run the CC3000 and CC3100 Wifi examples on the
LaunchPad.
Ramesh Yerraballi and I have created two MOOCs, which have had over 110,000
students, and delivered to 110 countries. The new material in this book was
developed under the watchful eye of Professor Yerraballi. It has been an honor and
privilege to work with such a skilled and dedicated educator.
Andreas Gerstlauer has taught a course based on this book multiple times, and I have
incorporated many of his ideas into this edition of the book. Furthermore, you will
find a rich set of material if you search with these keywords Gerstlauer RTOS
utexas.
Sincerely, I appreciate the valuable lessons of character and commitment taught to me
by my parents and grandparents. I recall how hard my parents and grandparents
worked to make the world a better place for the next generation. Most significantly, I
acknowledge the love, patience and support of my wife, Barbara, and my children,
Ben Dan and Liz. In particular, Dan designed and tested most of the MSP432 and
TM4C software presented in this book.
By the grace of God, I am truly the happiest man on the planet, because I am
surrounded by these fine people.
Jonathan W. Valvano
Good luck
1. Computer Architecture

Chapter 1 objectives are to:

• Present a brief review of computer architecture
• Overview the ARM ® Cortex ™ -M processor including assembly
language
• Introduce the Texas Instruments MSP432/TM4C family of
microcontrollers

The overall objective of this book is to teach the design of real-time operating
systems for embedded systems. We define a system as real time if there is a
small and bounded delay between the time when a task should be completed
and when it is actually completed. We will present both fundamental principles
and practical solutions. Interfacing to the microcontroller was presented in
detail in Volume 2 and reviewed in the first two chapters of this book. The
overlap allows this book to stand alone as a text to teach embedded real time
operating systems. This first chapter will review the architecture of the Texas
Instruments MSP432/TM4C family of microcontrollers. When designing
operating systems, we need to understand the details of the architecture. In
particular, we must perform many functions in assembly language. Furthermore,
managing memory will require an intimate understanding of how the processor
accesses memory at the most basic level.
1.1. Introduction to Real-Time Operating Systems

1.1.1. Real-time operating systems

A computer system has many types of resources such as memory, I/O, data, and
processors. A real-time operating system (RTOS) is software that manages these
resources, guaranteeing all timing constraints are satisfied. Figure 1.1 illustrates the
relationship between hardware and software. On the left is a basic system without an
operating system. Software is written by a single vendor for a specific
microcontroller. As the system becomes more complex (middle figure), an operating
system facilitates the integration of software from multiple vendors. By providing a
hardware abstraction layer (HAL) an operating system simplifies porting
application code from one microcontroller to another. In order to provide additional
processing power, embedded systems of the future will require multiple
microcontrollers, processors with specialized coprocessors and/or a microcontroller
with multiple cores (right figure). Synchronization and assigning tasks across
distributed processors are important factors. As these systems become more
complex, the role of the operating system will be increasingly important.

Figure 1.1. An operating system is a software layer between the application

software and the hardware.

The RTOS must manage resources like memory, processor and I/O. The RTOS will
guarantee strict timing constraints and provide reliable operation. The RTOS will
support synchronization and communication between tasks. As complex systems are
built the RTOS manages the integration of components. Evolution is the notion of a
system changing to improve performance, features and reliability. The RTOS must
manage change. When designing a new system, it is good design practice to build a
new system by changing an existing system. The notion of portability is the ease at
which one system can be changed or adapted to create another system.
The response time or latency is the delay from a request to the beginning of the
service of that request. There are many definitions of bandwidth. In this book we
define bandwidth as the number of information bytes/sec that can be transferred or
 processed. We can compare and contrast regular operating systems with real-time
operating systems.
Regular OS Real-time OS
Complex Simple
Best effort Guaranteed response
Fairness Strict timing constraints
Average bandwidth Minimum and maximum
limits
Unknown components Known components
Unpredictable behavior Predictable behavior
Plug and play Upgradable
Table 1.1. Comparison of regular and real-time operating systems.
From Table 1.1 we see that real-time operating systems have to be simple so they may be
predictable. While traditional operating systems gauge their performance in terms of
response time and fairness, real-time operating systems target strict timing constraints and
upper, lower bounds on bandwidth. One can expect to know all the components of the
system at design time and component changes happen much more infrequently.
Checkpoint 1.1: What does real time mean?

1.1.2. Embedded Systems

An embedded system is a smart device with a processor that has a special and
dedicated purpose. The user usually does not or cannot upgrade the
hardware/software or change what the system does. Real time means that the
embedded system must respond to critical events within a strictly defined time,
called the deadline. A guarantee to meet all deadlines can only be made if the
behavior of the operating system can be predicted. In other words the timing must be
deterministic. There are five types of software functions the processor can perform in
an embedded system. Similar to a general-purpose computer, it can perform
mathematical and/or data processing operations. It can analyze data and make
decisions based on the data. A second type involves handling and managing time: as
an input (e.g., measure period), an output (e.g., output waveforms), and a means to
synchronize tasks (e.g., run 1000 times a second). A third type involves real-time
input/output for the purpose of measurement or control. The fourth type involves
digital signal processing (DSP), which are mathematical calculations on data
streams. Examples include audio, video, radar, and sonar. The last type is
communication and networking. As embedded systems become more complex, how
the components are linked together will become increasingly important.
There are two classifications of embedded systems as shown in Figure 1.2. A
transformative system collects data from inputs, makes decisions, and affects its
environment by driving actuators. The robot systems presented in Chapter 10 are
 examples of transformative systems. A reactive system collects data in a continuous
fashion and produce outputs also in a continuous fashion. Digital signal processing
algorithms presented in Chapter 6 are examples of reactive systems.

Figure 1.2. Embedded systems can transform or react to the environment.

Six constraints typify an embedded system. First, they are small size. For example,
many systems must be handheld. Second, they must have low weight. If the device is
deployed in a system that moves, e.g., attached to a human, aircraft or vehicle, then
weight incurs an energy cost. Third, they often must be low power. For example, they
might need to operate for a long time on battery power. Low power also impacts the
amount of heat they are allowed to generate. Fourth, embedded systems often must
operate in harsh environments, such as heat, pressure, vibrations, and shock. They
may be subject to noisy power, RF interference, water, and chemicals. Fifth,
embedded systems are often used in safety critical systems. Real-time behavior is
essential. For these systems they must function properly at extremely high levels of
reliability. Lastly, embedded systems are extremely sensitive to cost. Most
applications are profit-driven. For high-volume systems a difference in pennies can
significantly affect profit.
Checkpoint 1.2: What is an embedded system?
Checkpoint 1.3: List the six constraints typically found in an embedded system?
1.2. Computer Architecture

1.2.1. Computers, processors, and microcontrollers

Given that an operating system is a manager of resources provided by the underlying
architecture, it would serve the reader well to get acquainted with the architecture the
OS must manage. In this section we will delve into these details of the building
blocks of computer architecture, followed by the specifics of the ARM Cortex M4
processor architecture, in particular TI’s implementation of the ARM ISA found on
the TM4C and MSP432.
A computer combines a central processing unit (CPU), random access memory
(RAM), read only memory (ROM), and input/output (I/O) ports. The common bus in
Figure 1.3 defines the von Neumann architecture. Software is an ordered sequence
of very specific instructions that are stored in memory, defining exactly what and
when certain tasks are to be performed.

Figure 1.3. The basic components of a computer system include processor,

memory and I/O.
The CPU or processor executes the software by retrieving (from memory) and
interpreting these instructions one at a time. An ARM Cortex-M microcontroller
includes a processor, memory and input/output. The processor, memory and
peripherals are connected via multiple buses. Because instructions are fetched via
the ICode bus and data are fetched via the System bus, the Cortex M is classified as a
Harvard architecture. Having multiple busses allows the system to do several things
simultaneously. For example, the processor could be reading an instruction from
ROM using the ICode bus and writing data to RAM using the System bus.
The ARM Cortex-M processor has four major components, as illustrated in Figure
1.4. There are bus interface units (BIU) that read data from the bus during a read
 cycle and write data onto the bus during a write cycle. The BIU always drives the
address bus and the control signals of the bus. The effective address register (EAR)
contains the memory address used to fetch the data needed for the current instruction.
Cortex-M microcontrollers execute Thumb instructions extended with Thumb-2
technology. An overview of these instructions will be presented in Section 1.5. Many
functions in an operating system will require detailed understanding of the
architecture and assembly language.
The control unit (CU) orchestrates the sequence of operations in the processor. The
CU issues commands to the other three components. The instruction register (IR)
contains the operation code (or op code) for the current instruction. When extended
with Thumb-2 technology, op codes are either 16 or 32 bits wide.
The arithmetic logic unit (ALU) performs arithmetic and logic operations. Addition,
subtraction, multiplication and division are examples of arithmetic operations.
Examples of logic operations are, and, or, exclusive-or, and shift. Many processors
used in embedded applications support specialized operations such as table lookup,
multiply and accumulate, and overflow detection.

Figure 1.4. The four basic components of a processor.

A very small microcomputer, called a microcontroller, contains all the components
of a computer (processor, memory, I/O) on a single chip. The Atmel ATtiny and the
TI TM4C123 are examples of microcontrollers. Because a microcomputer is a small
computer, this term can be confusing because it is used to describe a wide range of
systems from a 6-pin ATtiny4 running at 1 MHz with 512 bytes of program memory to
a personal computer with state-of-the-art 64-bit multi-core processor running at
multi-GHz speeds having terabytes of storage.
An application-specific integrated circuit (ASIC) is digital logic that solves a very
specific problem. See Figure 1.5. A field-programmable gate array (FPGA) is one
approach to ASIC prototyping, allowing you to program and reprogram the digital
logic. Verilog and VHDL are example FPGA programming environments. ASIC
design is appropriate for problems defined with logic and/or numerical equations.
On the other hand, microcontrollers are appropriate for problems solved with
algorithms or sequential processes. Mature problems with high volume can create
ASIC solutions directly as digital logic integrated circuits. On the other hand,
microcontrollers can be used for low-volume problems and have the advantage of
having a shorter time to market. Microcontrollers, because they are programmed with
software, allow a flexibility to upgrade features, provide user-tailored performance,
 and solve problems with uncertain or changing requirements. Some systems have
both microcontrollers and ASICs.

Figure 1.5. A system implemented with an ASIC and I/O.

In an embedded system the software is converted to machine code, which is a list of
instructions, and stored in nonvolatile flash ROM. As instructions are fetched, they
are placed in a pipeline. This allows instruction fetching to run ahead of execution.
Instructions on the Cortex-M processor are fetched in order and executed in order.
However, it can execute one instruction while fetching the next. Many high-speed
processors allow out of order execution, support parallel execution on multiple
cores, and employ branch prediction.
On the ARM Cortex-M processor, an instruction may read memory or write memory,
but does not read and write memory in the same instruction. Each of the phases may
require one or more bus cycles to complete. Each bus cycle reads or writes one
piece of data. Because of the multiple bus architecture, most instructions execute in
one or two cycles. For more information on the time to execute instructions, see
Table 3.1 in the Cortex-M Technical Reference Manual.
Figure 1.6 shows a simplified block diagram of a microcontroller based on the ARM
Cortex-M processor. It is a Harvard architecture because it has separate data and
instruction buses.

Figure 1.6. Harvard architecture of an ARM Cortex-M-based

microcontroller.
The instruction set combines the high performance typical of a 32-bit processor with
high code density typical of 8-bit and 16-bit microcontrollers. Instructions are
fetched from flash ROM using the ICode bus. Data are exchanged with memory and
 I/O via the system bus interface. There are many sophisticated debugging features
utilizing the DCode bus. An interrupt is a hardware-triggered software function,
which is extremely important for real-time embedded systems. The latency of an
interrupt service is the time between hardware trigger and software response. Some
internal peripherals, like the nested vectored interrupt controller (NVIC),
communicate directly with the processor via the private peripheral bus (PPB). The
tight integration of the processor and interrupt controller provides fast execution of
interrupt service routines (ISRs), dramatically reducing the interrupt latency.
Checkpoint 1.4: Why do you suppose the Cortex M has so many busses?
Checkpoint 1.5: Notice the debugger exists on the DCode bus. Why is this a good
idea?

1.2.2. Memory
One kibibyte (KiB) equals 1024 bytes of memory. The TM4C123 has 256 kibibytes
(218 bytes) of flash ROM and 32 kibibytes (215 bytes) of RAM. The MSP432 also has
256 kibibytes (218 bytes) of flash ROM but has 64 kibibytes (216 bytes) of RAM. We
view the memory as continuous virtual address space with the RAM beginning at
0x2000.0000, and the flash ROM beginning at 0x0000.0000.
The microcontrollers in the Cortex-M family differ by the amount of memory and by
the types of I/O modules. There are hundreds of members in this family; some of them
are listed in Table 1.2. The memory maps of TM4C123 and MSP432 are shown in
Figure 1.7. Although this course focuses on two microcontrollers from Texas
Instruments, all ARM Cortex-M microcontrollers have similar memory maps. In
general, Flash ROM begins at address 0x0000.0000, RAM begins at 0x2000.0000,
the peripheral I/O space is from 0x4000.0000 to 0x5FFF.FFFF, and I/O modules on
the private peripheral bus exist from 0xE000.0000 to 0xE00F.FFFF. In particular, the
only differences in the memory map for the various members of the Cortex-M family
are the ending addresses of the flash and RAM.
Part number RAM Flash I/O I/O modules
MSP432P401RIPZ 64 256 84 floating point, DMA
TM4C123GH6PM 32 256 43 floating point, CAN, DMA,
USB, PWM
TM4C1294NCPDT 256 1024 90 floating point, CAN, DMA,
USB, PWM, Ethernet
STM32F051R8T6 8 64 55 DAC, Touch sensor, DMA,
I2S, HDMI, PWM
MKE02Z64VQH2 4 64 53 PWM
KiB KiB pins
Table 1.2. Memory and I/O modules (all have SysTick, RTC, timers, UART, I2C, SSI, and
ADC).
Having multiple buses means the processor can perform multiple tasks in parallel.
On the TM4C123, general purpose input/output (GPIO) ports can be accessed using
either the PPB or AHPB. The following is some of the tasks that can occur in parallel
ICode bus Fetch opcode from ROM
DCode bus Read constant data from ROM
System bus Read/write data from RAM or I/O, fetch opcode from RAM
PPB Read/write data from internal peripherals like the NVIC
AHPB Read/write data from internal peripherals like the USB
Instructions and data are accessed using a common bus on a von Neumann machine.
The Cortex-M processor is a Harvard architecture because instructions are fetched
on the ICode bus and data accessed on the system bus. The address signals on the
ARM Cortex-M processor include 32 lines, which together specify the memory
address (0x0000.0000 to 0xFFFF.FFFF) that is currently being accessed. The
address specifies both which module (input, output, RAM, or ROM) as well as
which cell within the module will communicate with the processor. The data signals
contain the information that is being transferred and also include 32 bits. However,
on the system bus it can also transfer 8-bit or 16-bit data. The control signals specify
the timing, the size, and the direction of the transfer.

Figure 1.7. Memory map of the TM4C123 with 256k ROM and 32k RAM and
the MSP432 with 256k ROM and 64k RAM.
Checkpoint 1.6: What do we put in RAM and what do we put in ROM?
Checkpoint 1.7: Can software write into the ROM of our microcontroller?
The ARM Cortex-M processor uses bit-banding to allow read/write access to
individual bits in RAM and some bits in the I/O space. There are two parameters that
define bit-banding: the address and the bit you wish to access. Assume you wish to
access bit b of RAM address 0x2000.0000+n, where b is a number 0 to 7. The
aliased address for this bit will be
0x2200.0000 + 32*n + 4*b
 Reading this address will return a 0 or a 1. Writing a 0 or 1 to this address will
perform an atomic read-modify-write modification to the bit.
If we consider 32-bit word-aligned data in RAM, the same bit-banding formula still
applies. Let the word address be 0x2000.0000+n. n starts at 0 and increments by 4.
In this case, we define b as the bit from 0 to 31. In little-endian format, bit 1 of the
byte at 0x2000.0001 is the same as bit 9 of the word at 0x2000.0000.The aliased
address for this bit will still be
0x2200.0000 + 32*n + 4*b
Examples of bit-banded addressing are listed in Table 1.3. Writing a 1 to location
0x2200.0018 will set bit 6 of RAM location 0x2000.0000. Reading location
0x2200.0024 will return a 0 or 1 depending on the value of bit 1 of RAM location
0x2000.0001.
RAM Offset Bit b Bit-banded
address n alias
0x2000.0000 0 0 0x2200.0000
0x2000.0000 0 1 0x2200.0004
0x2000.0000 0 2 0x2200.0008
0x2000.0000 0 3 0x2200.000C
0x2000.0000 0 4 0x2200.0010
0x2000.0000 0 5 0x2200.0014
0x2000.0000 0 6 0x2200.0018
0x2000.0000 0 7 0x2200.001C
0x2000.0001 1 0 0x2200.0020
0x2000.0001 1 1 0x2200.0024
Table 1.3. Examples of bit-banded addressing.
Checkpoint 1.8: What address do you use to access bit 3 of the byte at
0x2000.1010?
Checkpoint 1.9: What address do you use to access bit 22 of the word at
0x2001.0000?
The other bit-banding region is the I/O space from 0x4000.0000 through
0x400F.FFFF. In this region, let the I/O address be 0x4000.0000+n, and let b
represent the bit 0 to 7. The aliased address for this bit will be 0x4200.0000 + 32*n
+ 4*b
Checkpoint 1.10: What address do you use to access bit 7 of the byte at
0x4000.0030?
1.3. Cortex-M Processor Architecture

1.3.1. Registers
The registers on an ARM Cortex-M processor are depicted in Figure 1.8. R0 to R12
are general purpose registers and contain either data or addresses. Register R13
(also called the stack pointer, SP) points to the top element of the stack. Actually,
there are two stack pointers: the main stack pointer (MSP) and the process stack
pointer (PSP). Only one stack pointer is active at a time. In a high-reliability
operating system, we could activate the PSP for user software and the MSP for
operating system software. This way the user program could crash without disturbing
the operating system. Most of the commercially available real-time operating systems
available on the Cortex M will use the PSP for user code and MSP for OS code.
Register R14 (also called the link register, LR) is used to store the return location for
functions. The LR is also used in a special way during exceptions, such as interrupts.
Register R15 (also called the program counter, PC) points to the next instruction to
be fetched from memory. The processor fetches an instruction using the PC and then
increments the PC by the length (in bytes) of the instruction fetched.
Checkpoint 1.11: How are registers R13 R14 and R15 special?

Figure 1.8. The registers on the ARM Cortex-M processor.

The ARM Architecture Procedure Call Standard, AAPCS, part of the ARM
Application Binary Interface (ABI), uses registers R0, R1, R2, and R3 to pass input
parameters into a C function or an assembly subroutine. Also according to AAPCS
we place the return parameter in Register R0. The standard requires functions to
preserve the contents of R4-R11. In other words, functions save R4-R11, use R4-
 R11, and then restore R4-R11 before returning. Another restriction is to keep the
stack aligned to 64 bits, by pushing and popping an even number of registers.
There are three status registers named Application Program Status Register (APSR),
the Interrupt Program Status Register (IPSR), and the Execution Program Status
Register (EPSR) as shown in Figure 1.9. These registers can be accessed
individually or in combination as the Program Status Register (PSR).

Figure 1.9. The program status register of the ARM Cortex-M processor.
The N, Z, V, C, and Q bits signify the status of the previous ALU operation. Many
instructions set these bits to signify the result of the operation. In general, the N bit is
set after an arithmetical or logical operation signifying whether or not the result is
negative. Similarly, the Z bit is set if the result is zero. The C bit means carry and is
set on an unsigned overflow, and the V bit signifies signed overflow. The Q bit is the
sticky saturation flag, indicating that “saturation” has occurred, and is set by
the SSAT and USAT instructions.
The T bit will always be 1, indicating the ARM Cortex-M processor is executing
Thumb instructions. The ICI/IT bits are used by interrupts and by IF-THEN
instructions. The ISR_NUMBER indicates which interrupt if any the processor is
handling. Bit 0 of the special register PRIMASK is the interrupt mask bit, or I bit. If
this bit is 1 most interrupts and exceptions are not allowed. If the bit is 0, then
interrupts are allowed. Bit 0 of the special register FAULTMASK is the fault mask
bit. If this bit is 1 all interrupts and faults are disallowed. If the bit is 0, then
interrupts and faults are allowed. The nonmaskable interrupt (NMI) is not affected by
these mask bits. The BASEPRI register defines the priority of the executing
software. It prevents interrupts with lower or equal priority from interrupting the
current execution but allows higher priority interrupts. For example if BASEPRI
equals 3, then requests with level 0, 1, and 2 can interrupt, while requests at levels 3
and higher will be postponed. The details of interrupt processing will be presented in
detail, later in the book.
Checkpoint 1.12: Where is the I bit and what does it mean?

1.3.2. Stack
 The stack is a last-in-first-out temporary storage. Managing the stack is an important
function for the operating system. To create a stack, a block of RAM is allocated for
this temporary storage. On the ARM Cortex-M processor, the stack always operates
on 32-bit data. The stack pointer (SP) points to the 32-bit data on the top of the stack.
The stack grows downwards in memory as we push data on to it so, although we
refer to the most recent item as the “top of the stack” it is actually the item stored at
the lowest address! To push data on the stack, the stack pointer is first decremented
by 4, and then the 32-bit information is stored at the address specified by SP. To pop
data from the stack, the 32-bit information pointed to by SP is first retrieved, and then
the stack pointer is incremented by 4. SP points to the last item pushed, which will
also be the next item to be popped. The processor allows for two stacks, the main
stack and the process stack, with independent copies of the stack pointer. The boxes
in Figure 1.10 represent 32-bit storage elements in RAM. The grey boxes in the
figure refer to actual data stored on the stack, and the white boxes refer to locations
in memory that do not contain stack data. This figure illustrates how the stack is used
to push the contents of Registers R0, R1, and R2 in that order. Assume Register R0
initially contains the value 1, R1 contains 2 and R2 contains 3. The drawing on the
left shows the initial stack. The software executes these six
PUSH {R0}
PUSH {R1}
PUSH {R2}
POP {R3}
POP {R4}
POP {R5}

Figure 1.10. Stack picture showing three numbers first being pushed, then
three numbers being popped.
We can push and pop multiple registers; these six instructions could be replaced with

PUSH {R0-R2}
POP {R3-R5}

The instruction PUSH {R0} saves the value of R0 on the stack. It first decrements SP
by 4, and then it stores the contents of R0 into the memory location pointed to by SP.
The right-most drawing shows the stack after the push occurs three times. The stack
contains the numbers 1 2 and 3, with 3 on top. The instruction POP{R3} retrieves
data from the stack. It first moves the value from memory pointed to by SP into R3,
and then it increments SP by 4. After the pop occurs three times the stack reverts to
its original state and registers R3, R4 and R5 contain 3 2 1 respectively. We define
the 32-bit word pointed to by SP as the top entry of the stack. If it exists, we define
the 32-bit data immediately below the top, at SP+4, as next to top. Proper use of the
stack requires following these important rules
1. Functions should have an equal number of pushes and pops
2. Stack accesses (push or pop) should not be performed outside the
allocated area
3. Stack reads and writes should not be performed within the free
area
4. Stack push should first decrement SP, then store the data
5. Stack pop should first read the data, and then increment SP

Functions that violate rule number 1 will probably crash when incorrect data are
popped off at a later time. Violations of rule number 2 can be caused by a stack
underflow or overflow. Overflow occurs when the number of elements became larger
than the allocated space. Stack underflow is caused when there are more pops than
pushes, and is always the result of a software bug. A stack overflow can be caused
by two reasons. If the software mistakenly pushes more than it pops, then the stack
pointer will eventually overflow its bounds. Even when there is exactly one pop for
each push, a stack overflow can occur if the stack is not allocated large enough. The
processor will generate a bus fault when the software tries read from or write to an
address that doesn’t exist. If valid RAM exists below the stack then further stack
operations will corrupt data in this memory.
First, we will consider the situation where the allocated stack area is placed at the
beginning of RAM. For example, assume we allocate 4096 bytes for the stack from
0x2000.0000 to 0x2000.0FFF; see the left side of Figure 1.11. The SP is initialized
to 0x2000.1000, and the stack is considered empty. If the SP becomes less than
0x2000.0000 a stack overflow has occurred. The stack overflow will cause a bus
fault because there is nothing at address 0x1FFF.FFFC. If the software tries to read
from or write to any location greater than or equal to 0x2000.1000 then a stack
underflow has occurred. At this point the stack and global variables exist at
overlapping addresses. Stack underflow is a very difficult bug to recognize, because
the first consequence will be unexplained changes to data stored in global variables.
Figure 1.11. Drawings showing two possible ways to allocate the stack area
in RAM.
Next, we will consider the situation where the allocated stack area is placed at the
end of RAM. The TM4C123 has 32 KiB of RAM from 0x2000.0000 to
0x2000.7FFF. So in this case we allocate the 4096 bytes for the stack from
0x2000.7000 to 0x2000.7FFF, shown on the right side of Figure 1.11. The SP is
initialized to 0x2000.8000, and the stack is considered empty. If the SP becomes less
than 0x2000.7000 a stack overflow has occurred. The stack overflow will not cause
a bus fault because there is memory at address 0x2000.6FFC. Stack overflow in this
case is a very difficult bug to recognize, because the first consequence will be
unexplained changes to data stored below the stack region. If the software tries to
read from or write to any location greater than or equal to 0x2000.8000 then a stack
underflow has occurred. In this case, stack underflow will cause a bus fault.
Executing an interrupt service routine will automatically push eight 32-bit words
ontothe stack. Since interrupts are triggered by hardware events, exactly when they
occur is not under software control. Therefore, violations of rules 3, 4, and 5 will
cause erratic behavior when operating with interrupts. Rules 4 and 5 are followed
automatically by the PUSH and POP instructions.

1.3.3. Operating modes

The ARM Cortex-M processor has two privilege levels called privileged and
unprivileged. Bit 0 of the CONTROL register is the thread mode privilege level
(TPL). If TPL is 1 the processor level is privileged. If the bit is 0, then processor
level is unprivileged. Running at the unprivileged level prevents access to various
features, including the system timer and the interrupt controller. Bit 1 of the
CONTROL register is the active stack pointer selection (ASPSEL). If ASPSEL is 1,
the processor uses the PSP for its stack pointer. If ASPSEL is 0, the MSP is used.
When designing a high-reliability operating system, we will run the user code at an
unprivileged level using the PSP and the OS code at the privileged level using the
MSP.
The processor knows whether it is running in the foreground (i.e., the main program)
or in the background (i.e., an interrupt service routine). ARM defines the foreground
as thread mode, and the background as handler mode. Switching between thread
 and handler modes occurs automatically. The processor begins in thread mode,
signified by ISR_NUMBER=0. Whenever it is servicing an interrupt it switches to
handler mode, signified by setting ISR_NUMBER to specify which interrupt is being
processed. All interrupt service routines run using the MSP. In particular, the context
is saved onto whichever stack pointer is active, but during the execution of the ISR,
the MSP is used. For a high reliability operation all interrupt service routines will
reside in the operating system. User code can be run under interrupt control by
providing hooks, which are function pointers. The user can set function pointers
during initialization, and the operating system will call the function during the
interrupt service routine.

Observation: Processor modes and the stack are essential components of

building a reliable operating system. In particular the processor mode is an
architectural feature that allows the operating system to restrict access to critical
system resources.

1.3.4. Reset
A reset occurs immediately after power is applied and can also occur by pushing the
reset button available on most boards. After a reset, the processor is in thread mode,
running at a privileged level, and using the MSP stack pointer. The 32-bit value at
flash ROM location 0 is loaded into the SP. All stack accesses are word aligned.
Thus, the least significant two bits of SP must be 0. A reset also loads the 32-bit
value at location 4 into the PC. This value is called the reset vector. All instructions
are halfword aligned. Thus, the least significant bit of PC must be 0. However, the
assembler will set the least significant bit in the reset vector, so the processor will
properly initialize the Thumb bit (T) in the PSR. On the Cortex-M processor, the T
bit should always be set to 1. On reset, the processor initializes the LR to
0xFFFFFFFF.

1.3.5. Clock system

Normally, the execution speed of a microcontroller is determined by an external
crystal. The Texas Instruments MSP-EXP432P401R board has a 48 MHz crystal. The
Texas Instruments EK-TM4C123GXL and EK-TM4C1294-XL boards have a 16
MHz crystal. The TM4C microcontrollers have a phase-lock-loop (PLL) that allows
the software to adjust the execution speed of the computer. Typically, the choice of
frequency involves the tradeoff between software execution speed and electrical
power. In other words, slowing down the bus clock will require less power to
operate and generate less heat. Speeding up the bus clock obviously allows for more
calculations per second.
The default bus speed of the MSP432 and TM4C microcontrollers is that of the
internal oscillator. For example, the default bus speed for the MSP432 is 3 MHz
±0.5%. The default bus speed for the TM4C internal oscillator is 16 MHz ±1%. The
internal oscillator is significantly less precise than the crystal, but it requires less
power and does not need an external crystal. This means for most applications we
will activate the main oscillator using the crystal so we can have a stable bus clock.
We will call library functions to select the clock source and bus frequency. In this
book, we will assume the MSP432 is running at 48 MHz, the TM4C123 is running at
80 MHz, and the TM4C1294 is running at 120 MHz. For more details on the clock
systems refer to Volume 2 of this series.
1.4. Texas Instruments Cortex-M Microcontrollers

1.4.1. Introduction to I/O

I/O is an important part of embedded systems in general. One of the important
features of an operating system is to manage I/O. Input and output are the means of an
embedded system to interact with its world. The external devices attached to the
microcontroller provide functionality for the system. These devices connect to the
microcontroller through ports. A pin is a specific wire on the microcontroller through
which we perform input or output. A collection of pins grouped by common
functionality is called a port. An input port is hardware on the microcontroller that
allows information about the external world to enter into the computer. The
microcontroller also has hardware called an output port to send information out to
the external world. The GPIO (General Purpose Input Output) pins on a
microcontroller are programmable to be digital input, digital output, analog input or
complex and protocol (like UART etc.) specific.
Microcontrollers use most of their pins for I/O (called GPIO), see Figure 1.12. Only
a few pins are not used for I/O. Examples of pins not used for I/O include power,
ground, reset, debugging, and the clock. More specifically, the TM4C123 uses 43 of
its 64 pins for I/O. The TM4C1294 uses 90 of its 128 pins for I/O. Similarly, the
MSP432 uses 84 of its 100 pins for I/O.

Figure 1.12. Most of the pins on the microcontroller can perform

input/output.
An interface is defined as the collection of the I/O port, external electronics,
physical devices, and the software, which combine to allow the computer to
communicate with the external world. An example of an input interface is a switch,
where the operator toggles the switch, and the software can recognize the switch
position. An example of an output interface is a light-emitting diode (LED), where
the software can turn the light on and off, and the operator can see whether or not the
light is shining. There is a wide range of possible inputs and outputs, which can exist
 in either digital or analog form. In general, we can classify I/O interfaces into four
categories
Parallel/Digital - binary data are available simultaneously on a
group of lines
Serial - binary data are available one bit at a time on a single
line
Analog - data are encoded as an electrical voltage, current or
power
Time - data are encoded as a period, frequency, pulse width or
phase shift

In a system with memory-mapped I/O, as shown in Figure 1.13, the I/O ports are
connected to the processor in a manner similar to memory. I/O ports are assigned
addresses, and the software accesses I/O using reads and writes to the specific I/O
addresses. These addresses appear like regular memory addresses, except accessing
them results in manipulation of a functionality of the mapped I/O port, hence the term
memory-mapped I/O. As a result, the software inputs from an input port using the
same instructions as it would if it were reading from memory. Similarly, the software
outputs from an output port using the same instructions as it would if it were writing
to memory.

Figure 1.13. Memory-mapped input/output.

Most pins on Cortex M microcontrollers can be used for general purpose I/O
(GPIO) called regular functions or for more complex functions called alternate
functions. For example, port pins PA1 and PA0 on the TM4C123 can be either
regular parallel port pins, or an asynchronous serial port called universal
asynchronous receiver/transmitter (UART).
Some of the alternative functions used in this book are:
• UART Universal asynchronous receiver/transmitter
• SSI or SPI Synchronous serial interface or serial peripheral
interface
• I2 C Inter-integrated circuit
• Timer Periodic interrupts
• PWM Pulse width modulation
• ADC Analog to digital converter, measurement analog signals

The UART can be used for serial communication between computers. It is

asynchronous and allows for simultaneous communication in both directions. The SSI
(also called SPI) is used to interface medium-speed I/O devices. In this class, we
will use SSI to interface a graphics display. I2C is a simple I/O bus that we will use
to interface low speed peripheral devices. In this class we use I2C to interface a light
sensor and a temperature sensor. We will use the timer modules to create periodic
interrupts. PWM outputs could be used to apply variable power to motor interfaces.
However, in this class we use PWM to adjust the volume of the buzzer. The ADC
will be used to measure the amplitude of analog signals, and will be important in
data acquisition systems. In this class we will connect the microphone, joystick and
accelerometer to the ADC.
Joint Test Action Group (JTAG), standardized as the IEEE 1149.1, is a standard test
access port used to program and debug the microcontroller board. Each
microcontroller uses four port pins for the JTAG interface.
Checkpoint 1.13: What is the difference between a pin and a port?
Checkpoint 1.14: List four types of input/output.

1.4.2. Texas Instruments TM4C123 LaunchPad I/O pins

Figure 1.14 draws the I/O port structure for the TM4C123GH6PM. This
microcontroller is used on the EK-TM4C123GXL LaunchPad. Pins on the TM4C
family can be assigned to as many as eight different I/O functions. Pins can be
configured for digital I/O, analog input, timer I/O, or serial I/O. For example PB4
can be a digital I/O, ADC, SSI, PWM, timer or CAN pin. There are two buses used
for I/O. The digital I/O ports are connected to both the advanced peripheral bus and
the advanced high-performance bus (runs faster). Because of the multiple buses, the
microcontroller can perform I/O bus cycles simultaneous with instruction fetches
from flash ROM. The TM4C123GH6PM has eight UART ports, four SSI ports, four
I2C ports, two 12-bit ADCs, twelve timers, two PWMs, a CAN port, and a USB
interface. There are 43 I/O lines. There are twelve ADC inputs; each ADC can
convert up to 1M samples per second. Table 1.4 lists the regular and alternate names
of the port pins.
Each pin has one configuration bit in the GPIOAMSEL register. We set this bit to
connect the port pin to the ADC or analog comparator. For digital functions, each pin
 also has four bits in the GPIOPCTL register, which we set to specify the alternative
function for that pin (0 means regular I/O port). Not every pin can be connected to
every alternative function. See Table 1.4.
Pins PC3 – PC0 were left off Table 1.4 because these four pins are reserved for the
JTAG debugger, and should not be used for regular I/O. Notice, most alternate
function modules (e.g., U0Rx) only exist on one pin (PA0). While other functions
could be mapped to two or three pins (CAN0Rx could be mapped to PB4, PE4 or
PF3.)
The two pins PD7 and PF0 are associated with NMI; these two pins are initially
locked. This means if you plan to use PD7 or PF0 you will need to unlock it by first
writing 0x4C4F434B to the lock register and then setting bits in the commit register.
This code unlocks PF0
GPIO_PORTF_LOCK_R = 0x4C4F434B; // unlock GPIO Port F
GPIO_PORTF_CR_R = 0x1F; // allow changes to PF4-0

Figure 1.14. I/O port pins for the TM4C123GH6PM microcontroller.

For example, if we wished to use UART7 on pins PE0 and PE1, we would set bits
1,0 in the digital enable register (enable digital), clear bits 1,0 in
the GPIO_PORTE_AMSEL_R register (disable analog) and set the PMCx bits in
the for PE0 PE1 to 0001 (enable alternate function) in
the GPIO_PORTE_PCTL_R register. If we wished to sample an analog signal on
PD0, we would clear bit 0 in the digital enable register (disable digital), and set bit
 0 in the GPIOAMSEL (enable analog), and activate one of the ADCs to sample
channel 7.
The TM4C LaunchPad evaluation board (Figure 1.15) is a low-cost development
board available as part number EK-TM4C123GXL from www.ti.com and from
regular electronic distributors like Digikey, Mouser, and Avnet. The kit provides an
integrated Stellaris In-Circuit Debug Interface (ICDI), which allows programming
and debugging of the onboard TM4C microcontroller. One USB cable is used by the
debugger (ICDI), and the other USB allows the user to develop USB applications
(device). The user can select board power to come from either the debugger (ICDI)
or the USB device (device) by setting the Power selection switch.

The LaunchPad board can also be used as a JTAG debugger for another target by
removing the VDD jumper and connecting the target to PC0=TCK, PC1=TMS,
PC2=TDI, and PC3=TDO

IO Ain 0 1 2 3 4 5 6 7 8 9 14
PA0 Port U0Rx CAN1Rx
PA1 Port U0Tx CAN1Tx
PA2 Port SSI0Clk
PA3 Port SSI0Fss
PA4 Port SSI0Rx
PA5 Port SSI0Tx
PA6 Port I2C1SCL M1PWM2
PA7 Port I2C1SDA M1PWM3
PB0 USB0ID Port U1Rx T2CCP0
PB1 USB0VBUS Port U1Tx T2CCP1
PB2 Port I2C0SCL T3CCP0
PB3 Port I2C0SDA T3CCP1
PB4 Ain10 Port SSI2Clk M0PWM2 T1CCP0 CAN0Rx
PB5 Ain11 Port SSI2Fss M0PWM3 T1CCP1 CAN0Tx
PB6 Port SSI2Rx M0PWM0 T0CCP0
PB7 Port SSI2Tx M0PWM1 T0CCP1
PC4 C1- Port U4Rx U1Rx M0PWM6 IDX1 WT0CCP0 U1RTS
PC5 C1+ Port U4Tx U1Tx M0PWM7 PhA1 WT0CCP1 U1CTS
PC6 C0+ Port U3Rx PhB1 WT1CCP0 USB0epen
PC7 C0- Port U3Tx WT1CCP1 USB0pflt
PD0 Ain7 Port SSI3Clk SSI1Clk I2C3SCL M0PWM6 M1PWM0 WT2CCP0
PD1 Ain6 Port SSI3Fss SSI1Fss I2C3SDA M0PWM7 M1PWM1 WT2CCP1
PD2 Ain5 Port SSI3Rx SSI1Rx M0Fault0 WT3CCP0 USB0epen
PD3 Ain4 Port SSI3Tx SSI1Tx IDX0 WT3CCP1 USB0pflt
PD4 USB0DM Port U6Rx WT4CCP0
PD5 USB0DP Port U6Tx WT4CCP1
PD6 Port U2Rx M0Fault0 PhA0 WT5CCP0
PD7 Port U2Tx PhB0 WT5CCP1 NMI
PE0 Ain3 Port U7Rx
PE1 Ain2 Port U7Tx
PE2 Ain1 Port
 PE3 Ain0 Port
PE4 Ain9 Port U5Rx I2C2SCL M0PWM4 M1PWM2 CAN0Rx
PE5 Ain8 Port U5Tx I2C2SDA M0PWM5 M1PWM3 CAN0Tx
PF0 Port U1RTS SSI1Rx CAN0Rx M1PWM4 PhA0 T0CCP0 NMI C0o
PF1 Port U1CTS SSI1Tx M1PWM5 PhB0 T0CCP1 C1o TRD1
PF2 Port SSI1Clk M0Fault0 M1PWM6 T1CCP0 TRD0
PF3 Port SSI1Fss CAN0Tx M1PWM7 T1CCP1 TRCLK
PF4 Port M1Fault0 IDX0 T2CCP0 USB0epen
Table 1.4. PMCx bits in the GPIOPCTL register on the LM4F/TM4C specify alternate
functions. PB1, PB0, PD4 and PD5 are hardwired to the USB device. PA0 and PA1 are
hardwired to the serial port. PWM is not available on LM4F120.

Figure 1.15. Tiva TM4C123 Launchpad Evaluation Board based on the

TM4C123GH6PM.
Pins PA1 – PA0 create a serial port, which is linked through the debugger cable to the
PC. The serial link is a physical UART as seen by the TM4C and mapped to a virtual
COM port on the PC. The USB device interface uses PD4 and PD5. The JTAG
debugger requires pins PC3 – PC0. The LaunchPad connects PB6 to PD0, and PB7 to
PD1. If you wish to use both PB6 and PD0 you will need to remove the R9 resistor.
Similarly, to use both PB7 and PD1 remove the R10 resistor.
The TM4C123 LaunchPad evaluation board has two switches and one 3-color LED.
See Figure 1.16. The switches are negative logic and will require activation of the
internal pull-up resistors. In particular, you will set bits 0 and
4in GPIO_PORTF_PUR_R register. The LED interfaces on PF3 – PF1 are
positive logic. To use the LED, make the PF3 – PF1 pins an output. To activate the
red color, output a one to PF1. The blue color is on PF2, and the green color is
controlled by PF3. The 0-Ω resistors (R1, R2, R11, R12, and R13) can be removed
to disconnect the corresponding pin from the external hardware.
The LaunchPad has four 10-pin connectors, labeled as J1 J2 J3 J4 in Figures 1.15
and 1.17, to which you can attach your external signals. The top side of these
connectors has male pins and the bottom side has female sockets. The intent is to
stack boards together to make a layered system see Figure 1.17. Texas Instruments
 also supplies Booster Packs, which are pre-made external devices that will plug into
this 40-pin connector. The Booster Packs for the MSP430 LaunchPad are compatible
(one simply plugs these 20-pin connectors into the outer two rows) with this board.
The inner 10-pin headers (connectors J3 and J4) are not intended to be compatible
with other TI LaunchPads. J3 and J4 apply only to Tiva Booster Packs.
There are a number of good methods to connect external circuits to the LaunchPad.
One method is to purchase a male to female jumper cable (e.g., item number 826 at
www.adafruit.com). A second method is to solder a solid wire into a female socket
(e.g., Hirose DF11-2428SCA) creating a male to female jumper wire.

Figure 1.16. Switch and LED interfaces on the Texas Instruments TM4C123
LaunchPad Evaluation Board. The zero ohm resistors can be removed so the
corresponding pin can be used for its regular purpose.

Figure 1.17. Interface connectors on the Texas Instruments TM4C123

LaunchPad Evaluation Board.

1.4.3. Texas Instruments TM4C1294 Connected LaunchPad

I/O pins
Figure 1.18 shows the 90 I/O pins available on the TM4C1294NCPDT, which is the
microcontroller used on the Connected LaunchPad. Pins on the TM4C family can be
assigned to as many as seven different I/O functions, see Table 1.5. Pins can be
configured for digital I/O, analog input, timer I/O, or serial I/O. For example PA0 can
 be digital I/O, serial input, I2C clock, Timer I/O, or CAN receiver. There are two
buses used for I/O. Unlike the TM4C123, the digital I/O ports are only connected to
the advanced high-performance bus. The microcontroller can perform I/O bus cycles
simultaneous with instruction fetches from flash ROM. The TM4C1294NCPDT has
eight UART ports, four SSI ports, ten I2C ports, two 12-bit ADCs, eight timers, two
CAN ports, a USB interface, 8 PWM outputs, and an Ethernet port. Of the 90 I/O
lines, twenty pins can be used for analog inputs to the ADC. The ADC can convert up
to 1M samples per second. Table 1.5 lists the regular and alternate functions of the
port pins.

Figure 1.18. I/O port pins for the TM4C1294NCPDT microcontroller.

Figure 1.19 shows the pin locations of the two Booster Pack connectors. There are
three methods to connect external circuits to the Connected LaunchPad. One method
uses male to female jumper cable (e.g., item number 826 at www.adafruit.com) or
solder a solid wire into a female socket (e.g., Hirose DF11-2428SCA) creating a
male-to-female jumper wire. In this method, you connect the female socket to the top
of the LaunchPad and the male pin into a solderless breadboard. The second method
uses male-to-male wires interfacing to the bottom of the LaunchPad. The third method
uses two 49-pin right-angle headers so the entire LaunchPad can be plugged into a
breadboard. You will need one each of Samtec parts TSW-149-09-L-S-RE and
TSW-149-08-L-S-RA. This configuration is shown in Figure 1.20, and directions can
be found at http://users.ece.utexas.edu/~valvano/arm/TM4C1294soldering.pdf
The Connected LaunchPad has two switches and four LEDs. Switch SW1 is
connected to pin PJ0, and SW2 is connected to PJ1. These two switches are negative
logic and require enabling the internal pull up (PUR). A reset switch will reset the
 microcontroller and your software will start when you release the switch. Positive
logic LEDs D1, D2, D3, and D4 are connected to PN1, PN0, PF4, and PF0
respectively. A power LED indicates that 3.3 volt power is present on the board.
R19 is a 0 Ω resistor connecting PA3 and PQ2. Similarly, R20 is a 0 Ω resistor
connecting PA2 and PQ3. You need to remove R19 if you plan to use both PA3 and
PQ2. You need to remove R20 if you plan to use both PA2 and PQ3. See Figures 1.20
and 1.21.

Figure 1.19. Interface connectors on the EK-TM4C1294-XL LaunchPad

Evaluation Board.

Figure 1.20. EK-TM4C1294-XL Connected LaunchPad.

Jumper JP1 has six pins creating three rows of two. Exactly one jumper should be
connected in the JP1 block, which selects the power source. The top position is for
BoosterPack power. The middle position draws power from the USB connector,
labeled OTG, on the left side of the board near the Ethernet jack. We recommend
placing the JP1 jump in the bottom position so power is drawn from the ICDI
(Debug) USB connection. Under normal conditions, you should place jumpers in both
J2 and J3. Jumpers J2 and J3 facilitate measuring current to the microcontroller. We
recommend you place JP4 and JP5 in the “UART” position so PA1 and PA0 are
connected to the PC as a virtual COM port. Your code runs on the 128-pin
TM4C1294 microcontroller. There is a second TM4C microcontroller on the board,
 which acts as the JTAG debugger for your TM4C1294. You connect the Debug USB
to a PC in order to download and debug software on the board. The other USB is for
user applications.
Pin Analog 1 2 3 5 6 7 11 13 14 15
PA0 - U0Rx I2C9SCL T0CCP0 - - CAN0Rx - - - -
PA1 - U0Tx I2C9SDA T0CCP1 - - CAN0Tx - - - -
PA2 - U4Rx I2C8SCL T1CCP0 - - - - - - SSI0Clk
PA3 - U4Tx I2C8SDA T1CCP1 - - - - - - SSI0Fss
PA4 - U3Rx I2C7SCL T2CCP0 - - - - - - SSI0XDAT0
PA5 - U3Tx I2C7SDA T2CCP1 - - - - - - SSI0XDAT1
PA6 - U2Rx I2C6SCL T3CCP0 USB0EPEN - - - SSI0XDAT2 - EPI0S8
PA7 - U2Tx I2C6SDA T3CCP1 USB0PFLT - - USB0EPEN SSI0XDAT3 - EPI0S9
PB0 USB0ID U1Rx I2C5SCL T4CCP0 - - CAN1Rx - - - -
PB1 USB0VBUS U1Tx I2C5SDA T4CCP1 - - CAN1Tx - - - -
PB2 - - I2C0SCL T5CCP0 - - - - - USB0STP EPI0S27
PB3 - - I2C0SDA T5CCP1 - - - - - USB0CLK EPI0S28
PB4 AIN10 U0CTS I2C5SCL - - - - - - - SSI1Fss
PB5 AIN11 U0RTS I2C5SDA - - - - - - - SSI1Clk
PC4 C1- U7Rx - - - - - - - - EPI0S7
PC5 C1+ U7Tx - - - - RTCCLK - - - EPI0S6
PC6 C0+ U5Rx - - - - - - - - EPI0S5
PC7 C0- U5Tx - - - - - - - - EPI0S4
PD0 AIN15 - I2C7SCL T0CCP0 C0o - - - - - SSI2XDAT1
PD1 AIN14 - I2C7SDA T0CCP1 C1o - - - - - SSI2XDAT0
PD2 AIN13 - I2C8SCL T1CCP0 C2o - - - - - SSI2Fss
PD3 AIN12 - I2C8SDA T1CCP1 - - - - - - SSI2Clk
PD4 AIN7 U2Rx - T3CCP0 - - - - - - SSI1XDAT2
PD5 AIN6 U2Tx - T3CCP1 - - - - - - SSI1XDAT3
PD6 AIN5 U2RTS - T4CCP0 USB0EPEN - - - - - SSI2XDAT3
PD7 AIN4 U2CTS - T4CCP1 USB0PFLT - - - - - SSI2XDAT2
PE0 AIN3 U1RTS - - - - - - - - -
PE1 AIN2 U1DSR - - - - - - - - -
PE2 AIN1 U1DCD - - - - - - - - -
PE3 AIN0 U1DTR - - - - - - - - -
PE4 AIN9 U1RI - - - - - - - - SSI1XDAT0
PE5 AIN8 - - - - - - - - - SSI1XDAT1
PF0 - - - - EN0LED0 M0PWM0 - - - SSI3XDAT1 TRD2
PF1 - - - - EN0LED2 M0PWM1 - - - SSI3XDAT0 TRD1
PF2 - - - - - M0PWM2 - - - SSI3Fss TRD0
PF3 - - - - - M0PWM3 - - - SSI3Clk TRCLK
PF4 - - - - EN0LED1 M0FAULT0 - - - SSI3XDAT2 TRD3
PG0 - - I2C1SCL - EN0PPS M0PWM4 - - - - EPI0S11
PG1 - - I2C1SDA - - M0PWM5 - - - - EPI0S10
PH0 - U0RTS - - - - - - - - EPI0S0
PH1 - U0CTS - - - - - - - - EPI0S1
PH2 - U0DCD - - - - - - - - EPI0S2
PH3 - U0DSR - - - - - - - - EPI0S3
PJ0 - U3Rx - - EN0PPS - - - - - -
PJ1 - U3Tx - - - - - - - - -
PK0 AIN16 U4Rx - - - - - - - - EPI0S0
PK1 AIN17 U4Tx - - - - - - - - EPI0S1
PK2 AIN18 U4RTS - - - - - - - - EPI0S2
PK3 AIN19 U4CTS - - - - - - - - EPI0S3
PK4 - - I2C3SCL - EN0LED0 M0PWM6 - - - - EPI0S32
PK5 - - I2C3SDA - EN0LED2 M0PWM7 - - - - EPI0S31
PK6 - - I2C4SCL - EN0LED1 M0FAULT1 - - - - EPI0S25
PK7 - U0RI I2C4SDA - RTCCLK M0FAULT2 - - - - EPI0S24
PL0 - - I2C2SDA - - M0FAULT3 - - - USB0D0 EPI0S16
PL1 - - I2C2SCL - - PhA0 - - - USB0D1 EPI0S17
PL2 - - - - C0o PhB0 - - - USB0D2 EPI0S18
PL3 - - - - C1o IDX0 - - - USB0D3 EPI0S19
PL4 - - - T0CCP0 - - - - - USB0D4 EPI0S26
Pin Analog 1 2 3 5 6 7 11 13 14 15
PL5 - - - T0CCP1 - - - - - USB0D5 EPI0S33
PL6 USB0DP - - T1CCP0 - - - - - - -
PL7 USB0DM - - T1CCP1 - - - - - - -
PM0 - - - T2CCP0 - - - - - - EPI0S15
PM1 - - - T2CCP1 - - - - - - EPI0S14
PM2 - - - T3CCP0 - - - - - - EPI0S13
PM3 - - - T3CCP1 - - - - - - EPI0S12
PM4 TMPR3 U0CTS - T4CCP0 - - - - - - -
PM5 TMPR2 U0DCD - T4CCP1 - - - - - - -
PM6 TMPR1 U0DSR - T5CCP0 - - - - - - -
PM7 TMPR0 U0RI - T5CCP1 - - - - - - -
PN0 - U1RTS - - - - - - - - -
PN1 - U1CTS - - - - - - - - -
PN2 - U1DCD U2RTS - - - - - - - EPI0S29
PN3 - U1DSR U2CTS - - - - - - - EPI0S30
PN4 - U1DTR U3RTS I2C2SDA - - - - - - EPI0S34
PN5 - U1RI U3CTS I2C2SCL - - - - - - EPI0S35
PP0 C2+ U6Rx - - - - - - - - SSI3XDAT2
PP1 C2- U6Tx - - - - - - - - SSI3XDAT3
PP2 - U0DTR - - - - - - - USB0NXT EPI0S29
PP3 - U1CTS U0DCD - - - RTCCLK - - USB0DIR EPI0S30
PP4 - U3RTS U0DSR - - - - - - USB0D7 -
PP5 - U3CTS I2C2SCL - - - - - - USB0D6 -
PQ0 - - - - - - - - - SSI3Clk EPI0S20
PQ1 - - - - - - - - - SSI3Fss EPI0S21
PQ2 - - - - - - - - - SSI3XDAT0 EPI0S22
PQ3 - - - - - - - - - SSI3XDAT1 EPI0S23
PQ4 - U1Rx - - - - DIVSCLK - - - -
Table 1.5. PMCx bits in the GPIO_PORTx_PCTL_R register on the TM4C1294 specify
alternate functions. PD7 can be NMI by setting PCTL bits 31-28 to 8. PL6 and PL7 are
hardwired to the USB.
Each pin has one configuration bit in the AMSEL register. We set this bit to connect
the port pin to the ADC or analog comparator. For digital functions, each pin also has
four bits in the PCTL register, which we set to specify the alternative function for
that pin (0 means regular I/O port). Table 1.5 shows the 4-bit PCTL configuration
used to connect each pin to its alternate function. For example, column “3” means set
 4-bit field in PCTL to 0011.
Pins PC3 – PC0 were left off Table 1.5 because these four pins are reserved for the
JTAG debugger and should not be used for regular I/O. Notice, some alternate
function modules (e.g., U0Rx) only exist on one pin (PA0), while other functions
could be mapped to two or three pins. For example, T0CCP0 could be mapped to
one of the following: PA0, PD0, or PL4.
The PCTL bits in Table 1.5 can be tricky to understand. For example, if we wished to
use UART6 on pins PP0 and PP1, we would set bits 1,0 in the DEN register
(enable), clear bits 1,0 in the AMSEL register (disable), write a 0001,0001 to bits
7–0 in the PCTL register (UART) GPIO_PORTP_PCTL_R =
(GPIO_PORTP_PCTL_R&0xFFFFFFFF)+0x00000011; and set bits 1,0 in the
AFSEL register (enable alternate function). If we wished to sample an analog signal
on PD0, we would set bit 0 in the alternate function select register AFSEL, clear bit
0 in the digital enable register DEN (disable digital), set bit 0 in the analog mode
select register AMSEL (enable analog), and activate one of the ADCs to sample
channel 15.
Jumpers JP4 and JP5 select whether the serial port on UART0 (PA1 – PA0) or on
UART2 (PD5 – 4) is linked through the debugger cable to the PC. The serial link is a
physical UART as seen by the TM4C1294 and is mapped to a virtual COM port on
the PC. The USB device interface uses PL6 and PL7. The JTAG debugger requires
pins PC3 – PC0.

Figure 1.21. Switch and LED interfaces on the Connected LaunchPad

Evaluation Board. The zero ohm resistors can be removed so all the pins can
be used. See Chapter 9 for Ethernet connections.
To use the negative logic switches, make the pins digital inputs, and activate the
internal pull-up resistors. In particular, you will activate the Port J clock, clear bits 0
and 1in GPIO_PORTJ_DIR_R register, set bits 0 and
1in GPIO_PORTJ_DEN_R register, and set bits 0 and
1in GPIO_PORTJ_PUR_R register. The LED interfaces are positive logic. To use
the LEDs, make the PN1, PN0, PF4, and PF0 pins an output. You will activate the
 Port N clock, set bits 0 and 1in GPIO_PORTN_DIR_R register, and set bits 0 and
1in GPIO_PORTN_DEN_R register. You will activate the Port F clock, set bits 0
and 4in GPIO_PORTF_DIR_R register, and set bits 0 and
4in GPIO_PORTF_DEN_R register.

1.4.4. Texas Instruments MSP432 LaunchPad I/O pins

Figure 1.22 draws the I/O port structure for the MSP432P401R. This microcontroller
is used on the MSP-EXP432P401R LaunchPad. Pins can be configured for digital
I/O, analog input, timer I/O, or serial I/O. For example P1.2 can be digital I/O or
serial receive input.
Because of the multiple buses, the microcontroller can perform I/O bus cycles
simultaneous with instruction fetches from flash ROM. The MSP432P401R has four
UART ports, eight SPI ports, four I2C ports, a 14-bit ADC, and four timers. There
are 84 I/O lines. There are 24 ADC inputs, and the ADC can convert up to 1 million
samples per second.

Figure 1.22. I/O port pins for the MSP432P401R microcontroller. (Six pins
on Port J not shown).
 The MSP432 LaunchPad evaluation board (Figure 1.23) is a low-cost development
board available as part number MSP-EXP432P401R from www.ti.com and from
regular electronic distributors like Digikey, Mouser, element14, and Avnet. The
board includes XDS110-ET, an open-source onboard debugger, which allows
programming and debugging of the MSP432 microcontroller. The USB interface is
used by the debugger and includes a serial channel.

Figure 1.23. LaunchPad based on the MSP432P401RIPZ.

The MSP432 LaunchPad evaluation board has two switches, one 3-color LED and
one red LED, as shown in Figure 1.24. The switches are negative logic and will
require activation of the internal pull-up resistors. In this class we will not use the
switches and LEDs on the LaunchPad, but rather focus on the hardware provided by
the MK-II BoosterPack.

Figure 1.24. Switch and LED interfaces on the LaunchPad Evaluation

Board. The jumpers can be removed so the corresponding pin can be used
without connection to the external circuits.
The LaunchPad has four 10-pin connectors, labeled as J1 J2 J3 J4 in Figure 1.25, to
which you can attach your external signals. The top side of these connectors has male
pins, and the bottom side has female sockets.
Figure 1.25. Interface connectors on the MSP432 LaunchPad Evaluation
Board, 67 I/O pins.

1.4.5. Interfacing to a LaunchPad

The LaunchPad ecosystem allows boards to stack together to make a layered system,
see Figure 1.26. The engineering community has developed BoosterPacks, which are
pre-made external devices that will plug into this 40-pin connector. In addition to the
40-pin header on all LaunchPads, the MSP432 and TM4C1294 LaunchPads have
additional headers on the end.

Figure 1.26. An embedded system with MSP432 LaunchPad and a Grove

BoosterPack from Seeedstudio.
There are a number of good methods to connect external circuits to the LaunchPad.
One method is to purchase a male to female jumper cable (e.g., item number 826 at
www.adafruit.com). A second method is to solder a solid wire into a female socket
(e.g., Hirose DF11-2428SCA) creating a male to female jumper wire. The third
method is to use BoosterPacks, so you will not need to connect individual wires to
the LaunchPad. Figure 1.27 shows the MSP432 with a CC2650 BoosterPack.
Figure 1.27. A MSP432 LaunchPad with a BOOSTXL-CC2650MA
BoosterPack.
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 Fig. 24.

It has now to be mounted. Take a clean wig-block—there are two

kinds, let me observe, “mounting” blocks and “combing” blocks—but
it is to the former that I am alluding. Partings vary in depth, but the
front here pourtrayed is four inches deep, and I will assume that you
are going to make a similar one. Have some ribbon the full width of
the parting (after the edges of the latter are tacked), and cut off five
inches. Turn up the lower edge of the ribbon and lay the smooth
surface upon the block, exactly in the centre, and just where the front
should be worn when upon the head. Drive two points into the block,
at short but equal distances from each other; take a needle and
cotton, single, tie a knot, and “fasten on” to a point: pass the needle
through one corner of the ribbon, and secure the cotton to the point
below. Proceed in the same way with the other corner. Turn the block
round, bend up the end of the ribbon as before, and secure the
corners by means of basting stitches in a like manner. Remember,
that in weaving I directed quarter-inch spaces to be left at both ends
of the two inner rows of weft. Now draw the silks out a quarter of an
inch so as to bring the weft close to the plait, for by this movement
you will be enabled to spread out the top and bottom rows to the
ends of the springs, while the centre rows are tightened and nearly
straight, as they should be. Next sew the strings on to the plaited
ends; make two springs, each a full quarter of an inch deeper than
the parting; cover as previously instructed, and fix in their appointed
places. (Fig. 24 clearly pourtrays all that is here described.) The two
middle rows of weft need not be sewn to them yet. Now place all
upon the block, get the mounted ribbon exactly in the middle, take
hold of the strings, pull tight and drive a point through them at the
back, in the place where they should be tied by the wearer. Arrange
so as to keep the top row of hair out of the way; let the lower silks be
a quarter of an inch above the place where the parting touches the
forehead, and fix all in their respective positions by means of a
needle and silk. Secure the two middle rows of weft to the springs in
the same way. Now to affix the parting. Turn in the edges of the silk
or skin upon which the parting is worked, and “tack” them in such a
manner that the lowest portion (being the most important) is turned
up last. The parting is now to be sewn neatly to the ribbon,
commencing at the bottom; both should exactly fit, and, what is most
important, only the parting is to be seen where it touches the brow.

Fig. 25.

The pressing iron can now be used, the curls—be they many or few
—arranged, a pair of side-combs placed in position if desired, and the
front is finished, as above shown.
There are other fronts with ringlet curls beside those just
described. For instance, there is a mounted front of a diamond
shape, which is made to slide, technically called a “diamond” front. It
is made as follows: cut off two pieces of galloon about eight or nine
inches in length each. Sew the ends (through and through, not over
and over) neat and firm; these are for the two sides. Place one of
them upon a block, in the position it is intended to be worn. The ends
of the galloon (where it has been sewn) must be uppermost at any
place except a corner. Open the ends and hammer slightly, so as to
make them lie as flat as possible. Take four points, and spread out
the galloon in a diamond shape, so that it will be about two inches
deep, and perhaps four inches long. Now take your needle and
cotton, points, &c., and baste out in the required form; the upper and
lower bastings (where the springs go) to be somewhat pointed; the
ends are to be square, equal to the width of the galloon forming the
strings. Make another mounting on the corresponding side of the
block, and both must be alike in every particular. Upon the block
(between the right and left sides of the mountings) a space of two
inches or more should be left, because the wearer’s own hair must be
seen when the curls are worn. Bear in mind this is to be a sliding
front, and the lady will be able to adjust the curls to her own wishes
or taste. Now, the two sides being in their proper positions, and
firmly secured by means of the basting stitches, sew a piece of
galloon on one side only from one end to the other; the reason for
doing so will presently be given. Cut off sufficient galloon for the
strings, and this must be long enough to encircle the head, leaving
plenty to tie in a double bow as well. Find the centre of the galloon,
and temporarily fasten it with a point between the mounts. One of
these strings is to be continued along the mount, corresponding with
that upon which a piece of galloon has been sewn, the remainder
being fastened by means of a point in the neck. The other half is to be
abruptly turned back over the crown, and temporarily secured to
keep it out of the way. Measure off two springs, grind the ends, cover
with narrow galloon as previously instructed, and fix in their
respective places. Put on the net; sew it to the inner edges of the
mount only, and to both sides of the centre galloons and springs. The
mountings are now ready for the hair.
Take sufficient hair, say one ounce of twelve-inch ringlet, and
divide it equally. Weave a top row first, and ordinary front weft with
the remainder. Do the same with the second lot of hair. Remember
what I have said before—“All curls should turn to the face.” Sew on
the weft, beginning at the bottom of the lower galloon, turn the
corners neatly; let the weft appear in regular rows, and, lastly, sew on
the top row. Comb out the hair and curl it over the fingers in proper
form before doing the other side, which, when done, is to be treated
in a similar manner. Warm your pressing iron, divide the weft in
conveniently small portions, and press carefully. Take the mountings
off the block, and now I will give my reason for sewing on the first
piece of galloon, namely, because this is the mounting intended to
slide. Cut off another piece of galloon an inch longer than appears to
be necessary. Turn in about half an inch at one end, and sew the
corners securely to one of the ends of the mount. Neatly stitch the
edge of this piece of galloon to the edge of that which is attached to
the mount, but before fastening off, turn in the free end as you did at
the beginning. Sew along the other edge of the galloon as before, and
secure the stitches. Now there is a hollow space for the string to
travel through, and a bodkin is the necessary instrument for leading
it in the first instance. Replace the front upon the block, dress and
arrange the curls as required.
Wing Fronts are made in a similar way, but instead of being of a
diamond form they are shaped like birds’ wings; the narrow end, of
course, towards the upper part of the head, and the broad part near
the ears. Mounts of this shape are very pretty, the curls lie nicely
together, and, furthermore, they are easy to wear.
Bandeaux, or as they are more generally termed, “bands,” embrace
a variety of designs to suit different requirements. Some are made
plain with a patent parting of silk or skin; others have net, gauze, or
human hair foundations, and latterly a material called “Yak-hair” has
been used, which answers the same purpose, and is less expensive.
Then, again, there are bandeaux with waved hair or waved hair and
“fringes,” while others have long hair attached for combing in with
the natural hair at the back. Indeed, this branch of the business
offers a wide field for the display of taste, judgment, and ability. The
hair used to be “banded” and then secured at or near the end of the
mount, and dressing “bands” and “fronts” in the days of my
apprenticeship was a continual source of employment and profit. The
hair, at the time I speak of, was generally worn smooth, oils and
pomades were in request, and rough hairdressing, it was thought,
showed want of skill on the part of the hairdresser. But styles are
ever-changing, and what is approved to-day will, perhaps, be
condemned to-morrow. From smooth hairdressing we come to that
which is dry, wavy, frizzy and crisp, and I am disposed to think that
ladies sometimes imagine a coiffure should present a rough
appearance to obtain approval. This loose method of arranging the
hair is to the advantage of bandeaux, and coverings for bald places,
because the false piece can be more easily arranged by the wearer.
 Fig. 26.

To make a plain bandeau, take a yard and a-half of galloon,

measure ten inches from one of the ends but do not cut it off. Turn it
back and give it two or three raps with the hammer so as to make a
mark. Keep the galloon even and smooth, and turn back another ten
inches at the other end; both of which are to be brought together.
The ends are to be turned in, and stitched over and over. Double
these sewn pieces exactly in the centre, and tap with the hammer
again. Open out, and you will find that a mount of between nine and
ten inches is begun. Now take a mounting block, which should be
clean and smooth, and place the galloon thereon. The centre of the
mount has already been found, and after opening it (say) two inches,
temporarily fix by means of points in the centre of the block. There is
no difficulty about this because a fine line marks the place, and I
need scarcely say the mount should be on the block exactly as it is
intended to be worn on the head. With the block in your lap (the face
being turned inwards) take the galloon in each hand, pull tight,
double one piece over the other, and drive a point through both at
the back of the neck. Hammer it down firmly, and then fix the
remainder of the galloon, which I need hardly say is intended for the
strings, as you think proper, so long as they are out of your way. I will
now suppose that you are going to make a three-inch silk or skin
patent parting band, therefore you must commence with basting the
lower galloon first, and then the top one, drawing it back at the same
time, so as to give the necessary depth. Indeed, if you make it a rule
to give a quarter of an inch more depth than the parting, it will be, I
think, all the better. Next draw back the lower centre, and form a
pretty curve, the object being to keep the galloon out of the way lest it
be seen in the most critical part of your work, and, further, that the
parting should lie upon the forehead both flat and close. Having done
basting, the next thing is to put on the springs. Break two pieces of
watch spring the proper length; the ends of which are to be rounded
off and covered with kid or parchment, afterwards neatly enclosing
the springs in galloon. They should have just sufficient bend to easily
fit the head, and assist in holding the parting in position. A reference
to the engraving will illustrate all that I have endeavoured to explain.
[14]

Having well secured the mount which, let me say, should always be
tight and firm upon the block, take a piece of ribbon, exactly the
width of the centre between the springs, and sew thereon, the object
of this being to give a neat appearance to the band when off the
block, and, also, to conceal the work in the parting which otherwise
could be seen. The net should next be attached, as directed in
previous instructions, and then the mount will be completed.

Fig. 27.
 In addition to the parting, take an ounce of the best hair (say)
sixteen inches long (the hair in the parting being of the same length),
and weave a top row. Weave the remainder of the hair in rather fine
front weft, and then divide, marking the division, however, by merely
tying a piece of string in the place. The parting should next be dealt
with; turn in the edges as previously directed, “tacking” as you
proceed, and finishing with the lower portion. Sew the parting in its
proper position, beginning with the two corners in front; it will then
be as well to sew it at the top, and afterwards the sides. The parting
should be straight, and exactly in the centre; perfectly smooth, and
not stretched or puckered in any direction. The weft must be sewn on
next, but should there be a rather wide space between the parting
and the top edge of the galloon, put in two or three rows of weft first.
Sew the weft along the bottom and top edge of the galloon and then
at regular intervals until one side is completed. Do the same with the
other side, and, finally, put on the top row.
The number of rows will, of course, depend upon the quantity of
weft, of which you must be the judge, and calculate accordingly.
Press, tie the hair of each side together or loosely plait in three,
leaving the wearer to arrange it when upon the head.
What I have already said is sufficient to show the learner how to
make a “band” with a parting of either silk or skin, or any other
similar substance. Indeed, when a “band” has to be produced for a
very low price, it can be made without a patent parting at all, as the
parting can be made to consist of weft only. To do this, the springs
need not be so wide apart, and the intervening space is to be filled up
with weft, sewn close, one row after the other, beginning at the
bottom. If the weft is well done and fine, it will lie flat, then, with the
comb, a parting should be made, and pressed into shape. True, the
wearer cannot show the parting, but such work is designed for
elderly ladies, and the cap border, or other head-gear hides it
completely. Partings are generally used, however, and I merely
allude to this very plain way of making a “band” to suit humble and,
necessarily, economical customers.
For making a Waved Bandeau, with fringe, turn to the
instructions for mounting already given, and notice the mount upon
the block. A mount of a similar description is to be made, but
without the arched piece of galloon in the centre, for the parting
being of a transparent material, the skin of the head should be seen
through it. Besides, a dark line of galloon just in the most
conspicuous spot would be sadly out of order.
Proceed as follows: Take a clean block, and mark with a pencil the
exact dimensions of the mount, in its proper place. Be very particular
about this, because the pencilled lines you should strictly adhere to.
These lines, then, having been made, commence by driving a point
through the end of the galloon near the crown, and on your right side
as the tracing faces you. Continue the galloon down to the angle upon
the forehead where the spring goes, and fix with a point. Keep the
galloon flat, and turn it towards the ear where it is also to be secured.
Pass the galloon along the top, and when in the centre of the block
(being mindful of the depth of the parting) drive in another point.
For the other side continue the galloon as before, and end on the top
of the block in a corresponding position to that where it begins. The
mount should then resemble the illustration to which your attention
is directed (Fig. 26), but with this difference—the centre arched
portion of the galloon is absent.
The galloon is now to be “basted,” and preceding instructions
observed. The mount being tight and firm, the strings are to be
neatly sewn on, fixed in the neck, and the long ends put out of the
way as before. It is now seen that there is a gap in the centre, and
unless some kind of stay is put at the lower part, the parting will, in
all probability, soon get torn. To obviate this, it is usual to employ a
material called “silk-worm gut,” which is securely fastened across the
bottom, or nearly at the bottom, for the parting should be so
arranged as to lie flat on the forehead—the closer it lies the better.
Sometimes a white horse hair is used for the purpose, and
occasionally white silk, but whatever the material, it should be strong
and durable. It is usual, also, to put additional “stays” about an inch
apart, right along the parting, for they are not seen upon the head,
and much greater strength is given to the article. Indeed, when the
parting is more than three inches deep it is absolutely necessary to
do so.
Put on the springs as before, let them be narrow, and in this
instance they may be covered with black tape, as the galloon upon
which they will be sewn conceals them from view when off the block.
Now attach the net, and the mounting is completed.
 A mount, let me observe, should be accurately designed, and
measurements taken from any convenient place upon the block must
correspond, one side with the other. Indeed, where much board-
work is done, it is a strong recommendation to be a good “mounter,”
and a correct eye is not among the least of such a man’s
qualifications. It matters not how well done the knotting, weaving, or
sewing may be; should the mount be inexact, the work is faulty from
the very commencement, and might result in the article being
returned. This is best avoided. Therefore, make it a rule to “start fair”
with your work, and, if slow, be sure, remembering at all times that
“practice makes perfect,” and how important it is that strict attention
should be paid to minute details.
The mount having been finished, the next thing is to put in a
transparent parting, with a “fringe.” This “fringe” should be of short,
curled hair, which can be arranged when the job is finished. In
transparent partings generally there are no edges to turn up, like
those made of silk or skin, and alluded to before. Commence by
sewing the parting to the corner of the mount on your right hand
first, finish off, and then attach it to the corresponding corner on the
left side, keeping the line of parting exactly in the middle. It will then
be proper to sew the top; see that it is firm, straight, and smooth, and
conclude by stitching the sides. About the same length and quantity
of hair will be required for this as was used in the previous one;
therefore, weave a top row, divide the weft, and proceed according to
the instructions already given. Sew the weft on in rows, beginning at
the bottom; neatly and securely turn the corners; and, lastly, affix the
top row. Press, and dress as required; take it off the block, draw out
the basting stitches, and the work is done, unless you wish to give a
waviness to the hair.
 Fig. 28.

Of course the hair can be left straight if desired, but if waved (it
need not be very strong), the effect is much more natural. Put the
band on the block again, and the hair can be waved in either of the
following ways:—(1) By plaiting. Slightly damp the hair, and make
two or more three-plaits upon each side. Plait rather tight, and pinch
with moderately warm irons, but only sufficient to remove the
moisture, if any, and to fix the wave. This, perhaps, is the most
simple and natural way of doing it. (2) With hair-pins. Divide the
side-hair in two or three equal portions, so as to make the wave
regular and uniform. Take a long hair-pin, and with the left hand
hold it close to the roots of one of the pieces, keeping the prongs
rather wide apart. Then, with the right hand, entwine the piece of
hair in and out, as though forming with it any number of figures 8.
Having come to the ends (or done as much as you consider
necessary), push up close to the head of the pin, turning back one of
the points to keep the hair well in place. Do the same with all; pinch
with warm irons, and allow it to be quite cold before drawing out the
pins. (3) Curling-irons are used also for waving the hair, but,
although permissible when dressing a lady’s hair, I do not advise
their use for work of this description. There are other methods of
waving hair, as with string, card, wire, etc., but what I have
described, if carefully done, will answer nearly all requirements.
 Fig. 29.

Temple-Mounted Fronts.—Measure off twenty-three inches of

galloon, double it, and stitch at the ends through and through. Shift
the ends a little, so that they will come anywhere but where basting
stitches are likely to be put. Now double the galloon again, tap it with
the hammer, open it, and you will find that you have made two
creases. Put these creases upon the line which marks the centre of
the block, and fix them with points to about the depth of the parting.
Take other points and bring the mount into shape. You will now
require a rule, or tape measure, a pair of compasses, and a large
double-threaded needle, to enable you to make correct
measurements. You can measure from any convenient spot, but
when the strings are on, they should be so adjusted that, when off the
block and tightened, the mount will incline inwards both at top and
bottom, thus proving that it will bind, or fit well to the head. The
shape is well defined in the illustration,[15] and the places where
basting stitches are to be put distinctly shown. Springs are made and
fixed on the top about the width of the parting, the intervening space
being filled up with a piece of ribbon. A spring is also placed on each
side near the ear, so as to keep the mount well in shape, and the
strings, as will be seen, are made to cross over from the bottom
galloon to the top. The trained eye will perceive at a glance how
comfortable this shaped mount is likely to be to the wearer.
Having sewn on the net, commencing, as usual, upon the inner
edge of the lower galloon, the next thing is to put in the parting,
which should be either skin or silk—but if transparent a deviation
will have to be made as already explained. The same remark applies
as to whether the hair should be knotted or woven. These matters
must always be decided upon at first, when the mount is
commenced. Take (say) 1¼ oz. of twelve-inch ringlet hair, and put
the curls in two lots as usual. Weigh one parcel against the other, and
balance evenly. Remember what I have said about the curls inclining
to the face. Make a thin top row, comb out, and cut down. Weave the
hair in fine front weft, and contrive to make it of a similar length for
both sides. Commence sewing on at or near the string, and proceed
as before instructed. In stitching on the weft be careful to well secure
the net, and the spaces must be according to the length of the weft
used—certainly they should not be so much as a quarter of an inch
apart. Let both sides be uniform and alike in every respect. Press and
dress as required, and retain the hair in position by means of side-
combs. If, at the outset, it is decided to “knot” the hair, then the
mount should be prepared accordingly, respecting which I have
given instructions in another place.[16]
Fillets (or Cauls).—A fillet signifies a little band intended to tie
about the hair; and a caul (probably a modification of cowl)
intimates, in trade parlance, a net or some such covering for the
head. But that which I am going to describe is probably unknown to
many, although it was formerly adopted by elderly women instead of
a wig. This can be accounted for in two or three ways. (1) Because at
the time I speak of “fronts” were generally worn; (2) ladies’ wigs were
heavy and expensive, and (3) a fillet or caul, being much cheaper,
well answered the purpose. Indeed, where the necessity exists for
wearing a head covering, through loss of hair, or other causes,
perhaps a fillet would be most acceptable to many in want of some
such assistance. Proceed as follows: Measure the head, and use a
mounting-block about one inch larger in size. Put on any shaped
mount you please so long as it is adapted to the purpose, and suits
the requirement of the lady for whom it is intended. In place of
strings use a piece of wide galloon which is neatly attached to the
mount, and fits comfortably round the head. The galloon may be half
an inch or more in width, or a mount can be made in the neck
(extending from ear to ear) resembling that portion of a lady’s wig.
Having the mount, springs, and wide galloon in position, you have
next to obtain a silk net, and put it on to the block, covering the
entire mount and neck-piece as well.[17] The meshes of the net should
not be too open, because the weft has to be sewn upon a part of it. I
need hardly observe that no portion of the net must be allowed to
project over the lower edges of the galloon and mount. The hair is
now to be divided as before; a top-row woven, and good front, or
“twice-in” weft made. Bear in mind that instead of sewing it along
the lower galloon, and turning at the parting and strings, it is now to
be sewn from bottom to top; in other words—begin sewing on the
weft where the wide galloon joins; let the hair incline or fall over the
ear, and, as I said just now, sew the weft from bottom to top, turning
each row upon the lower and upper galloon. The reason is, that as
the meshes are much more open than in the ordinary description of
net, the rows of weft ought to be shortened so as to give additional
strength. Having finished the front part, attention must now be
directed to the back, or rather that portion which fits in the neck and
extends from ear to ear. Have ready (say) half an ounce of “Sevigny,”
or “doll” hair. This is tight curled hair of about four or five inches in
length—the same in fact as that used in making “fringes.” Weave very
fine, and sew on to the wide galloon, turning at each end of it. The
long and short hair will thus meet near the front of the ear, where the
joining must be neat.
If the hair is to be worn either plain or wavy and banded, of course
hair (say) of sixteen inches in length should be used, but if in curls,
probably ten or twelve-inch hair will be sufficient. Dress as required.
The short-curled hair (after the work is pressed) can be arranged in
small ring curls, or in the manner of a close fringe.
Remember, I said that a block somewhat larger than the head was
to be used, and the reason is plain. The fillet is sure to be large
enough, and this will allow for shrinking; besides, there is to be an
elastic spring put in the neck which must be done so as to grip or
bind the head properly. If these details are carefully attended to, the
fillet will fit “like a glove,” be a source of comfort to the wearer, and a
credit to the maker. How an elastic spring is to be placed and held in
position will appear in due course.
 CHAPTER IX.

General Observations on the Manufacture of Partings and Crowns

—Non-transparent Partings; Silk and Skin—Transparent
Partings; Net, Gauze, Yak, and Human Hair Foundations—“The
Genealogy of Implantation”—Knotting, and some remarks
thereon—Single Knotting—Double Knotting.

artings, no matter for what use they may be intended, are

either transparent or opaque. The foundation of
transparent partings is invariably net, gauze, yak hair, or
human (white) hair, the two latter substances being
specially adapted to the purpose. Indeed, anything that
will enable the worker to imitate nature so closely as to
defy detection, might be employed, if it be durable and
impervious to the effects of perspiration—two points
never to be overlooked. The great art of parting-making
is to cause the joining (where it comes in contact with the forehead)
to be so exquisitely well done, that it passes unnoticed even by a
keen-sighted and critical observer. Now is a chance for some
ingenious young man to make himself famous, as perfection is not
yet reached, I venture to think in this respect. True, the “fringe” goes
far to produce a natural appearance in those who are still young, but
a “fringe” is out of place altogether upon the brow of a matronly
dame, or attached to the parting of a gentleman’s wig; therefore I
repeat there yet remains something to be done in the matter of
partings, and probably a fortune awaits the lucky inventor. But there
are professed patent parting makers, and, as a rule, it is most
advisable to purchase this portion of the work ready made, or have it
done to order. When convenient, especially if a hairdresser resides at
a distance from London or certain provincial towns, it is expedient to
keep a small stock of such goods in the house, for occasionally it
happens that an order is wanted in a hurry. Most in request are
partings of three, three and a-half and four inches deep, made with
hair sixteen or eighteen inches long, and, I may add, common
colours. Here then is a little “stock-in-trade” which is sure to come in
useful. Should the reader, however, wish to make the parting
himself, I will merely say that “foundations” of the usual length and
width can be obtained through the usual trade channels, but I may
hazard an opinion, which is, that very few hairdressers execute this
kind of work themselves.
Non-transparent partings are made upon silk or skin, the latter
consisting of a very thin skin upon white or pale-pink silk. I have
known other substances used (more by way of an experiment than
anything else) but the foundations named are, so far as I am aware,
universally employed. Silk partings are the cheapest, skin partings
and net partings come next, and so on, the price per inch being
regulated according to width, foundation, length and quality of the
hair, workmanship, &c.
It is worthy of observation that fronts, in years gone by, were
almost universally worn by married women. “The first grey hair”
gave the signal, and a visit to the hairdresser followed shortly after.
His aid was invoked, and, if holding a good position in the trade, his
design was to produce a front natural in appearance, and sufficiently
open in the parting, to suit the expression of the features. But since
the introduction of silk and skin partings (which occasionally show a
division little more than a straight line) the aim seems to be
different, and a parting is produced thicker and closer than would be
seen on a young girl’s head. The result of this is to impart a heavy
aspect to the countenance, which is at all times undesirable, and will
account in some degree for their discontinuance. These unnatural-
looking partings are sometimes demanded by persons who make no
pretension to good taste, and they will not be advised by the
tradesman, who knows full well what is likely to suit them best.
Partings which require the most skill in their manufacture, if the aim
be to produce a good article, are silk and skin partings, and to make
the first of these proceed as follows:—In proportion to the length of
parting required prepare a stout wire frame—say six inches long, and
four inches wide, and that you are going to work a three and a-half
inch parting. With the help of a needle and stout cotton, stretch the
silk firm and secure in the centre of the frame, so that it is
immovable and longer than required. Weave the hair in “close,” or
“once in” weft, keeping it free from grease or dirt lest the foundation
be soiled. Attach the weft to the back of the silk, and draw a few hairs
through at a time by means of a small hook made for the purpose.
Work regularly and methodically, bearing in mind the width and
length required. The centre portion must be done very fine, while the
sides may be coarser, a somewhat larger hook being used. Having
drawn all the hair through to what is now the top, take a comb and
“make a parting” the same as you would upon a lady’s head. Comb
the hair smoothly on each side, warm the pressing-iron, and press
into shape. Cut down, and the parting is made.
It is not reasonable to expect first attempts to afford much
satisfaction, but procure a well-made parting and strive to imitate it
by all the means in your power. With a good pattern, you may
observe what can be done, and if you desire to enter the foremost
ranks, you must endeavour to equal, if not excel others.
Skin partings are made the same way, but, as I have before said, a
thin skin (sold for the purpose) is laid upon the silk before working.
Transparent partings are to be made upon a net, gauze, Yak-hair,
or human-hair foundation. Professed patent-parting makers no
doubt use a frame, but a hairdresser would, in all probability, make
the parting upon a block, and in its proper place. Of course, it is best
to do the parting as a separate portion, because it can be easier
pressed into shape, and the piece of thin skin (previously sewn
underneath) for preventing the effects of perspiration, will escape
being punctured by the knotting needle. However, this is a matter for
consideration by the worker, who must necessarily be somewhat
experienced before venturing to knot partings. The kind of net used
for partings can be purchased at a hair merchant’s; it is made of
cotton, and should be fine, smooth, and as regular as possible
consistent with durability. Gauze is much finer and closer than net,
being manufactured expressly for the purpose. It is largely used for
scalpettes, gentlemen’s scalps, and fine knotted work generally.
TulleYak, or Yak-hair foundations, are made abroad, and well suit
the purpose for which they are intended.
 Like other work of this description, the meshes vary in size, and
can be had either open or very close. But the best foundations are
made of white human hair, with a square, round, diamond, or
diamond-barred mesh; the foundations for crowns, and crowns and
partings, being specially prepared. Speaking of the Yak-hair
manufacture, a recent writer says, “there is a large quantity of good
lace made in the mountain villages of Saxony and Bohemia, and
thousands of hands are thus constantly employed. This industry has
of late received an addition in the manufacture of a peculiar lace or
tulle made of white hair. It was introduced into this district a few
years ago by a Normandy lady, and has since then extended to such a
degree that now in one town (Rothenkerchen) alone several hundred
persons live by it. The lace is made of white human hair procured
from all countries of Europe, but principally from Italy. The price
paid for it ranges from one penny to two shillings per gramme,
according to quality, and the fine lace made out of it is used as a
foundation for wigs.”
To give completeness to my work, a short account of “The
Genealogy of Implantations,” from the Moniteur de la Coiffure, will,
no doubt, interest the reader, for it has a direct bearing on the
subject.
The journal named had the following under the heading of “Croisat
and the 101 Coiffeurs.”
“In 1805, Leguet, hairdresser at Lyons, invented the flesh-coloured
hair-net. Postiches had hitherto been so coarsely made that this
improvement in the manufacture of wigs caused quite a sensation.
The fame of the inventor soon reached Paris, and M. Tellier,
hairdresser at the Palais Royal, tried to buy Leguet’s patent. In 1810,
Leguet, who had found that his wigs did not keep the desired
firmness (the hair being badly knotted), easily agreed to cede his
patent to Tellier. An English firm having heard of Leguet’s invention,
procured one of his wigs, which they imitated and improved. This
came to the knowledge of Tellier, who went to London to study the
improvements. Meanwhile, Carron, another coiffeur at the Palais
Royal, bought from a Lyons silk weaver the process for the
implantation on silk of a different kind, which, though less suitable
for men’s wigs than that of Leguet’s, gave much neater partings for
women’s work. Tellier, on his return to Paris, intending to
considerably extend his novel industry, associated himself with a
stocking-weaver of the Cevennes. Hence arose a law suit between
Carron and Tellier. But, contrary to the ordinary rule, this law suit,
instead of ruining the parties more immediately concerned, helped to
make their fortune. All the papers were full of this suit, and every
baldhead—feminine or masculine—in the kingdom was eager to see
and perchance try to rejuvenate itself by the novel inventions. The
poor Lyons weaver, who had parted with his patent, being unable to
witness others amassing fortunes by its means, while he remained in
misery, put an end to his days. In the law suit M. Tellier, having
produced the patent bought of Leguet, got the best of it.
“Michalon, a weaver, invented the silk parting, produced with a
long piece of silk without head, which he put on his shuttle. Dufaur
invented the knotted hair foundation, knotting the hair by means of a
gauze needle. Then a workman established himself in the Faubourg
St. Denis, who made partings in the way Carron made them. He was
the first to make partings in heart shape. The brothers Lavacquerie
perfected the work of the latter. Valon, one of Dufaur’s workmen,
further perfected the wigs by giving a tighter and better fit.
“In 1822, Souchard took out a patent at Bordeaux for
implantations made with an embroidery needle, and having in the
course of time perfected his invention, he tried to implant hair on a
pig’s bladder, which, being lined with gros de Naples, made an
excellent bald-wig for theatrical performances, and produced a very
good effect.
“In 1823 Souchard went to England, to study the manner in which
the English made their silk net wigs. He found the English silk net
infinitely superior to the French, and be adopted the former for his
wigs.
“This genealogy of M. Souchard’s was written in 1836, and since
then implantation has made immense progress.”
Enough, perhaps, has been said about the manufacture of partings
to acquaint the reader with the manner in which this kind of work is
done; but I regard parting-making as a separate branch, and only
those who have constant practice can expect to become proficient.
Knotting, however, lies more within the hairdresser’s domain, and
to be a clever knotter the worker must be patient, careful, have good
eyesight, and bring to bear sound judgment in the arrangement and
execution of his work. In parts not seen, or rather where knots are
concealed through being covered with the hair above, they may be
somewhat coarsely done, but in conspicuous places, such as partings
or crowns, the greatest skill must be exhibited, and Nature copied as
exactly as possible. I have had occasion to refer at different times to
knotting, and it will be well, perhaps, to speak of it in general terms
before dwelling upon any class of work in particular.
In preparing a mount for knotting (no matter whether it be for a
bandeau, front, scalp, scalpette, or what not) you have to decide first
whether there is to be weft upon the edges of the net, and likewise
upon the galloon. If so, the net need only be cut off as before
mentioned; but when the mount is to be knotted all over, the edges
of the net must be allowed to extend the eighth of an inch or more
beyond the whole of the galloon. Here is the reason: in order to knot
over the galloon and close to the edges of it, that portion of the net
which projects must be turned under and in upon the galloon, to
which it should be neatly and securely sewn. Indeed, the net must be
sewn to the galloon wherever edges occur, for it not only holds the
net firm and tight, but when taken off the block there are no ugly
openings visible. Bear in mind the net is to be put on firm and tight,
the meshes well open, and no “bagginess” in any part. There are
different kinds of net, and you will have to select particular sorts for
special work, about which experience—if no other instructor can be
approached—must be your guide.

Fig. 30.

Knotting needles are, as the accompanying illustration shows,

small hooks set in wooden handles, and can be purchased where the
trimmings for wig-making, etc., are procurable. These needles are
fine, medium, and coarse, each one being employed according to the
kind of work required to be done. For instance, in knotting over
galloon or ribbon, where the knots cannot be seen when the mount is
examined, they might be coarsely done, especially if thickness of hair
be required. Upon net, perhaps the medium-sized needle had better
be used, but a needle sufficiently fine to carry only a single hair will
have to be employed in partings and crowns if you attempt to “defy
detection.” Care is necessary in the selection of a needle, the point of
which should turn, as it were, into the neck of it, otherwise, in
drawing back, the hook is likely to catch the net, and your handiwork
stands a chance then of being spoiled before it is completed. Let me
here give one word of advice. When you have obtained needles to
your liking, take the greatest care of them, for if you are proud of
good workmanship they might come to be regarded as “little
treasures.”
The first thing a learner should do is to make a “single knot,” and I
would recommend that a mount be put on the block, say similar to
that here shown, merely for the sake of practising.

Fig. 31.

Take some straight hair about six inches long;[18] put it between the
drawing brushes, and place a weight thereon as though you were
going to do weaving. Draw out a weft and double it over at the roots,
leaving them (the roots) rather long. You have now made a loop,
which is to be held firmly between the thumb and finger of the left
hand. Take the knotting needle and hold it with the thumb and finger
of the right hand; insert the hook in one opening of the net and allow
it to pass out at the next. By this movement you have taken up a
thread (or line) upon which you are going to knot the hair. Now bring
the looped portion of the hair forward and hook it with the needle;
Fig. 31 clearly indicates the position. Turn the open part of the hook
downwards, but keeping firm hold of the hair (by a little dexterity
you may avoid catching hold of the net) and draw the needle back
again. Let the open part of the hook now face the weft, and by a slight
movement of the needle the loop will slip back a little towards the
handle while you catch hold of or hook the weft again. This is well
shown in the following illustration.

Fig. 32.

You have now to give it a turn (which to a certain extent secures

the hair), draw the hook (with the hair) through the loop; let go the
hair from the left hand at the same moment, and pull rather tight.
The knot will then be upon the net, and if the roots are long fairly
secure. Of course there is a difficulty in describing these
technicalities, but I think with a little practice there need not be any
trouble in mastering the details, at least so far as I have gone.
With regard to single knotting, I would observe that it is not so
secure as double knotting, but the knots can and should be made
much finer. In single knotting, the roots ought always to be long,
much longer in fact than when the knots are double, and ought only
to be done with a hair or two at a time, such very fine work being
necessary in the middle of partings, the centres of crowns, etc. When
single knots are coarsely made, they are liable to be caught by the
comb when arranging the hair, and, as a consequence, the weft
pulled out; but if finely worked this is not so liable to occur. Single
knotting can be done rapidly with short hair, as in gentlemen’s wigs,
but it is somewhat insecure, and, therefore, best avoided. Better be
“slow and sure” at your work, than spoil it altogether merely to be
quick. Strive at all times to execute good work, so that your employer
may depend upon what you do, and all that emanates from the shop
will, in consequence, bear the stamp of excellence.
With regard to double knotting, I wish you to turn to the
instructions given on page 153, and, to avoid recapitulation, begin
with the words, “Take some straight hair,” etc., and follow on till you
come to “draw the hook (with the hair) through the loop,” then stop
for a moment and take up here. I repeat—“draw the hook (with the
hair) through the loop;” let that slide back a little as it did before,
take hold of (or hook) the weft again, giving the needle at the same
moment a turn; draw through the loop once more, and pull tight
down upon the net. In other words, proceed as though you were
going to make a single knot, but instead of drawing it through at
once, make another knot upon the hair itself, and then draw through.
Thus you have made or tied a double knot, and there need not be any
fear of its coming away, for it is too well secured. These double knots
should be made where they are best concealed, but ought not to be
coarsely done, otherwise they will appear unsightly when the
workmanship is examined. Practice, with attention to details, will
soon enable you to become expert. When the job is completed, (if it
be a front, or a band, or anything of that description), have ready a
top row of weft, and sew it on as before instructed, press, and finish
off in the usual way.
 CHAPTER X.

Of Wigs in General, and some Historical remarks thereon—On

Taking an Order for a Wig or Scalp—Means adopted for securing
them to the Head—Directions for Measurement—On Mounting
and Making a Scalp—“Pen-knife” and Metallic Springs—A Scalp
described with Parting and Crown—Scalps with Gauze, Net, and
Human Hair Foundations.

f wigs in general how much could be written! They are

almost “as old as the hills,” and perhaps amongst the
ancient Egyptians might be found the earliest makers of
the periwig, or peruke. Indeed, in the British Museum
can be seen a wig from the Temple of Isis that was made
two or three thousand years ago; the curl and material of
which it is made being well preserved. Probably the
custom of shaving the heads of the people (for all had to submit to
it), led to the introduction of wigs, and, as Wilkinson says, “it may
appear singular that so warm a covering to the head should have
been adopted in the climate of Egypt; but we must remember the
reticulated nature of the ground-work, on which the hair was
fastened, allowed the heat of the head to escape, while the hair
effectually protected it from the sun: it is evident that no better
covering could have been devised, and that it far surpassed, in
comfort and coolness, the modern turban.” According to Stow, the
periwig was first brought into England about the time of the
massacre of St. Bartholomew (1572), but the peruke is mentioned in
a wardrobe account in the time of Edward VI. About 1595, wigs “had
become so much the fashion that it was dangerous for children to
wander out of sight of their parents or attendants, as it was a
common practice to entice them into some private place and deprive
them of their hair for the manufacture of such articles.”—Planche.
During the reign of Charles II. the large wigs (such as are shown in
Kneller’s portrait of the Duke of Marlborough) were introduced, and
continued to increase in size till the middle of last century.
Concerning prices, the following is interesting:—“Perukes,” says
Malcolm, “were an highly important article in 1734. Those of right
gray human hair were four guineas each; light grizzle ties, three
guineas; and other colours in proportion, to twenty-five shillings.
Right gray human hair perukes, from two guineas to fifteen shillings
each, which was the price for dark ones; and right gray bob perukes,
two guineas and a-half to fifteen shillings, the price of dark bobs.
Those mixed with horsehair were much lower. It will be observed,
from the gradations in price, that real gray hair was most in fashion,
and dark of no estimation.”
The names of wigs, as may be judged from the foregoing, possess
deep interest for the trade, and it is therefore worth while to allude to
them. In the reign of Queen Anne, in addition to very long and
formally curled perukes, are mentioned “black riding wigs,” “bag
wigs,” and “nightcap wigs.” The famous battle of Ramilies, in the
same reign introduced the “Ramilie wig,” with a long gradually
diminishing plaited tail, called the “Ramilie tail,” which was tied with
a great bow at the top and a smaller one at the bottom. In the reign of
George II., the “tye-wig” and the “pigtail-wig” have to be added to the
catalogue, and at the same time the revival of the “bob-wig,” first
heard of in 1684, or one that is called after it, is also spoken of. The
“bob-wig” is thus described:—“I cut off my hair and procured a
brown bob periwig of Wilding of the same colour, with a single row
of curls just round the bottom, which I wore very nicely combed and
without powder.” Indeed, “the nomenclature of wigs is very ample,”
says an authority on the subject, “a complete system of classification
might be adopted, and genus and species discriminated with the
greatest nicety: there were Wigs Military, Legal, Ecclesiastical, and
Infantile,” room being found only for a few varieties, viz.:—
 Perruque à bonnet.
Perruque à trois marteaux.
Perruque à nœuds.
Perruque ronde.
Perruque pointue.
Perruque naissante.
Perruque à deux queues.
Perruque à tonsure.
Perruque à la brigadière.
Perruque de l’Abbé.
Perruque à boudin.
Perruque à papillons.
Perruque à deux marteaux.
Perruque à bourse.

Wigs were first worn by barristers about 1670, to which opposition

was made by the judges, and some of the leaders were not allowed to
plead in their new head-gear. In the time of James II. wigs increased
in size, becoming still larger in the following reign (William III.),
when wigs were adopted by all classes, but among those of humble
station they were moderate in size and price. Gentlemen’s wigs,
however, were large and full, requiring much hair in their
manufacture. It is recorded that in 1700 a sum of £60 was given for a
country girl’s hair, and that the grey hair of an old woman deceased
sold for nearly as much—the ordinary price of a first-class wig being
at that time forty pounds. Full-bottomed wigs were invented, it is
said, by Duviller, for the purpose of hiding some natural defect in the
shoulders of the Dauphin. Children wore wigs, or the natural hair
was curled to look like them. Archbishop Tillotson was the first of
our prelates who wore a wig. Steele’s wig cost as much as forty
guineas. Dean Swift had a fine wig for state occasions, and “Colley
Cibber’s wig, in which he played a favourite character, was of such
noble proportions that it was brought upon the stage in a sedan by
two chairmen.” The tie-wig (the long-curled wig abridged) was not
considered court dress.
“How to wear a wig,” says the author of “Trichocosmos,” “was part
of the education of a man of the world, not to be learned from books.
Those who know what witchcraft there is in handling a fan, what
dexterity in the ‘nice conduct of a clouded cane,’ will imagine the wits
and gentlemen of old did not suffer the wig to overshadow their
temples with perpetual gloom, like the wreath of smoke which
overhangs our Modern Babylon. And many a country squire must
have tried in vain to catch the right toss of the head; to sport a
playful humour in those crisp curls; or to acquire the lofty carriage of
the foretop, or the significant trifling with some obtrusive lock; and
felt as awkward in his new wig as a tailor on horseback, or a fat
alderman with a dress sword dangling between his legs.”
Natural coloured wigs were worn till about 1714, when it became
fashionable to adopt bleached hair, which soon faded, then wigs were
powdered. It is said that wigs of peculiar excellence cost as much as
£140 each, and it is on record that “a petition from the master
peruke-makers of London and Westminster, presented to the king
(George III.) in 1763, points out the great decline of their use to have
taken place at that time.” In this memorial they complain of the
public wearing their own hair, and say, “That this mode, pernicious
enough in itself to their trade, is rendered excessively more so, by
swarms of French hairdressers already established in those cities,
and daily increasing.”
Theatrical wigs will supply many capital illustrations of those that
were worn by notable personages in former years, and a ramble
through the National Gallery, Hampton Court Palace, and other
public as well as private picture galleries will be found highly
instructive to wig-makers of the present day. The chief art now
consists in making wigs so closely to imitate Nature as to defy
detection, and those who succeed in doing so may well be classed
among the most talented men in the profession. Wigs and scalps will
always be worn, and probably there is a good trade to be done in
such manufactures now, but great attention to every detail is
necessary so as to withstand the keen glance of scrutiny.
I will now apply myself to the task before me, but consider that a
few general observations are necessary and important before
entering into the technicalities of the art.
When taking an order for a lady’s or gentleman’s wig, observe the
shape of the head, cast of countenance, and age of the person who
intends wearing it. Note whether the head is long, broad, or high, as
a correct shape ought to be maintained by the wig-maker, who, in
this and other respects, should be an artist. Observe also whether the
face is long, round, or oval, because the arrangement of the hair on
the forehead and sides of the head has much to do in presenting a
good appearance. If this passes observation and comment, the result
may be considered satisfactory; but should there be “a something”
objectionable which causes remark, find out what it is, or where the
fault lies, and either remove or alter it if possible. Again, notice the
countenance; do not put in contrast to an aged face hair that is only
suitable to youth. Let the hair be consistent both in colour and
quantity with the age of the wearer, and, above all, endeavour to
avoid anything extravagant or out of place. A gentleman’s wig must
be cut and trimmed after it is made, to adapt it to the style and taste
of the wearer; it ought to fit easily in every part; and where springs
are, no undue pressure should be allowed to exist. While the general
appearance has to be well considered, the comfort of the wearer must
always be kept in view.
The reader is, doubtless, fully aware that baldness is not confined
to age, for some men lose their hair early in life. You may, without
much trouble, find a bald-headed man at thirty, and it is perhaps as
easy to discover a man at sixty with a fairly good head of hair. All
classes are likely to be more or less troubled with baldness, for it
makes its mark in a variety of ways. Sometimes the hair recedes from
the brow, giving the appearance of a very high forehead, at other
times it only attacks the crown. Then, again, the whole of the top part
of the head is left bare, which not unfrequently extends to the occiput
behind. A partial baldness requires merely a scalp which may,
according to the circumstances of the case, be either large or small,
but when the baldness is extensive, a wig will be found the most
convenient and suitable head-covering. Scalps are consequently
made in a variety of shapes and sizes; the mountings are equally
variable, and the method adopted for holding them firmly in position
admits of great ingenuity. Some scalps are mounted with galloon,
net, and springs; others have a metallic-spring attachment, which
sensibly, though not uncomfortably, grips the head, while another
mode of fastening is by means of “penknife springs” or clasps.[19]
(These open as the name indicates, and being closed, a small portion
of the growing hair is shut in or clasped at the same time.) Some
scalps, when made for the top of the head and crown have, in
addition, a strip of galloon, which, being covered with hair, easily
adapts itself to the lower part of the back of the head. By an
arrangement of this character a scalp cannot possibly go forward on
to the forehead of the wearer. Scalps when made very light and
delicate, and intended for a small-sized patch upon the upper portion
of the head, and sometimes the crown, are fixed only with gum, a
gummy substance sold for the purpose, or diachylon. This gossamer-
like scalp admits of very superior work (knotted), while the
mounting, if required, should be of the lightest possible description.
Where strength and durability are concerned, probably nothing can
be better than a well-sewn, woven scalp or wig; but when art steps in
to closely imitate nature, and attempts to defy the keen glance of
scrutiny, then both single and double knotting are brought into
requisition. This presents a more natural appearance, of course, and
though the cost is increased, the work is not so lasting. In wig and
scalp making there is plenty of scope for ability, ingenuity, and taste,
for to insure success very much is left to the judgment of the maker,
and to the carefulness and discretion of the wearer, so as to prevent
his “secret” being discovered. I will give some working directions,
with suitable illustrations, as I proceed, but for the present I am
chiefly concerned in impressing certain leading points or features
upon the mind of the learner, as success will greatly depend upon
strict attention to minute details.
Of course, careful measurement is all important, for no matter how
well the work may be done, if it proves to be a misfit, disappointment
and annoyance, to say the least, will surely be felt by the parties
concerned. Besides, a mistake of this kind is likely to prejudice the
mind of the customer, and another article (however well-made)
might not, perhaps, be received with favour; therefore, be exact. I
wish now to direct attention to the illustration which appears on the
next page and to the following directions for measurement.
No. 1.—With a tape measure ascertain the circumference of the
head.
No. 2.—Measure from the centre of the forehead (where the hair
should be) to the nape of the neck.
No. 3.—Ascertain the distance from ear to ear across the forehead
(see the lower dotted line).
No. 4.—Measure from ear to ear over the top (or highest) part of
the head.
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