1/11/2021 Latches in Digital Logic - GeeksforGeeks

Latches in Digital Logic

Difficulty Level : Medium ● Last Updated : 12 Dec, 2019

L atches are basic storage elements that operate with signal levels (rather than signal

transitions). L atches controlled by a clock transition are flip-flops. L atches are level-

sensitive devices. L atches are useful for the design of the asynchronous sequential circuit.

SR (Set-Reset) Latch – SR L atch is a circuit with:

(i) 2 cross-coupled NOR gate or 2 cross-coupled N AND gate.

(ii) 2 input S for SE T and R for RESE T.

(iii) 2 output Q, Q’.

Q Q’ STATE

1 0 Set

0 1 Reset

Under normal conditions, both the input remains 0. The following is the RS L atch with

N AND gates:

Case-1: S’=R’=1 (S=R=0) –

We use cookies to ensure you have the best browsing experience on our website. By using our Got It !
site, you acknowledge that you have read and understood our Cookie
If Q = 1, Q and R’ inputs for 2nd N AND gate are both 1.
▲ Policy & Privacy Policy

https://www.geeksforgeeks.org/latches-in-digital-logic/ 1/6
1/11/2021 Latches in Digital Logic - GeeksforGeeks

If Q = 0, Q and R’ inputs for 2nd N AND gate are 0 and 1 respectively.

Case-2: S’=0, R’=1 (S=1, R=0) –

A s S’=0, the output of 1st N AND gate, Q = 1(SET state). In 2nd N AND gate, as Q and R’

inputs are 1, Q’=0.

Case-3: S’= 1, R’= 0 (S=0, R=1) –

A s R’=0, the output of 2nd N AND gate, Q’ = 1. In 1st N AND gate, as Q and S’ inputs are 1,

Q=0(RESET state).
We use cookies to ensure you have the best browsing experience on our website. By using our Got It !
site, you acknowledge that you have read and understood our Cookie
▲ Policy & Privacy Policy

https://www.geeksforgeeks.org/latches-in-digital-logic/ 2/6
1/11/2021 Latches in Digital Logic - GeeksforGeeks

Case-4: S’= R’= 0 (S=R=1) –

When S=R=1, both Q and Q’ becomes 1 which is not allowed. So, the input condition is

prohibited.

The SR L atch using NOR gate is shown below:

Gated SR Latch –

A Gated SR latch is a SR latch with enable input which works when enable is 1 and retain

the previous state when enable is 0.

Gated D Latch –

D latch is similar to SR latch with some modifications made. Here, the inputs are

complements of each other. The design of D latch with Enable signal is given below:

The truth table for the D-L atch is shown below:

We use cookies to ensure you have the best browsing experience on our website. By using our Got It !
Enable D Q(n) Q(n+1) STATE
site, you acknowledge that you have read and understood our Cookie
▲ Policy & Privacy Policy

https://www.geeksforgeeks.org/latches-in-digital-logic/ 3/6
1/11/2021 Latches in Digital Logic - GeeksforGeeks

Enable D Q(n) Q(n+1) STATE

1 0 x 0 RESE T

1 1 x 1 SE T

0 x x Q(n) No Change

A s the output is same as the input D, D latch is also called as Transparent L atch.

Considering the truth table, the characteristic equation for D latch with enable input can

be given as:

Q(n+1) = EN.D + EN'.Q(n)

Reference :

DIGITAL ELECTRONICS – Atul P. Godse, Mrs. Deepali A . Godse

Attention reader! Don’t stop learning now. Get hold of all the impor tant CS Theor y

concepts for SDE inter views with the CS Theor y Course at a student-friendly price and

become industr y ready.

RECOMMENDED ARTICLES Page : 1 2 3

Difference between Programmable Synchronous Sequential Circuits in

01 05
Logic Array and Programming Array Digital Logic
Logic 08, Mar 17

03, Jun 19

Full Adder in Digital Logic

Half Subtractor in Digital Logic 06 21, Mar 17
02 05, Aug 15

Half Adder in Digital Logic Full Subtractor in Digital Logic

03 07 10, Oct 17
03, Aug 15

Counters in Digital Logic Binary Decoder in Digital Logic

04 02, Nov 15
08 23, Oct 17

Related Articles

We use cookies to ensure you have the best browsing experience on our website. By using our Got It !
site, you acknowledge that you have read and understood our Cookie
▲ Policy & Privacy Policy

https://www.geeksforgeeks.org/latches-in-digital-logic/ 4/6
1/11/2021 Latches in Digital Logic - GeeksforGeeks

 Like 8

 Previous Next 

Ar ticle Contributed By :

lakshmiprabha
@lakshmiprabha

Vote for di culty

Current di culty : Medium

Easy Normal Medium Hard Expert

Improved By : manikandan20061999

Article Tags : Digital Electronics & Logic Design , GATE CS

Improve Article Report Issue

Writing code in comment? Please use ide.geeksforgeeks.org, generate link and share the link here.

5thbrowsing
We use cookies to ensure you have the best Floor, A-118,
experience on our website. By using our Got It !
Sector-136, Noida,
site, you acknowledge that you have read and understood UttarPolicy
our Cookie
▲
Pradesh - 201305
& Privacy Policy

https://www.geeksforgeeks.org/latches-in-digital-logic/ 5/6
1/11/2021 Latches in Digital Logic - GeeksforGeeks

[email protected]

Company Learn
About Us Algorithms
Careers Data Structures
Privacy Policy Languages
Contact Us CS Subjects
Video Tutorials

Practice Contribute
Courses Write an Article
Company-wise Write Interview Experience
Topic-wise Internships
How to begin? Videos

@geeksforgeeks , Some rights reserved

We use cookies to ensure you have the best browsing experience on our website. By using our Got It !
site, you acknowledge that you have read and understood our Cookie
▲ Policy & Privacy Policy

https://www.geeksforgeeks.org/latches-in-digital-logic/ 6/6