Module 2: Error Control System and Error Detection Codes

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Introduction:

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Introduction
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 Types of Errors
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An error occurs when a bit is altered between transmission and reception

• Single bit errors
• One bit altered
• Adjacent bits not affected
• White noise
• Burst errors
• Length B
• Contiguous sequence of B bits in which first last and any number of
intermediate bits in error
• Impulse noise
• Fading in wireless
• Effect greater at higher data rates

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Types
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Error control techniques
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Error detection, as name suggests, simply means detection or identification of errors.

These errors may cause due to noise or any other impairments during transmission
from transmitter to the receiver, in communication system. It is class of technique
for detecting garbled i.e. unclear and distorted data or message

Error correction, as name suggests, simply means correction or solving or fixing of

errors. It simply means reconstruction and rehabilitation of original data that is error-
free. But error correction method is very costly and is very hard.

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Types of Error control System
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Comparison of FEC and ARQ
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Error Detection
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 Vertical Redundancy Check (VRC)codes
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Vertical Redundancy Check is also known as Parity Check. In this method, a

redundant bit also called parity bit is added to each data unit. This method includes
even parity and odd parity. Even parity means the total number of 1s in data is to be
even and odd parity means the total number of 1s in data is to be odd.

If the source wants to transmit data unit 1100111 using even parity to the destination.
The source will have to pass through Even Parity Generator.

Parity generator will count number of 1s in data unit and will add parity
bit. In the above example, number of 1s in data unit is 5, parity
generator appends a parity bit 1 to this data unit making the total
number of 1s even i.e 6 which is clear from above figure.
Data along with parity bit is then transmitted across the network. In
this case, 11001111 will be transmitted. At the destination, This data
is passed to parity checker at the destination. The number of 1s in
data is counted by parity checker.
If the number of 1s count out to be odd, e.g. 5 or 7 then destination
will come to know that there is some error in the data. The receiver
then rejects such an erroneous data unit.

Advantages :
• VRC can detect all single bit error.
• It can also detect burst errors but only in those cases where number
of bits changed is odd, i.e. 1, 3, 5, 7, …….etc.
Disadvantages :
The major disadvantage of using this method for error detection is that
it is not able to detect burst error if the number of bits changed is
even, i.e. 2, 4, 6, 8, …….etc.

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Example –
If the original data is 1100111. After adding VRC, data unit that will be
transmitted is 11001111. Suppose on the way 2 bits are 01011111.
When this data will reach the destination, parity checker will count
number of 1s in data and that comes out to be even i.e. 8. So, in this
case, parity is not changed, it is still even. Destination will assume that
there is no error in data even though data is erroneous.

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Longitudinal Redundancy Check codes (LRC)
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It is also known as 2-D parity check. In this method, data which the
user want to send is organised into tables of rows and columns. A
block of bit is divided into table or matrix of rows and columns. In
order to detect an error, a redundant bit is added to the whole block
and this block is transmitted to receiver. The receiver uses this
redundant row to detect error. After checking the data for errors,
receiver accepts the data and discards the redundant row of bits.
Example :
If a block of 32 bits is to be transmitted, it is divided into matrix of four
rows and eight columns which as shown in the following figure :

Figure: LRC

In this matrix of bits, a parity bit (odd or even) is calculated for each
column. It means 32 bits data plus 8 redundant bits are transmitted to
receiver. Whenever data reaches at the destination, receiver uses
LRC to detect error in data.
Advantage :
LRC is used to detect burst errors.

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Example : Suppose 32 bit data plus LRC that was being transmitted is hit by a burst error of
length 5 and some bits are corrupted as shown in the following figure :

The LRC received by the destination does not match with newly corrupted LRC.
The destination comes to know that the data is erroneous, so it discards the
data.
Disadvantage :
The main problem with LRC is that, it is not able to detect error if two bits in a
data unit are damaged and two bits in exactly the same position in other data
unit are also damaged.

Example : If data 110011 010101 is changed to 010010110100.

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 Checksum Detection
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• In checksum error detection scheme, the data is divided into k

segments each of m bits.
• In the sender’s end the segments are added using 1’s complement
arithmetic to get the sum. The sum is complemented to get the
checksum.
• The checksum segment is sent along with the data segments.
• At the receiver’s end, all received segments are added using 1’s
complement arithmetic to get the sum. The sum is complemented.
• If the result is zero, the received data is accepted; otherwise
discarded.

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 Cyclic redundancy Check codes (CRC)
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• Unlike checksum scheme, which is based on addition, CRC is based

on binary division.
• In CRC, a sequence of redundant bits, called cyclic redundancy check
bits, are appended to the end of data unit so that the resulting data
unit becomes exactly divisible by a second, predetermined binary
number.
• At the destination, the incoming data unit is divided by the same
number. If at this step there is no remainder, the data unit is assumed
to be correct and is therefore accepted.
• A remainder indicates that the data unit has been damaged in transit
and therefore must be rejected.

• Sender has a generator G(x) polynomial.

• Sender appends (n-1) zero bits to the data.
Where n= no of bits in generator
• Dividend appends the data with generator G(x) using modulo 2 division
(arithmetic).
• Remainder of (n-1) bits will be CRC.

Codeword = Data bits + CRC bits

• CRC can detect all burst errors that affect an odd number of bits.
• CRC can detect all burst errors of length less than or equal to the degree
of the polynomial.
• CRC can detect with a very high probability, burst errors of length greater
than the degree of the polynomial.

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Cyclic redundancy Check codes (CRC)
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Transmitter

Cyclic redundancy check is 101. Thus, the sender sends 10110101 to the
receiver.

(i) R= 10110101 (ii) R= 10110110

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CRC Example
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CRC Example (Polynomial Form)
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Consider data sequence of 11010011

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