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Vlsi Technology

This document outlines the examination paper for the M.Tech I Semester in VLSI Technology at Jawaharlal Nehru Technological University Hyderabad. It includes eight questions covering topics such as nMOS technology fabrication, substrate bias effects, NAND gate layouts, oxidation in IC fabrication, photolithography, CVD techniques, and resistor design in BiCMOS technology. Each question carries equal marks and requires detailed explanations and diagrams.

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Shiva Glenn
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15 views1 page

Vlsi Technology

This document outlines the examination paper for the M.Tech I Semester in VLSI Technology at Jawaharlal Nehru Technological University Hyderabad. It includes eight questions covering topics such as nMOS technology fabrication, substrate bias effects, NAND gate layouts, oxidation in IC fabrication, photolithography, CVD techniques, and resistor design in BiCMOS technology. Each question carries equal marks and requires detailed explanations and diagrams.

Uploaded by

Shiva Glenn
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
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N

Code No: 5457AD R17


TU
JAWAHARLAL NEHRU TECHNOLOGICAL UNIVERSITY HYDERABAD
M.Tech I Semester Examinations, October/November - 2020
VLSI TECHNOLOGY
(VLSI System Design)
H
Time: 2 hours Max. Marks: 75
Answer any five questions
All questions carry equal marks
---
U
1. Explain the fabrication steps of nMOS technology with neat diagrams. [15]
SE
2.a) Explain the effect of substrate bias on threshold voltage with necessary equations.
b) How does the electrical properties of a depletion mode MOSFET differ from those of
JFET? [7+8]
D
3. Draw the layout of the 3-input NAND gate. A single drain diffusion region is shared
between two of the PMOS transistors. Estimate the actual diffusion capacitance from the
PA
layout. [15]

4. Sketch pseudo-nMOS 4-input NAND and NOR gates. What are the rising, falling and
average logical efforts of each gate? [15]
PE
5. How oxidation is used for isolation? What are the different types of oxidations used in
IC fabrication? Explain them. [15]
R
6. Explain how the photolithography is used to transfer patterns to each layer of the IC
fabrication. [15]
S
7. Explain how a layer is deposited on the wafer surface using CVD technique. [15]
13
8. Explain the designing steps of a resistor in BiCMOS technology and draw the circuit
diagram of it. [15]
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2 0A
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