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EEE Lab Report 3

The document outlines an experiment conducted by a student at North South University to analyze the loading effect of a voltage divider circuit. The objective is to evaluate how the circuit performs with and without load resistance, using specific equipment and procedures to measure output voltage. The findings indicate that as load resistance increases, the output voltage decreases, supporting the theory of loading effect with minimal experimental error compared to theoretical calculations.

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7 views7 pages

EEE Lab Report 3

The document outlines an experiment conducted by a student at North South University to analyze the loading effect of a voltage divider circuit. The objective is to evaluate how the circuit performs with and without load resistance, using specific equipment and procedures to measure output voltage. The findings indicate that as load resistance increases, the output voltage decreases, supporting the theory of loading effect with minimal experimental error compared to theoretical calculations.

Uploaded by

mipef18567
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© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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NORTH SOUTH UNIVERSITY

DEPARTMENT OF ELECTRICAL & COMPUTER ENGINEERING

Department of Electrical and Computer Engineering


North South University
Summer 2021
EEE 141L.1 Electrical Circuits-I

Faculty: Dr. K.M.A. Salam (KAS)

Experiment No.03: Loading Effect of Voltage Divider Circuit.

Students Name : Rafiul Hasan

Lab 3: Loading Effect of Voltage Divider Circuit

Objective:
 To analyze how the voltage divider circuit behaves when there is no load resistance
connected.

 Evaluate the performance of voltage divider circuit due to loading.

List of Equipment:

 Trainer Board.
 DMM.
 2 × 1982Ω resistors / 2 × 1.982KΩ resistors.
 1 × (0-10kΩ) variable resistor.

Note- For my experiment I am using the two load resistors of resistance 1.982KΩ.
R1 and R2 = (560+1422) = 1982Ω = 1.982KΩ.
The Dc (Direct Current) supply voltage for my experiment is 23V (as assigned by sir).

Introduction:
Voltage Divider circuit provides a simple way to convert a DC voltage to another lower DC
voltage.

Consider the following voltage divider circuit.

Circuit Diagram:
Fig-1

𝑽𝒐𝒖𝒕 = VR2 =(𝑽𝒊)(𝑹2)/(𝑹1+𝑹2)


= 23V ×1.982 KΩ/(1.982+1.982) KΩ
= 11.5V

With Load:

Fig-2
Since you have a Load resistance parallel to 𝑅2 , your Voltage divider formula to find Vout is:

𝑽𝒐𝒖𝒕= 𝑽𝒊(𝑹𝟐 ∕∕𝑹𝟑)/(𝑹𝟏+(𝑹𝟐

Here, 𝑹𝟐 ∕∕𝑹𝟑=(R2*R3)/( R2+R3)


∕∕𝑹𝟑))

Design Criteria:
To minimize the loading effect, choose the load resistor to be much larger than its parallel
resistor.

If R3 is much greater than R2 then R2||R3 (parallel combination of R2 and R3) is approximately
equal to R2.

Procedure:

1. Construct the voltage divider circuit as shown in figure above.

2. Measure the unloaded output voltage Vout. Record the value in Table-1.

3. Connect 10KΩ variable load resistor, parallel with R2 to the circuit. (Connect 1 middle
pin of variable resistor and one of the other pins).
4. Change the value of the variable resistor according to the Table-1, and record Vout for
each resistor value in Table-1.

RL Vout Vout %Error


(Measured) (Calculated)
No resistor 11.5V 11.5V 0%
1K 5.776V 5.778V 0.03%
4K 9.217V 9.215V 0.02%
7K 10.074V 10.075V 0.01%
10K 10.463V 10.463V 0%

Report Questions:
1. Explain the loading effect of your circuit (i.e. explain how does your Vout vary with
increasing Load resistor)

In this circuit, as the load resistance is increased, the voltage level of the voltage source
gets reduced because of the loading effect. The greater the value of the load resistance,
R3, then the effective resistance of the parallel combination becomes approximately
equal to R2.

If we consider the Dc power source as the input voltage and make a system of series
circuit, containing the two identical resistors of resistance 1.982KΩ, then the supply
voltage is divided equally across both the resistors. Now, if we add a load across R2
parallelly, then for this system R2 serves as an input and the load serves as an output.
This load has to be connected parallelly otherwise, the voltage will get distributed. When
no load was present, then the supple voltage was equally divided among R1 and R2
which is 11.5V. Now, when a load is connected across R2, 11.5V serves as an input
voltage for the load resistor. The output voltage of the system was 11.5V initially, but
after the addition of the load across R2, the voltage drops to a lower value. This change in
the voltage is called the loading effect.

2. Showing all steps in details, theoretically calculate the value of Vout for each load
resistor.

Here, V1=23V which is the supply voltage.


When RL=1KΩ
R2||R3= (1/R2 + 1/R3)-1 = (R2×R3/R2+R3) = (1.982×1/1.982+1)=0.665KΩ
Vout = V1×(R2||R3)/((R2||R3)+R1) = 23×(0.665/(0.665+1.982)) = 5.778V

When RL=4KΩ
R2||R3= (1/R2 + 1/R3)-1 = (R2×R3/R2+R3) = (1.982×4/1.982+4) = 1.325KΩ
Vout = V1×(R2||R3)/((R2||R3)+R1) = 23×(1.325/(1.325+1.982)) = 9.215V

When RL=7KΩ
R2||R3= (1/R2 + 1/R3)-1 = (R2×R3/R2+R3) = (1.982×7/1.982+7) = 1.545KΩ
Vout = V1×(R2||R3)/((R2||R3)+R1) = 23×(1.545/(1.545+1.982)) = 10.075V

When RL=10KΩ
R2||R3= (1/R2 + 1/R3)-1 = (R2×R3/R2+R3) = (1.982×10/1.982+10) = 1.654KΩ
Vout = V1×(R2||R3)/((R2||R3)+R1) = 23×(1.654/(1.654+1.982)) = 10.463V

3. Comparing the theoretical data to the experimental data, comment how far the loading effect
of your circuit supports the theory.

We know, %Error= |(Theoretical value — Experimental value)| / Theoretical value

When RL=0KΩ, Vout experimental value (measured using DMM) = 11.5V, Vout
theoretical value = 11.5V, error is 0%

When RL=1KΩ, Vout experimental value (measured using DMM) = 5.776V, Vout
theoretical value = 5.778V, error is 0.03%

When RL=4KΩ, Vout experimental value (measured using DMM) = 9.217V, Vout
theoretical value = 9.215V, error is 0.02%

When RL=7KΩ, Vout experimental value (measured using DMM) = 10.074V, Vout
theoretical value = 10.075V, error is 0.01%

When RL=10KΩ, Vout experimental value (measured using DMM) = 10.463V, Vout
theoretical value = 10.463V, error is 0%

When the load resistor is added, due to the loading effect the voltage level is reduced. So,
this circuit supports the loading effect theory.

Discussion:
In this experiment we learned how the voltage divider circuit behaves when load is
applied. There is a small percentage error as we are rounding the number to three decimal
places however, since the experiment is carried out in multisim so there shouldn’t be any
error. If carried out using instruments in laboratory, there would be percentage errors due
to the internal resistance of the appliances and the wires.

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