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PE - Lecture 10 - T 2025

This document provides an introduction to DC-AC inverters, detailing half-bridge and full-bridge inverter configurations, as well as PWM control schemes. It includes analysis of output voltage control, switching waveforms, and average power calculations for resistive and inductive loads. The document also presents examples and equations relevant to the operation and performance of inverters.

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0% found this document useful (0 votes)
24 views36 pages

PE - Lecture 10 - T 2025

This document provides an introduction to DC-AC inverters, detailing half-bridge and full-bridge inverter configurations, as well as PWM control schemes. It includes analysis of output voltage control, switching waveforms, and average power calculations for resistive and inductive loads. The document also presents examples and equations relevant to the operation and performance of inverters.

Uploaded by

Pnz
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
You are on page 1/ 36

Intro. to Power Electronics 2025 Y.-M.

Chen

Lecture 10
DC-AC Inverters

Outlines
I. Introduction
II. Half-Bridge Inverters
III. Full-Bridge Inverters
IV. PWM Control Schemes

1
EE/NTU
Intro. to Power Electronics 2025 Y.-M. Chen
I. Introduction
Basic Block Diagram of DC-AC Inverters

Block diagram of a typical power electronic circuit with dc-to-ac inverter.


2
EE/NTU
Intro. to Power Electronics 2025 Y.-M. Chen

Voltage-Source and Current-Source Inverters

Block diagram representations for (a) voltage source inverter and


(b) current source inverter.
3
EE/NTU
Intro. to Power Electronics 2025 Y.-M. Chen

Inverter Configurations

Single-phase inverter
arrangements.
(a) Push-Pull inverter.
(b) Half-bridge inverter.
(c) Full-bridge inverter

4
EE/NTU
Intro. to Power Electronics 2025 Y.-M. Chen

Output Voltage Control

Controlling the dc input using (a) dc-dc converter or


(b) ac-dc phase-controlled rectifier
5
EE/NTU
Intro. to Power Electronics 2025 Y.-M. Chen

II. Half-Bridge Inverters


Resistive Load

Vdc/2

Vdc/2

(a) Half-bridge inverter under resistive load. Half-bridge inverter circuit with
(b) Switching and output voltage waveforms large splitting capacitors 6
EE/NTU
Intro. to Power Electronics 2025 Y.-M. Chen
Example 9.1
Sketch the current and voltage waveforms for iin, io, v S 1 ,and v S 2 in the circuit shown in Fig. 9.6
for q=0 and q0. Assume that the switching waveform for S1 and S2 are shown in Fig. 9.7.
Determine the average output voltage in terms of Vdc and  when the inverter operates in the
steady state.

Solution

(a) Switching waveforms.


(b) Current and voltage
waveforms for q = 0.
(c) Current and voltage
EE/NTU waveforms for q  0. 7
Intro. to Power Electronics 2025 Y.-M. Chen

Mode 1
when S1 is ON and S2 is OFF, then the output voltage and current equations are given by,
V
vo = d c
2
v V
io = o = d c
R 2R
From KCL
iin = ic1 + io = ic 2

The voltages across the switches are,


vS 1 = 0
Vd c
vS 2 = vo + = Vd c
2
Mode 2 starts when S1 and S2 are OFF during the short interval q,
vo = 0
io = 0
iC1 = iC 2 = iin = 0
Vd c
vS 1 = vS 2 = 8
EE/NTU 2
Intro. to Power Electronics 2025 Y.-M. Chen
Mode 3 starts when S2 is ON and S1 is OFF, which yields the following
equations:

Vd c
vo = −
2
vo V
io = = − dc
R 2R
ic1 = iin = ic 2 − io
Vd c
vS1 = Vd c − vo + = Vd c vS 2 = 0
2

Mode 4 is similar to Mode 2 since both switches are open.

The rms output voltage is given by:


1 T
vo2,rm s =  vo2 (t )  d (t )
T 0
1   −q  Vd c  2 −q − V 
2

vo ,rm s =      +   
2 dc 2
d ( ) d
2  q
 2   +q 2 

2
vo2,rm s = d c ( − 2q )
V
4
Notice that when q = 0 , the rms value of the output is Vdc/2.
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Intro. to Power Electronics 2025 Y.-M. Chen

Inductive Load Note: Split capacitors are replaced by two


identical voltage sources, Vdc.

(a) Half-bridge inverter with inductive-resistive load.


(b) Equivalent circuit. (c) Steady-state waveforms.
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MOSFET Implementation
With S1 and S2 switched complementarily, each at a 50% duty cycle at a switching
frequency f , vin(t) is defined:
+ V d c 0  t  T 2
vin (t ) =  
− V d c T 2  t  T

In the steady state, with RL load, for 0 < t < t1, the inductor current is negative and flow
through body (free-wheeling) diode.

MOSFET implementation for S1 and S2 in the half-bridge inverter.


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Exact Analysis
In steady state, iL (0) = −iL (T 2) = iL (T )
During the first interval ( 0  t  T / 2 ) when S1 is on and S2 is off, vin (t ) = +Vd c , resulting in
the following equation for iL(t):
diL
L + RiL = Vd c (9.3)
dt
If the inductor initial value equals -IL(0), the solution for iL(t) is given by:
 V  V L (9.4)
iL (t ) = − I L (0) + d c e−t / + d c =
 R R R

Since -iL(T/2)=iL(0), then the initial condition at t = 0 is constant and given by:
−T
V 1 − e 2
I L (0) = − dc
R 1 + e−T 2 (9.5)
The second half cycle for t  T 2 produces the following expression for iL (t ) with the initial
condition at t=T/2 equaling to -IL(0).  V  V
iL (t ) =  I L (0) + d c e−(t −T / 2) / − d c
 R R (9.6)
The average power delivered to the load can be obtain from the following relation,
T
1
T 0
Po , ave = iL (t )vo (t )dt

2Vdc
T 2
  Vdc  − t  Vdc 
=
T   −  I
0
L (0) +
R 
e +
R 
 dt (9.7)
Where I L (0) is given by Eq. (9.5)
The time at which iL(t) becomes zero is obtained by setting iL(t) in Eq. (9.4) to zero at t = t1,
−T 12
to yield, 1 + e 2
(9.8)
EE/NTU t1 =  ln
2
Intro. to Power Electronics 2025 Y.-M. Chen
Average Transistor and Diode currents
Obtain quantitatively the expressions for the diode and transistor currents, we represent the
load voltage and current by their fundamental components as shown in Fig. 9.10(a).
vo (t ) of and i L (t ) be given by
vo1 (t ) =Vo1 sin t iL1 (t ) = Io1 sin(t + q )

where Vo1 = 4Vd c and I o1 and q are the peak current and the phase angle

 L 
 and Z = R + (L )
4V
I o1 = d c , q = tan −1  2 2

Z  R 

Fig 9.10 (a) Output voltage and current waveforms. (b) Average transistor and diode current
waveforms as a function of q. 13
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Using the fundamental component expression, the rms value of the diode and transistor
currents are given by:
q
1 2
2 0
I D ,rm s = i L1 (t )dt

q (9.12)
1
I D , rms = I sin  td t
2 2

2
o1
0

I o21  sin 2q  I o1 q sin q cosq


=
4  − 2 +q  = 2 

2
 

1 (9.13)
I Q ,rm s = 
2 q
I o21 sin 2 tdt

I o21 I q sin q cosq


= ( + cosq sin q − q ) = o1 1 − +
4 2  

and the average values of the diode and transistor currents are given by,
q
1 I

=   o1 (1 − cosq ) (9.14)
I D ,a ve I sin td t =
2 0
o1
2

I
I = o1 (1 + cosq ) (9.15)
Q, ave 2
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Intro. to Power Electronics 2025 Y.-M. Chen
Inductive Load Analysis
The average output power delivered to the load is given by:
Po,ave = Vo1.rmsI o1,rms cosq (9.16)
Vo1 2 2Vd c
Vo1,rm s = =
2 
I o1
I o1, rm s =
2

Equation (9.16) yields the following expression for Po,ave ,


8Vd2c
Po,a ve = cosq
2 Z (9.17)
The ripple voltage in the dc-to-ac inverter is defined by,
Vo,rip p le = Vo2,rms − Vo2,a ve (9.18)
The input ripple current expression in the dc-to-ac inverter is defined by:
I in ,rip p le = I o2,rms − I o2,a ve (9.19)
I in ,rip p le  I o1,rm s =
2Vd c (9.20)
Z

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Intro. to Power Electronics 2025 Y.-M. Chen
Example 9.3
Draw the output voltage and vs1 waveforms for the center tap bi-phase inverter shown in Fig.
9.11. Assume S1 and S2 are bi-directional switches and are switched at a 50% duty cycle. It
is used in a low input voltage application to reduce losses, since the current only flows half-
period in a section of the transformer (the transformer is not fully utilized). The two modes
of operations are shown in Fig. 9.11(b) and (c), the waveforms are shown in Fig. 9.11(d).

Solution:
The equivalent circuit for Mode 1 when switch S1 is on is shown in Fig. 9.11(b). The output
voltage is given by,
vo n2
=
Vd c n1
n2
vo = Vd c
n1

Figure 9.11(c) shows the equivalent circuit for Mode 2


vo n
=− 2
Vd c n1
n2
vo = − Vd c
n1

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Intro. to Power Electronics 2025 Y.-M. Chen

The waveforms for vo are shown in Fig. 9.11(d)

Fig 9.11 (a) Center-tap biphase inverter for Example 9.3. (b) Mode 1. (c) Mode 2. (d)
Voltage waveforms
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Intro. to Power Electronics 2025 Y.-M. Chen
III. Full-Bridge Inverters
Resistive Load
If S1, S3 and S2, S4 are switched ON and OFF at a 50% duty cycle as shown in Fig. 9.13
(a), the output voltage, shown in Fig.9.13 (b), is a symmetrical square wave whose
fundamental rms value is controlled only by varying Vdc.

Full-bridge inverter under a purely resistive load.


(a) Switching sequence for full-bridge
voltage-source inverter at 50% duty cycle.
(b) Output voltage waveform.
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The fundamental value of is given by:
4Vd c (9.25)
vo1 (t ) = sin(t )

4Vd c
The rms value is .
2
The fundamental component of the output voltage, vo1(t), with a phase shift is given by,
1 a
vo1 (t ) = 2Vd c − (sin t ) (9.26)
2 
1 a
And the rms value is given by 2Vd c −
4 2

Fig 9.14 (a) Switching sequence with a


phase shift. (b) Output voltage. (c)
Fundamental component for vo(t).

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Intro. to Power Electronics 2025 Y.-M. Chen
Example 9.4 Consider the resistive load full-bridge voltage source inverter shown in Fig.
9.12 with the following circuit parameters: Vdc = 150V, R = 12 W and fs = 60 Hz. Sketch the
waveforms for vo & iin determine the average power delivered to the load for the two
switching sequences shown in Fig. 9.13(a) and Fig. 9.14(a), with a=100.
Solution
For the switch sequence shown in Figure 9.13(a), v o and io are symmetric and given by,
+Vdc ,0  t  T 2
vo = 
−Vdc ,T 2  t  T
 Vdc
 + ,0  t  T 2
 R
io = 
− Vdc ,T 2  t  T

 R

The average output power is given by,


T
1
Po ,a ve =  vo io dt
T 0
For the switch sequence shown in Fig. 9.14(a), the average output power as given by:
Vo2,rms
Po,a ve =
R
where the rms value is expressed as,
1 a
Vo ,rm s = 2Vd c −
4 2
The resultant average output power for a = 100 is given by,
 2a 
Vd2c1 − 
  
Po,a ve = Po,ave = 1666.7 W 20
R
EE/NTU
Intro. to Power Electronics 2025 Y.-M. Chen

Inductive Load
• Figure 9.17(a) shows a full-bridge inverter under an inductive-resistive load.
• If the switches are operating at a 50% duty cycle with a two-state output, then the
current and voltage waveforms are shown in Fig. 9.17(b). The analysis of this inverter is
similar to the half-bridge voltage source inverter discussed earlier.
• The rms values for and of Fig. 9.17(b) vo are io based on a 50% square wave output
given by,
I o2,rm s = I12,rm s + I 22,rm s + ....... + I n2,rm s (9.27a)
Vo2,rm s = Vd c (9.27b)

In
Where I n,rm s = ,
2
and I n is the peak current of the nth harmonic of io (t ) .

Fig 9.17 (a) Full-bridge inverter under R-L load.

Switches S1 ~ S4 are MOSFET with


body diode

21
EE/NTU
Intro. to Power Electronics 2025 Y.-M. Chen

Fig 9.17 (b) Waveforms under 50% duty cycle. (c)


Fundamental component of the inductor current.
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Intro. to Power Electronics 2025 Y.-M. Chen

Output voltage is a square wave with a 50% duty cycle, its Fourier series
4Vd c  sin 3t sin 5t sin nt 
vo (t ) =  sin t + + +. . .+  (9.28)
  3 5 n 
Therefore,io (t ) is given by,
 
4Vd c  sin t sin 3t sin 5t sin nt 
io (t ) = + + +. . .+ (9.29)
  3 R + (3L ) 5 R + (5L) n R + (nL ) 
 R + (L )
2 2 2 2 2 2 2 2

rms value for the nth current component,


2 2Vd c
I n ,rm s =
n Z n
where,
Z n = R 2 + (nL) 2

we assume that the major part of the average output power is delivered at the fundamental
frequency, then Po,ava

8Vd2c (9.30)
Po,a ve = cosq
 2 R 2 + (L) 2

23
EE/NTU
Intro. to Power Electronics 2025 Y.-M. Chen

IV. PWM Control Schemes

Simplified block diagram of single-phase switching-mode inverter.


24
EE/NTU
Intro. to Power Electronics 2025 Y.-M. Chen

The PWM method may be grouped into classes:

1) Non-sinusoidal PWM in which all pulses have the same width and are
normally modulated equally to control the output voltage.

Typical waveform for equal-pulse PWM technique.


25
EE/NTU
Intro. to Power Electronics 2025 Y.-M. Chen

2) Sinusoidal Pulse-Width-Modulation (SPWM) allows the pulse


width to be modulated sinusoidally, i.e. the width of each pulse is
proportional to the instantaneous value of a reference sinusoid whose
frequency equals the fundamental’s.

Typical waveforms for sinusoidal PWM technique.


26
EE/NTU
Intro. to Power Electronics 2025 Y.-M. Chen

Basic concept Sinusoidal PWM


In the steady state, the duty cycle in PWM switch mode converters is relatively
constant and does not vary with time: Vo = DVd c (9.76)
If the duty cycle, d(t), varies or is modulated according to a certain time function,
with a modulating frequency, fo, then it is possible to shape the output voltage
waveform, vo, in such a way that its average value over the modulating period
synthesizes a sinusoidal waveform.If the duty cycle is defined according to the
following function, d (t ) = Dd c + Dmax sin  o t
(9.77)
where Ddc: duty cycle when no modulation exists, Dmax : maximum modulation constant,
and wo : frequency of modulation.
the output voltage , vo, is given by,
vo = d (t )Vd c = Vd cDd c + Vd cDmax sin ot (9.78)

For a buck-type converter (Vo=DVin), since the output


voltage cannot be negative, then Dmax < Ddc .

The amplitude modulation and frequency


modulation indices are defined as follows:
V f
ma = ref , p ea k mf = s
Vtri , p ea k fo 27
EE/NTU Example of Ddc = 0.5, Dmax = 0.8Ddc, and fo = fs/12.
Intro. to Power Electronics 2025 Y.-M. Chen
Basic SPWM Concept
As an example, if Ddc = 0.5, Dmax = 0.4 , and fo = fs/12, the duty cycle is given by,
d (t ) = 0.5 + 0.4 sin( 2f oti ) where ti = 0,1,2,3,…,12.

Since the switching frequency is 12 times faster than the modulating frequency, fo,
then d(t) is sampled 12 times between 0  t  To .

28
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Sinusoidal Pulse Width Modulation (SPWM)


Bi-polar SPWM
• The diagonal switches (TA+ , TB-) form a switching pair. They
are turned ON or OFF simultaneously.
• The diagonal switches (TA- , TB+) form another switching pair.
They are turned ON or OFF simultaneously.
• Two switching pair are operated complementary and cannot be
ON simultaneously.
• An pulsating square-wave voltage with alternating positive and
negative polarity will be generated at the terminal before the
low-pass filter.
• The carrier signal is a high frequency triangular waveform
while the low frequency sinusoidal signal serves as the control
signal.
• The control signal is compared with the carrier to decide which 29
EE/NTU
switching pair should be turned on.
Intro. to Power Electronics 2025 Y.-M. Chen

vcontrol vtri

0 t L
iac

DA+ DB+
TB+
1 TA+
( fs
) A
vA vB vAB
(a) Vdc Cd B Loadv
ac

vAB 110 V,AC


vAo, fundamental = (vAo)1 DA- DB-
TA- TB- 60 Hz
Vdc

0 t

-Vdc

t=0
vcontrol < vtri
Full-bridge Inverter
TA- :on, TA+ :off
vcontrol > vtri Bipolar SPWM
TA+ :on, TA- :off
(b)

Vo,amp = Vdc x ma
30
EE/NTU
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Inverter Operation Modes


L L
iac iac

DA+ DB+ DA+ DB+


TB+ TB+
TA+ TA+
A A
vA vB vAB=Vdc vA vB vAB=-Vdc
Vdc Cd B Loadv
ac Vdc Cd B Loadv
ac

DA- DB- 110 V,AC 110 V,AC


60 Hz DA- DB-
TA- TB- TA- TB- 60 Hz

(a) (c)

L
iac
Bi-polar operation modes
DA+ DB+
TA+
A
TB+
during positive half-cycle
vA vB vAB=-Vdc
Vdc Cd B
Loadv
ac

DA- DB- 110 V,AC


TA- TB- 60 Hz

(a) → (b) → (c) → (b) → (a)


(b)

31
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Intro. to Power Electronics 2025 Y.-M. Chen

Inverter Operation Modes


L L
iac iac

DA+ DB+ DA+ DB+


TB+ TB+
TA+ TA+
A A
vA vB vAB=-Vdc vA vB
Vdc Cd B vac Vdc Cd B
vAB=Vdc Loadv
ac
Load
DA- DB- 110 V,AC DA- DB- 110 V,AC
TA- TB- 60 Hz TA- TB- 60 Hz

(a) (c)

L
iac
Bi-polar operation modes
DA+ DB+
TA+
A
TB+
during negative half-cycle
vA vB vAB=Vdc
Vdc Cd B v
Loadac

DA- DB- 110 V,AC


TA- TB- 60 Hz

(a) → (b) → (c) → (b) → (a)


(b)

32
EE/NTU
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Uni-polar SPWM
• Switches (TA+ , TA-) on the front arm form a switching pair. They
operate complementary and cannot not be ON simultaneously.
• Switches (TB+ , TB-) on the rear arm form a switching pair. They
operate complementary and cannot not be ON simultaneously.
• The pulsating square-wave voltage before the low-pass filter
becomes uni-polar (Vdc, 0 or –Vdc,0)
• The carrier signal is a high frequency triangular waveform. The
control signals are two low-frequency sinusoidal waveforms with
the same amplitude but 1800 out of phase.
• The in-phase sinusoidal control signal is compared with the carrier
to decide the status of the high-side switch of the front arm.
• The 1800 out of phase sinusoidal control signal is compared with the
carrier to decide the status of the high-side switch of the rear arm.
33
EE/NTU
Intro. to Power Electronics 2025 Y.-M. Chen
vtri vcontrol -vcontrol

TA+ on vcontrol > vtri TB+ on ( -vcontrol > vtri ) L


iac
(a)
DA+ DB+
TB+
TA+
vAN Vdc A
vA vB vAB
Vdc Cd B Loadv
ac

0 t 110 V,AC
DA- DB-
(b) TA- TB- 60 Hz

vBN
Vdc

0 t
(c)

Vdc vAB =vAN - vBN


Uni-polar operation modes
e(t)
0 t

-Vdc
34
EE/NTU (d)
Intro. to Power Electronics 2025 Y.-M. Chen

Inverter Operation Modes


L L
iac iac

DA+ DB+ DA+ DB+


TB+ TB+
TA+ TA+
A A
vA vB vAB=0 vA vB vAB=0
Vdc Cd B Loadv
ac Vdc Cd B Loadv
ac

DA- DB- 110 V,AC DA- DB- 110 V,AC


60 Hz TA- TB- 60 Hz
TA- TB-

(a) (c)

iac
L Uni-polar operation modes
DA+
TB+
DB+ during positive half-cycle
TA+

Vdc Cd
A
vA vB vAB=Vdc TA+ will be ON with a longer period.
B
Loadv ac

DA- DB- 110 V,AC When TA+ is ON, TB+ is first ON then OFF.
(a) → (b)
TA- TB- 60 Hz

When TA+ is OFF (TA- is ON), TB+ is


(b) always OFF. (b) → (c)
TA+and TB+ are turned ON simultaneously.
The operation mode goes back to (a). 35
EE/NTU
Intro. to Power Electronics 2025 Y.-M. Chen

Inverter Operation Modes


L L
iac iac

DA+ DB+ DA+ DB+


TB+ TB+
TA+ TA+
A A
vA vB vAB=0 vA vB vAB=0
Vdc Cd B Loadvac Vdc Cd B Loadv
ac

DA- DB- 110 V,AC DA- DB- 110 V,AC


TA- TB- 60 Hz 60 Hz
TA- TB-

(a) (c)

iac
L Uni-polar operation modes
DA+ DB+
during negative half-cycle
TB+
TA+
A
vA vB vAB=-Vdc
TB+ will be ON with a longer period.
Vdc Cd B Loadvac
When TB+ is ON, TA+ is first ON then OFF.
110 V,AC
TA-
DA-
TB-
DB-
60 Hz (a) → (b)
When TB+ is OFF (TB- is ON), TA+ is
(b) always OFF. (b) → (c)
TB+and TA+ are turned ON simultaneously.
The operation mode goes back to (a). 36
EE/NTU

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