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MODULE - 2

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NUMBER SYSTEMS

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6
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Practice Problems
1. 294 - 100100110
2. 160 - 10100000
3. 17 - 10001
4. 195.25 - 11000011.01
5. 244.5 - 11110100.1
6. 76.75 - 1001100.11
7. 891 - 1101111011
8. 57 - 111001
9. 59 - 111011
10. 82 - 1010010
11. 175 - 10101111
12. 48 - 110000
13. 253 - 11111101
14. 52.5 - 110100.1
15. 25.75 - 11001.11
16. 333.33 - 101001101.0101

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Practice Problems
1. 294 - 100100110
2. 160 - 10100000
3. 17 - 10001
4. 195.25 - 11000011.01
5. 244.5 - 11110100.1
6. 76.75 - 1001100.11
7. 891 - 1101111011
8. 57 - 111001
9. 59 - 111011
10. 82 - 1010010
11. 175 - 10101111
12. 48 - 110000
13. 253 - 11111101
14. 52.5 - 110100.1
15. 25.75 - 11001.11
16. 333.33 - 101001101.0101

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Binary to Decimal Conversion

(Fractional )
Let's take an example for n = 110.101

Step 1: Conversion of 110 to decimal

=> 1102 = (1*22) + (1*21) + (0*20)
=> 1102 = 4 + 2 + 0
=> 1102 = 6
So equivalent decimal of binary integral is 6.

Step 2: Conversion of .101 to decimal

=> 0.1012 = (1*2-1) + (0*2-2) + (1*2-3)
=> 0.1012 = 1*0.5 + 0*0.25 + 1*0.125
=> 0.1012 = 0.625
So equivalent decimal of binary fractional is 0.625

Step 3: Add result of step 1 and 2.

=> 6 + 0.625 = 6.625

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Practice Problems
1. 0110101 - 53
2. 10100011 - 163
3. 11101111 - 239
4. 1011010.11 - 90.75
5. 111001010.10 - 458.5
6. 11101 - 29
7. 1010101 - 85
8. 100111 - 39

Practice Problems
1. 0110101 - 53
2. 10100011 - 163
3. 11101111 - 239
4. 1011010.11 - 90.75
5. 111001010.10 - 458.5
6. 11101 - 29
7. 1010101 - 85
8. 100111 - 39

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Practice problems
1. 98 - 142
2. 210 - 322
3. 136 - 210
4. 1792 - 3400
5. 127.3 - 177.231
6. 52.8 - 64.631
7. 100.5 - 144.4
8. 212 - 324

Practice problems
1. 98 - 142
2. 210 - 322
3. 136 - 210
4. 1792 - 3400
5. 127.3 - 177.231
6. 52.8 - 64.631
7. 100.5 - 144.4
8. 212 - 324

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Practice Problems
1. 215 - 141
2. 125 - 85
3. 275 - 189
4. 23 - 19
5. 770 - 504
6. 163.5 - 115.625
7. 23.6 - 19.75
8. 152.7 - 106.875

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Practice Problems
1. 215 - 141
2. 125 - 85
3. 275 - 189
4. 23 - 19
5. 770 - 504
6. 163.5 - 115.625
7. 23.6 - 19.75
8. 152.7 - 106.875

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Practice Problems
1. 256 - 100
2. 4568 - 11D
3. 958.93 - 3BE.EE14
4. 578 - 242
5. 347 - 15B
6. 528 - 210
7. 121.56 - 79.8F5
8. 623.12 - 26F.1EB

Practice Problems
1. 256 - 100
2. 4568 - 11D8
3. 958.93 - 3BE.EE14
4. 578 - 242
5. 347 - 15B
6. 528 - 210
7. 121.56 - 79.8F5
8. 623.12 - 26F.1EB

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Practice Problems
1. 2AF.4C - 687.296
2. 38E - 910
3. 5B - 91
4. 3F.12 - 63.070
5. 83.B - 130.687
6. 12D.3 - 301.187
7. 11C - 284
8. 78 - 120

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Practice Problems
1. 2AF.4C - 687.296
2. 38E - 910
3. 5B - 91
4. 3F.12 - 63.070
5. 83.B - 130.687
6. 12D.3 - 301.187
7. 11C - 284
8. 78 - 120

SIGNED INTEGER
REPRESENTATION

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24
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25
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11111010 11111011

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Practice Problems
Number Binary Sign 1’s 2’s
representation Magnitude Complement Complement
+23

-23

+45

-45

+39

-39

Practice Problems
Number Binary Sign 1’s 2’s
representation Magnitude Complement Complement

+23 00010111

-23 00010111

+45 00101101

-45 00101101

+39 00100111

-39 00100111

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Practice Problems
Number Binary Sign 1’s 2’s
representation Magnitude Complement Complement
+23 00010111 00010111

-23 00010111 10010111

+45 00101101 00101101

-45 00101101 10101101

+39 00100111 00100111

-39 00100111 10100111

Practice Problems
Number Binary Sign 1’s 2’s
representation Magnitude Complement Complement
+23 00010111 00010111

-23 00010111 11101000

+45 00101101 00101101

-45 00101101 11010010

+39 00100111 00100111

-39 00100111 11011000

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Practice Problems
Number Binary Sign 1’s 2’s
representation Magnitude Complement Complement
+23 00010111 00010111

-23 00010111 11101001

+45 00101101 00101101

-45 00101101 11010011

+39 00100111 00100111

-39 00100111 11011001

Practice Problems
Number Binary Sign 1’s 2’s
representation Magnitude Complement Complement
+23 00010111 00010111 00010111 00010111

-23 00010111 10010111 11101000 11101001

+45 00101101 00101101 00101101 00101101

-45 00101101 10101101 11010010 11010011

+39 00100111 00100111 00100111 00100111

-39 00100111 10100111 11011000 11011001

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BINARY ARITHMETIC

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Subtraction Rules

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Binary Division

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Data Representation in Computer

◦ In modern computers, all information is represented using binary
values.
◦ Each storage location (cell): has two states
◦ low-voltage signal => 0
◦ High-voltage signal => 1
◦ i.e., it can store a binary digit, i.e., bit
◦ Eight bits grouped together to form a byte
◦ Several bytes grouped together to form a word
◦ Word length of a computer, e.g., 32 bits computer, 64 bits
computer
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Units of measurement used to quantify computer data.

Bit
◦ A bit is the smallest and basic unit of information in computing and
digital communications.
◦ It can have only one of two values.
◦ The most common representation of these values are 0 and 1.
◦ The term bit is a contraction of binary digit (0 or 1).

Byte
◦ Bits are often grouped together in 8-bit clusters called bytes.

◦ Since a byte contains eight bits that each have two possible values, a single
byte may have 28 or 256 different values.

◦ The byte was the number of bits used to encode a single character of text in a
computer and for this reason it is the smallest addressable unit of memory in
many computer architectures.

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Kilo Byte
◦ A unit of computer memory or data storage capacity equal to 1,024 (210)
bytes.
◦ 1 KB = 1024 bytes = 210 B is the definition used by Microsoft Windows
and Linux for computer memory, e.g., RAM
◦ Kilo bytes are used to measure small file such as text files.

Mega Byte
◦ The megabyte is a multiple of the unit byte for digital information storage or
transmission with three different values depending on context 1048576 bytes
(220).
◦ Generally for computer memory; one million bytes generally for computer
storage or transmission rates.
◦ The term "megabyte" is commonly used to mean either 10002 bytes or 1024
kilobytes.
◦ Mega bytes are used to measure the size of the larger files like images, audio
files an software applications.

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Giga Byte
◦ The unit symbol for the gigabyte is GB.
◦ A unit of computer memory or data storage capacity equal to 1,024 megabytes
(230bytes) or One billion bytes.
◦ Giga bytes are commonly used to measure the storage capacity of devices like
smartphones , SSDs, and hard drives.

Tera Byte
◦ A terabyte (TB) is a measure of computer storage capacity that is 2 to the 40th
power or approximately a trillion bytes (that is, a thousand gigabytes).
◦ The prefix tera is derived from the Greek word for monster.
◦ The unit symbol for the terabyte is TB.
◦ 1 TB = 1000000000000bytes = 240 bytes = 1024 gigabytes.
◦ Tera bytes are commonly used to measure the storage capacity of devices SSDs,
and hard drives etc.

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Data Storage units

Different types of data

◦ Numbers
◦ Whole number, fractional number, …
◦ Text
◦ ASCII code, Unicode
◦ Audio
◦ Image and graphics
◦ Video

How can they all be represented as binary strings? 86

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Representing Text

◦ Take English text for example

◦ Text is a series of characters
◦ letters, punctuation marks, digits 0, 1, …9, spaces, return (change a line), space, tab,
…
◦ How many bits do we need to represent a character?
◦ 1 bit can be used to represent 21 different things
◦ 2 bit … 22 different things
◦ n bit 2n different things

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Binary Representation of Numeric and Textual

Information

◦ Characters are mapped onto binary numbers

◦ ASCII code set
◦ 8 bits per character; 256 character codes
◦ UNICODE code set
◦ 16 bits per character; 65,536 character codes
◦ Text strings are sequences of characters in some encoding

Invitation to Computer Science, C++

Version, Fourth Edition 88

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ASCII code
◦ ASCII Code (American Standard Code for Information Interchange)
◦ ASCII is a character encoding standard used to represent text in computers,
communication systems, and other electronic devices.
◦ It assigns a unique numerical value to each character, making it possible for
computers to store and process textual data in a standardized way.
◦ Developed in 1963 by the American National Standards Institute (ANSI).
◦ Originally based on telegraph codes.
◦ The first version was 7-bit ASCII (0–127 characters).
◦ Later extended to 8-bit ASCII (Extended ASCII), which includes 256 characters
(0–255) to support more symbols and international characters.

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ASCII code
◦ Standard ASCII (7-bit: 0–127)
◦ Control Characters (0–31, 127): Used for text formatting and communication
control (e.g., newline, carriage return, backspace).
◦ Printable Characters (32–126): Includes letters, digits, punctuation marks, and
special symbols.
◦ Extended ASCII (8-bit: 128–255)
◦ Includes accented letters (é, ü, ñ), mathematical symbols, and box-drawing
characters for graphical interfaces.

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Example

◦ 72 → 'H'
◦ 101 → 'e'
◦ 108 → 'l'
◦ 108 → 'l'
◦ 111 → 'o'
Thus, "Hello" is stored as 72 101 108 108 111 in ASCII.

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ASCII code

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Unicode: A Universal Character

Encoding Standard
◦ Unicode is a universal character encoding system designed to
represent text from all the world’s languages.
◦ Unlike ASCII, which is limited to 128 or 256 characters, Unicode can
represent over 1,49,000 characters from different writing systems,
including Latin, Greek, Cyrillic, Arabic, Chinese, Japanese, and many
others.
◦ Before Unicode, different systems used various character encodings
leading to incompatibility issues when exchanging text between
different platforms.
◦ Unicode was created to provide a single, consistent encoding
standard for all languages.

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Unicode Encoding Formats

Unicode characters can be stored using different encoding schemes:

1.UTF-8 (8-bit Variable Length Encoding)

•Most widely used format
•Uses 1 to 4 bytes per character.
•Backward compatible with ASCII (ASCII characters use only 1 byte).
•Example:
•'A' → 01000001 (1 byte)
•'€' → 11100010 10000010 10101100 (3 bytes)

Unicode Encoding Formats

UTF-16 (16-bit Variable Length Encoding)
•Uses 2 or 4 bytes per character.
•Used in Windows, Java, and Microsoft Office.
•Example:
•'A' → 00000000 01000001 (2 bytes)
•'𐍈' → 11011000 00000000 11011100 01001000 (4 bytes)

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Unicode Encoding Formats

◦ UTF-32 (32-bit Fixed Length Encoding)

• Uses 4 bytes per character, making it simple but inefficient for storage.

• Mostly used for internal processing in some systems.

Unicode Code Points

◦ Each character in Unicode is assigned a unique code point, written as U+xxxx.

◦ Examples:

•'A' → U+0041

•' ' → U+1F60A

•'₹' (Indian Rupee Symbol) → U+20B9

•'日' (Japanese Kanji for "day") → U+65E5

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CPU ARCHITECTURE

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BASIC CPU ARCHITECTURE

◦ Basic CPU architecture refers to the fundamental components
and structure of a central processing unit (CPU), which is
responsible for executing instructions and performing basic
operations in a computer system.
◦ CPU architecture is sometimes called instruction set architecture
(ISA).
◦ The architecture of a CPU can vary depending on the type and
design, but the basic architecture typically includes the following
components:

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1. Control Unit (CU)

◦ The Control Unit manages and coordinates the operations of the
CPU by interpreting instructions from the memory and controlling the
flow of data between the different components.
◦ Functions
◦ Fetch instructions from memory.
◦ Decode instructions to understand what actions are needed.
◦ Operations of Input unit, Memory, ALU and Output unit are
coordinated by Control unit.
◦ Manage the flow of data between registers and memory.
◦ Control unit generates timing signals which determines “when” a
particular operation takes place.

2. Arithmetic and Logic Unit (ALU)

◦ The ALU performs arithmetic (addition, subtraction, etc.) and
logical (AND, OR, NOT, etc.) operations on data.
◦ Functions
◦ Perform basic arithmetic operations (e.g., addition,
subtraction).
◦ Perform logical operations (e.g., comparisons, bitwise
operations).
◦ Handle shift and rotate operations.

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2. Arithmetic and Logic Unit (ALU)

 In order to execute an instruction, operands need to be brought
into the ALU from the memory.
Operands are stored in general purpose registers available in
the ALU.
Access times of general purpose registers are faster than the
cache.
 Results of the operations are stored back in the memory or
retained in the processor for immediate use.

3. Registers
• A register is a single, permanent storage location within the CPU
used for a particular, defined purpose.
• A register is used to hold a binary value temporarily for storage, for
manipulation, and/or for simple calculations.
• Most instructions are executed by the sequenced movement of
data between the different registers in the ALU and the control unit.
◦ Most registers support four primary types of operations:
1. Registers can be loaded with values from other locations, in
particular from other registers or from memory locations.

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3. Registers continued…
2. Data from another location can be added to or subtracted
from the value previously stored in a register, leaving the sum or
difference in the register.
3. Data in a register can be shifted or rotated right or left by one
or more bits. This operation is important in the implementation
of multiplication and division.
4. The value of data in a register can be tested for certain
conditions, such as zero, positive, negative, or too large to fit in
the register.

Some Important Registers

• The Program Counter (PC) holds the address of the current
instruction being executed.
• The Instruction Register (IR) holds the actual instruction being
executed currently by the computer.
• The Memory Address Register (MAR) holds the address of a
memory location.
• The Memory Data Register (MDR), sometimes known as the
memory buffer register, will hold a data value that is being stored
to or retrieved from the memory location currently addressed by
the memory address register.

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Some Important Registers

◦ The General Purpose Registers are numbered as R0, R1, R2….Rn-1,
and used to store temporary data during any ongoing operation.
Its content can be accessed by assembly programming.

◦ The Flag Register also known as a status register is a special type

of register in a computer’s central processing unit (CPU) used to
indicate the status of the CPU or the outcome of various
operations such as Zero Flag, Carry flag, etc

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4. Bus System
◦ The bus system is used for communication between the CPU and
other parts of the computer, such as memory and input/output
devices.
◦ The different types of buses are:
◦ Data Bus: Carries the actual data between the CPU, memory,
and I/O devices.
◦ Address Bus: Carries memory addresses to specify locations in
memory.
◦ Control Bus: Carries control signals to coordinate the operations
of the CPU, memory, and peripherals.

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5. Clock
◦ The clock generates periodic pulses that synchronize the CPU's
operations, ensuring that instructions are executed at a specific
rate (clock cycle).
◦ It controls the timing of all operations within the CPU.

ASSEMBLY
LANGUAGE

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Assembly language
◦ Assembly language is a low-level programming language that is
closely related to the architecture of a computer's CPU.
◦ It is a human-readable representation of machine code
instructions, which are directly executed by the CPU.
◦ It uses mnemonics to represent the operations that a processor
has to do.
◦ It is an intermediate language between high-level languages like
Python and the machine language.

Features of Assembly Language

 Uses mnemonics like MOV, ADD, SUB instead of binary codes.

 Requires an Assembler to convert assembly code into machine

code.
 Allows direct memory and register manipulation.
 Faster than high-level languages but harder to code.

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Assembly language
◦ An assembler is used to convert assembly code into machine
language.
◦ That machine code is stored in an executable file for the sake of
execution.
◦ Assembly language is made up of a set of symbolic instructions
that are mapped to the underlying machine code of a
processor.

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Components of an Instruction
◦ Instructions(opcode): Each instruction in assembly language
corresponds to an operation that the CPU can perform (e.g.,
moving data, performing arithmetic, jumping to different parts of
code).

◦ Operands: Operands specify the data that the operation will

work on (e.g., values in registers, constants, memory addresses).

◦ Addressing Mode: Defines how the operands are accessed

(registers, memory, immediate values).

Assembly language
Advantages of Assembly Language:
 Efficient and fast execution.
 Direct Hardware Control
 Suitable for System Programming (OS, drivers)
Disadvantages of Assembly Language:
 Difficult to learn compared to high-level languages.
 Machine-dependent (not portable).

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Information in a computer - Instructions

 Instructions specify commands to:
Transfer information within a computer (e.g., from memory to ALU)
Transfer of information between the computer and I/O devices
(e.g., from keyboard to computer, or computer to printer)
Perform arithmetic and logic operations (e.g., Add two numbers,
Perform a logical AND).
 A sequence of instructions to perform a task is called a program,
which is stored in the memory.
 Processor fetches instructions that make up a program from the
memory and performs the operations stated in those instructions.

Information in a computer -- Data

 Data are the “operands” upon which instructions operate.
 Data could be:
Numbers,
Encoded characters.
 Data, in a broad sense means any digital information.
 Computers use data that is encoded as a string of binary digits
called bits.

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TYPES OF
INSTRUCTIONS
Based On Operation Type

Data Transfer Instructions

◦ Data transfer instructions are a category of CPU instructions used
to move data between registers, memory, and input/output
devices.

◦ These instructions are fundamental in a program's execution as

they allow the processor to store values in different locations.

◦ Example: MOV, PUSH, POP etc.

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LOAD Instruction
• The LOAD instruction moves data from memory to a register.
• It is typically used when the CPU needs to use a value stored in
memory.
• Example (Assembly - General Representation)
LOAD R1, 1000
◦ Load the value from memory address 1000 into register R1
◦ Example (x86 Assembly)
MOV AX, [1000H]
◦ Load data from memory address 1000H into register AX

STORE Instruction
•The STORE instruction moves data from a register to memory.
•It is used when the CPU needs to save a computed result back into
memory.
◦ Example (Assembly - General Representation)
STORE R1, 2000
◦ Store the value in register R1 into memory address 2000
◦ Example (x86 Assembly)
MOV [2000H], AX
◦ Store the value in AX into memory address 2000H

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Arithmetic Instructions
•Arithmetic instructions are a category of CPU instructions used to
perform basic arithmetic operations, such as addition, subtraction,
multiplication, and division, on data stored in registers or memory.
•These operations are fundamental to most computations performed
by a computer.
•Examples:
•ADD, SUB, MUL, DIV etc.

ADD Instruction
◦ The ADD instruction performs addition between two operands and stores the
result in a destination register.
◦ Example (Assembly - General Representation)
ADD destination, source
◦ Adds the source value to the destination register.
◦ Example (x86 Assembly)
MOV AX, 5 ; Load 5 into AX
MOV BX, 3 ; Load 5 into BX
ADD AX, BX ; AX = AX + BX (AX now holds 8)
◦ Here, the value in register BX is added to the value in register AX and the result
is stored in AX.

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SUB Instruction
◦ The SUB instruction performs subtraction between two operands and
stores the result in the destination register.
◦ Example (Assembly - General Representation)
SUB destination, source
◦ Subtracts the source value from the destination register.
◦ Example (x86 Assembly)
MOV AX, 5 ; Load 5 into AX
MOV BX, 3 ; Load 5 into BX
SUB AX, BX ; AX = AX - BX (AX now holds 2)
◦ Here, the value in register BX is subtracted from the value in register AX and
the result is stored in AX.

Logical Instructions
◦ Logical instructions in assembly language perform bitwise
operations on data.

◦ These operations include AND, OR, XOR, NOT, and

shifting/rotation operations.

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AND Instruction
◦ The AND instruction performs a bitwise AND operation between
two operands.
◦ It compares corresponding bits of both operands and sets the
result bit to 1 only if both input bits are 1. Otherwise, it sets the
result bit to 0.

AND Instruction
◦ Syntax (General Representation)
AND Destination, Source
◦ Destination = Destination AND Source
◦ Example (x86 Assembly)
MOV AL, 0AH ; AL = 00001010 (Binary)
MOV BL, 06H ; BL = 00000110 (Binary)
AND AL, BL ; AL = AL AND BL
; Result = 00000010 (Binary) = 02H

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OR Instruction
◦ The OR instruction performs a bitwise OR operation between two
operands.
◦ It compares corresponding bits of both operands and sets the
result bit to 1 if at least one of the input bits is 1.

OR Instruction
◦ Syntax (General Representation)
OR Destination, Source
◦ Destination = Destination OR Source
◦ Example (x86 Assembly)
MOV AL, 0AH ; AL = 00001010 (Binary)
MOV BL, 06H ; BL = 00000110 (Binary)
OR AL, BL ; AL = AL OR BL
; Result = 00001110 (Binary) = 0EH

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Single-operand Instructions
◦ Single-operand arithmetic instructions perform operations on a
single register or memory location (unlike two-operand
instructions that involve both a source and a destination).

◦ These instructions typically modify the operand directly.

◦ Example : INC, DEC, NEG etc.

INCREMENT (INC) Instruction

◦ The INC instruction increases the value of an operand by 1.
◦ Syntax (General Representation)
INC Destination
◦ Destination = Destination + 1
◦ Example (x86 Assembly)
MOV AL, 05H ; AL = 5
INC AL ; AL = AL + 1 → AL = 6

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DECREMENT (DEC) Instruction

◦ The DEC instruction deceases the value of an operand by 1.
◦ Syntax (General Representation)
DEC Destination
◦ Destination = Destination - 1
◦ Example (x86 Assembly)
MOV AL, 05H ; AL = 5
DEC AL ; AL = AL -1 → AL = 4

Shift and Rotate Instructions

◦ Shift and rotate instructions are used to shift or rotate the bits of a
register or memory operand.

◦ These operations are frequently used for arithmetic or logic

operations such as multiplication, division, and bit manipulation.

◦ Example: SHL,SHR,ROL,ROR etc.

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Shift Left Instructions

◦ The SHL (Shift Left) instruction shifts the bits of the operand to the left by
a specified number of positions.
◦ The vacant bit positions on the right are filled with zeros.
◦ This operation is equivalent to multiplying the operand by 2 for each
shift.
◦ Syntax (General Representation)
SHL operand, count
◦ Example
MOV AL, 00001100B ; AL = 12 (Decimal)
SHL AL, 1 ; AL = 00011000B (24 in Decimal)

Shift Right Instructions

◦ The SHR (Shift Right) instruction shifts the bits of the operand to the right
by a specified number of positions.
◦ The vacant bit positions on the left are filled with zeros.
◦ This operation is equivalent to performing an integer division by 2 for
each shift.
◦ Syntax (General Representation)
SHR operand, count
◦ Example
MOV AL, 00001100B ; AL = 12 (Decimal)
SHR AL, 1 ; AL = 00000110B (6 in Decimal)

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Rotate Left Instruction

◦ The ROL (Rotate Left) instruction rotates the bits of the operand to
the left by a specified number of positions.
◦ The leftmost bit is moved to the rightmost position.
◦ Syntax (General Representation)
ROL operand, count
◦ Example
MOV AL, 10001100B ; AL = 140 (Decimal)
ROL AL, 1 ; AL = 00011001B (25 in Decimal)

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Rotate Right Instruction

◦ The ROR (Rotate Right) instruction rotates the bits of the operand
to the right by a specified number of positions.
◦ The rightmost bit is moved to the leftmost position.
◦ Syntax (General Representation)
ROR operand, count
◦ Example
MOV AL, 10001100B ; AL = 140 (Decimal)
ROR AL, 1 ; AL = 01000110B (70 in Decimal)

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TYPES OF
INSTRUCTIONS
Based On Number of Operands

CPU Instructions
◦ CPU instructions can also be classified based on how many operands
(sources or destinations) they use.
• Unary Instructions: These instructions involve only one operand.
• Example: NOT R1 (negates the value in register R1)
• Binary Instructions: These instructions work with two operands.
• Example: ADD R1, R2 (adds the contents of R1 and R2)
• Ternary Instructions: These instructions involve three operands.
• Example: MUL R1, R2, R3 (multiply R1 and R2, store the result in R3)

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INSTRUCTION CYCLE

The Instruction Cycle

The CPU uses a cycle known as the Instruction cycle to process
all of these instructions and operations.

The instruction cycle is the time it takes a CPU to execute and

retrieve a complete instruction.

While this cycle can vary from CPU to CPU, they typically consist
of the following stages:

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1. Fetch
Programs reside in the memory, entered through input devices
PC (Program counter) has address of the first instruction or next
instruction to be executed.
The contents of PC are transferred to MAR (Memory Address Register)
and send over system bus to memory.
A Read signal is sent to the memory by control unit.
The instruction (addressed word) is fetched and loaded into MDR
(Memory Data Register) after duration of memory access time.
The contents of MDR transferred to IR (Instruction Register).
Now the instruction is ready to be decoded and executed.

2. Decode
 The instruction stored in the Instruction Register (IR) is interpreted to
determine the operation to be performed.
Steps of the Decode Cycle:
1. The Control Unit (CU) reads the instruction from the IR.
2. The instruction is broken down into Opcode (operation) and
Operands (data/memory addresses).
3. The CPU prepares necessary resources (registers, ALU, memory, etc.).
4. The CU generates the necessary control signals for execution.

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3. Execute
The CPU performs the operation (e.g., arithmetic, logic
operations, memory access).
Get operands for ALU from:
General-purpose register (R0, … Rn-1)
 Memory (address to MAR, Read from memory, data to
MDR, and then to ALU)
The Arithmetic Logic Unit (ALU) executes the instruction if it
involves calculations.
Updates flag bits in the flag register.

Flag Register

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4. Store (Write-back)
Store the result back to:
 General-purpose register (R0, … Rn-1)
 Memory (address to MAR, result to MDR, Write to memory)

The Program Counter (PC) is updated to point to the next

instruction.

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KEY COMPONENTS

Key Components Involved In

Instruction Cycle
•Program Counter (PC):
•Keeps track of the address of the next instruction.

•Memory Address Register (MAR):

•Holds the address of the instruction or data to be accessed.

• Memory Buffer Register (MBR):

•Holds the instruction or data that has been fetched from or
will be written to memory.

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Key Components Involved In

Instruction Cycle
•Instruction Register (IR):
•Holds the currently decoded instruction.

•Control Unit (CU):

•Decodes the instruction and generates the necessary control
signals.

•Arithmetic Logic Unit (ALU):

•Performs mathematical and logical operations.

INSTRUCTION CYCLE OF
ADD INSTRUCTION

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Instruction Cycle Explanation Using

the ADD Instruction
◦ The Instruction Cycle consists of Fetch, Decode, Execute, and
Store phases.

◦ Let's go through these steps using the ADD instruction as an

example.

ADD AL, BL ; AL = AL + BL

Step 1: Fetch Cycle

◦ Operations:

1.MAR ← PC (Memory Address Register gets the address from PC)

2.PC ← PC + 1 (Increment PC for the next instruction)

3.MDR ← Memory [MAR] (Memory Data Register gets instruction

from memory)

4.IR ← MDR (Instruction Register stores the fetched instruction)

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Step 2: Decode Cycle

•Operations:
1. Decode ADD as an arithmetic operation.
2. Identify AL as the destination register.
3. Identify BL as the source register.

Step 3: Execute Cycle

◦ Operations:
1. ALU ← AL + BL (Perform addition)
2. Flags Updated:
•Zero Flag (ZF): Set if the result is 0.
•Carry Flag (CF): Set if there is a carry out.

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Step 4: Store Cycle

◦ Operations:

1. AL ← ALU Result (Store result in AL)

INSTRUCTION WORD
FORMAT

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Instruction Word Format

◦ The instruction word can be divided into an op code and zero or
more address fields.
◦ The 32 bits are divided into an 8-bit op code and 24 bits of
address field.
◦ This format assumes a single address field with a 32-bit fixed
length instruction.
◦ A simple 32-bit instruction format with one address field might
look like that below.

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ADDRESSING
MODES

Addressing Modes
• The various ways of addressing registers and memory are
known as addressing modes.

• Addressing modes define how an operand (data) is accessed

during instruction execution.

• The 8085/8086 microprocessor supports several addressing

modes for efficient data handling.

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Addressing Modes
Immediate Addressing Mode
• MOV AX, 1234H
Register Addressing Mode
• The operand is stored in a register.
• MOV AX, BX
Direct Addressing Mode
• The memory address is directly specified in the instruction.
• MOV AX, [2000H] ; Load value from memory address 2000H into AX
• MOV [3000H], AL Store AL into memory address 3000H

COMMON
CPU ARCHITECTURES

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Common CPU architectures

◦ A CPU architecture is defined by the basic characteristics and
major features of the CPU
◦ These characteristics include such things as the number and
types of registers, methods of addressing memory, and basic
design and layout of the instruction set.
◦ CPU architecture is sometimes called Instruction Set Architecture
(ISA)
◦ These are loosely categorized into one of two types
◦ CISC
◦ RISC

Complex Instruction Set Computer

(CISC) Architecture
CISC (Complex Instruction Set Computing) is a type of microprocessor
architecture that aims to reduce the number of instructions per
program, at the cost of using more complex instructions.

In CISC, a single instruction can execute multiple low- level operations
(such as loading from memory, performing an arithmetic operation,
and storing the result back to memory) in a single instruction cycle.

Example: VAX (Virtual Address eXtension), x86

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Reduced Instruction Set Computing

(RISC) Architecture
◦ The primary goal of RISC is to simplify the design and operation of
processors by limiting the number of instructions and making
each instruction execute in a single clock cycle (or a minimal
number of cycles).

◦ RISC architectures are designed to increase performance

through simplicity, efficiency, and parallelism.

◦ Example: ARM, MIPS, SPARC, PowerPC

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