Computer Organization

Unit 4
Computer Arithmetic

Dr. Sampa Sahoo

Assistant Professor
Department of Computer Science and Engineering
CV Raman Global University, Bhubaneswar
Integer Representation
➢Computers use a fixed number of bits to represent an integer. The
commonly-used bit-lengths for integers are 8-bit, 16-bit, 32-bit or 64-bit.
➢Two representation schemes for integers:
✓Unsigned Integers: can represent zero and positive integers.

✓Signed Integers: can represent zero, positive and negative integers.

Three representation schemes had been proposed for signed integers:
▪ Sign-Magnitude representation
▪ 1's Complement representation
▪ 2's Complement representation
n-bit Unsigned Integers
➢The value of an unsigned integer is interpreted as "the magnitude of its
underlying binary pattern".
➢An n-bit unsigned integer can represent integers from 0 to (2^n)-1
Signed Integers
➢The most-significant bit (MSB) is called the sign bit.
➢The sign bit is used to represent the sign of the integer - with 0 for
positive integers and 1 for negative integers.
➢The magnitude of the integer, however, is interpreted differently in
different schemes.
➢Three representation schemes are available for signed integers:
✓ Sign-Magnitude representation
✓ 1's Complement representation
✓ 2's Complement representation
n-bit Sign Integers in Sign-Magnitude Representation
➢In sign-magnitude representation:
✓The most-significant bit (MSB) is the sign bit, with value of 0
representing positive integer and 1 representing negative integer.
✓The remaining n-1 bits represents the magnitude (absolute value) of
the integer. The absolute value of the integer is interpreted as "the
magnitude of the (n-1)-bit binary pattern".
Example
➢Example 1: Suppose that n=8 and the binary representation is 0 100
0001B.
✓ Sign bit is 0 ⇒ positive
✓ Absolute value is 100 0001B = 65D
✓ Hence, the integer is +65D

➢Example 2: Suppose that n=8 and the binary representation is 1 000

0001B.
✓ Sign bit is 1 ⇒ negative
✓ Absolute value is 000 0001B = 1D
✓ Hence, the integer is -1D
Drawbacks of sign-magnitude representation

➢There are two representations (0000 0000B and 1000 0000B) for the
number zero, which could lead to inefficiency and confusion.

➢Positive and negative integers need to be processed separately.

n-bit Sign Integers in 1's Complement Representation
➢The most significant bit (MSB) is the sign bit, with value of 0
representing positive integers and 1 representing negative integers.
➢The remaining n-1 bits represents the magnitude of the integer, as
follows:
✓for positive integers, the absolute value of the integer is equal to "the
magnitude of the (n-1)-bit binary pattern".
✓for negative integers, the absolute value of the integer is equal to
"the magnitude of the complement (inverse) of the (n-1)-bit binary
pattern" (hence called 1's complement).
Example
➢Suppose that n=8 and the binary representation 1 000 0001B.
✓ Sign bit is 1 ⇒ negative
✓ Absolute value is the complement of 000 0001B, i.e., 111 1110B =
126D
✓ Hence, the integer is -126D
Drawbacks of 1's Complement Representation

➢ There are two representations (0000 0000B and 1111 1111B) for zero.

➢ The positive integers and negative integers need to be processed

separately.
n-bit Sign Integers in 2's Complement Representation
➢The most significant bit (MSB) is the sign bit, with value of 0
representing positive integers and 1 representing negative integers.
➢The remaining n-1 bits represents the magnitude of the integer, as
follows:
✓for positive integers, the absolute value of the integer is equal to "the
magnitude of the (n-1)-bit binary pattern".
✓for negative integers, the absolute value of the integer is equal to
"the magnitude of the complement of the (n-1)-bit binary pattern
plus one" (hence called 2's complement).
➢Computers use 2's Complement Representation for Signed Integers.
➢An n-bit 2's complement signed integer can represent integers from
-2^(n-1) to +2^(n-1)-1
Example
➢Suppose that n=8 and the binary representation 1 000 0001B.
✓ Sign bit is 1 ⇒ negative
✓ Absolute value is the complement of 000 0001B plus 1, i.e., 111
1110B + 1B = 127D
✓ Hence, the integer is -127D
Summary
Contd….

1’s Complement Representation 2’s Complement Representation

Questions
➢For 8 bit signed integer -18 and -40 write down
a) Sign Magnitude Representation
b) 1’s Complement Representation
c) 2’s Complement Representation
Answers
➢For 8 bit signed integer -18 and -40 write down
a) Sign Magnitude Representation
b) 1’s Complement Representation
c) 2’s Complement Representation
Addition and Subtraction with signed 1’s complement data
➢Write the 1’s complement of the subtrahend
➢Then add the 1’s complement subtrahend with the minuend
➢If the result has a carryover, then add that carry over in the least significant
bit
➢If there is no carryover, then take the 1’s complement of the resultant, and it
is negative.
➢Example: (110101)2 – (100101)2
➢Solution: (1 1 0 1 0 1)2 = 5310
(1 0 0 1 0 1)2 = 3710 – subtrahend
(0 1 0 0 0 0)2 = 1610
Contd…
➢Example: (101011)2 – (111001)2
➢Solution: (1 0 1 0 1 1)2 = 4310
(1 1 1 0 0 1)2 = 5710 – subtrahend
- (0 0 1 1 1 0)2 = -1410
Addition and Subtraction with signed 2’s complement data
➢Take the 2's complement of the subtrahend.
➢Add it to the minuend.
➢Ignore any final carry.
➢If the result has a leading '1', it indicates a negative number. Find 2's
complement of the result to get the positive value. Add the negative sign.
➢Example: (110101)2 – (100101)2
➢Solution: (1 1 0 1 0 1)2 = 5310
(1 0 0 1 0 1)2 = 3710 – subtrahend
(0 1 0 0 0 0)2 = 1610
Contd…
➢Example: (101011)2 – (111001)2
➢Solution: (1 0 1 0 1 1)2 = 4310
(1 1 1 0 0 1)2 = 5710 – subtrahend
- (0 0 1 1 1 0)2 = -1410
Contd…
➢65D →0100 0001B (+)
5D →0000 0101B
0100 0110B → 70D
➢65D → 0100 0001B (+)
-5D → 1111 1011B
0011 1100B → 60D (discard carry)
➢-65D → 1011 1111B
-5D → 1111 1011B
1011 1010B → -70D (discard carry)
 Overflow and Underflow
➢Because of the fixed precision (i.e., fixed number of bits), an n-bit 2's
complement signed integer has a certain range. For example, for n=8, the
range of 2's complement signed integers is -128 to +127.
➢Overflow happens only when adding two numbers of the same sign and
the result has the opposite sign.
➢No overflow occurs when adding numbers of opposite signs.
➢Case-1: Addition of two positive numbers
+ 127D → 0111 1111B
+ (+2)D → 0000 0010B
+129D 1000 0001B → -127D (Invalid)
 Contd…
➢Case-2: Addition of one positive number and one negative number ( +ve
number > -ve number)
+ 127D → 0111 1111B
+ (-2)D → 1111 1110B
+125D 0111 1101B → +125D (Valid)
➢Case-3: Addition of one positive number and one negative number ( -ve
number > +ve number)
- 127D → 1000 0001B
+ (+2)D → 0000 0010B
-125D 1000 0011B → -125D (Valid)
 Contd…
➢Case-4: Addition of two negative numbers
- 127D → 1000 0001B
+ (-2)D → 1111 1110B
-129D 0111 1111B → +127D (Invalid)(Underflow)

➢ Underflow occurs when adding two negative numbers results in a

positive number due to the limited bit width.
➢ This happens because the most significant bit (MSB), which indicates
the sign, flips from 1 (negative) to 0 (positive).
➢ Example: Add (-70) + (-70)
➢ 10111010+10111010=101101010
➢ 011010102​=(+106)10 [after discarding MSB 1] (Underflow)
Hardware for 2’s Complement Addition and Subtraction

Algorithm
 Big Endian and Little Endian
➢Modern computers store one byte of data in each memory address or
location, i.e., byte addressable memory. An 32-bit integer is, therefore,
stored in 4 memory addresses.
➢The term "Endian" refers to the order of storing bytes in computer
memory.
➢In "Big Endian" scheme, the most significant byte is stored first in the
lowest memory address (or big in first).
➢In "Little Endian" stores the least significant bytes in the lowest
memory address.
➢For example, the 32-bit integer 12345678H is stored as
✓12H 34H 56H 78H in big endian
✓78H 56H 34H 12H in little endian
Hardware for Multiplication Algorithm

Left shift for Multiplication Right Shift for Multiplication

Example for Multiplication Algorithm

Left shift for Multiplication Right Shift for Multiplication

Contd…. ➢ Perform 22 X 15
 Booth’s Multiplication Algorithm
➢Booth's algorithm is a multiplication algorithm that multiplies two
signed binary numbers in 2's compliment notation.
➢If 2’s complement representation uses n bits then ‘n’ must be at least
one more bit than is required for the binary representation of the
numerically larger operand.
➢Example:- (-5) X 2 numerically larger operand is 5 (101), So use at
least 4 bits to represent operand
➢Booth’s multiplication rule
✓Subtract multiplicand from the partial product upon encountering the first
least significant 1 in a string of 1's in the multiplier.
✓Add multiplicand to the partial product upon encountering the first 0
(provided that there was a previous 1) in a string of 0's in the multiplier.
✓The partial product does not change when the multiplier bit is identical to
the previous multiplier bit.
 Contd…
➢Principle: strings of 0's in the multiplier require no addition but just
shifting, and a string of 1's in the multiplier from bit weight 2^k to weight
2^m can be treated as 2^(k+1) – 2^m.

➢Example:
✓Multiplier = 001110 (+14) has a string of 1's from 2^3 to 2^1 (k =3,m = 1).
The number can be represented as 2^(k+1) – 2^m = 2^4 – 2^1 = 16 - 2 = 14.

✓Multiplier = 110010 (-14) can be represented as

−25+24+0+0+21+0=−32+16+2=−14
Contd…
➢Hardware:
Flowchart for Booth algorithm

➢ Possible arithmetic actions based

on QnQn+1:
✓ 00 no arithmetic operation
✓ 01 add multiplicand to left half
of product
✓ 10 subtract multiplicand from
left half of product
✓ 11 no arithmetic operation
 Example1
➢ (-9) x (-13) = +117 13=1101 (4 bit) so use 5 bit representation
 Example2
➢ (-5) x (2) = -10
 Division Algorithm
➢ Division is a successive subtraction.
➢Example:
➢ Dividend (3 bit) > Divisor (3
bit)
Place ‘1’ in the Quotient
Else
Place ‘0’ in the quotient
➢ Divisor is shifted right

➢Two types
✓Restoring Algorithm
✓Non-restoring Algorithm
 Non-Restoring Division Algorithm
➢It combines the restore / no restore and shift left steps of two successive
cycles and reduces the number of operations.
➢Note:- B Divisor (n+1 bit), Q Dividend (n bit), A Remainder (n+1
bit)
➢Procedure:
✓Step 1: Do the following n times
i) If the sign of A (An) is 0, shift A and Q left one bit position and subtract B from
A; otherwise, shift A and Q left and add B to A.
ii) Now, if the sign of A is 0, set Q0 to 1; otherwise set Q0 to 0.

✓Step 2: If the sign of A is 1, add B to A (restore).

Example of Non-Restoring Division Algorithm
 Real Number
➢ Two major approaches to store real numbers (i.e., numbers with
fractional component)
I. Fixed Point Notation
II. Floating Pont Notation
➢Fixed-Point Representation
I. Fixed number of bits for integer part and for fractional part.
II. For example, if given fixed-point representation is IIII.FFFF, then you can store
minimum value is 0000.0001 and maximum value is 9999.9999.
III. Three parts of a fixed-point number representation: the sign field, integer field,
and fractional field.
 Fixed Point Representation
➢ Example: Assume number is using 32-bit format which reserve 1 bit for
the sign, 15 bits for the integer part and 16 bits for the fractional part.
➢ -43.625 is represented as following:

➢0 is used to represent +ve and 1 is used to represent -ve.

000000000101011 is 15 bit binary value for decimal 43 and
1010000000000000 is 16 bit binary value for fractional 0.625.
➢Advantages: performance
➢Disadvantages: Relatively limited range of values that they can
represent.
 Floating Point Representation
➢ A floating point number (f) has two parts:
✓first part represents a signed fixed point number called mantissa (m).
✓second part of designates the position of the decimal (or binary) point and is
called the exponent (e).
➢Two parts represent a number obtained from multiplying m times a
radix r raised to the value of e. f= (-1)s m x 2e (Binary) or f = (-1)s m x 10e
(Decimal)
➢Example 1: Decimal number 537.25
mantissa(m): 53725 exponent(e):3 floating point number=.53725 X 10^3
exponent(e):2 floating point number=5.3725 X 10^2
➢ Example 2: Binary number 1010.1011B
Mantissa(m):10101011 exponent(e):3
floating point number 1.0101011B×2^3 (Shift left 3 position from .(dot))
 Why Floating Point Representation ?
➢ A fixed point number representation have numbers in a particular
range.
➢Example: 16 bit fixed point representation can give numbers in the range
-215 to (215 – 1). Range is limited.
➢To represent number more than the range, floating representation is
used.
 Biased Exponent
➢ Let exponent (E) is represented by 4 bits, so range is -8 to +7.
➢ For only unsigned exponent the range should be 0 to 15. So conversion is
needed.
➢ Original Exponent (e) Stored Exponent (E )
-8 0
-7 1
-6 2
-5 3
. .
. .
7 15

➢E = e + 8(bias)
➢If exponent is represented by k bits, then bias is 2(k-1) . Exponent is
represented in Excess-bias form. In the above example it is Excess-8 form.
 Normalized Mantissa
➢Only one non‐zero/zero digit (1/0 in case of binary) left to the point. Example:-

➢Binary Number

➢Two types of normalization

✓Explicit normalization (Default)
✓Implicit normalization
 Explicit Normalization
➢ Only one zero digit left to the point. After the point the immediate first
bit should be a non-zero digit (1 in case of binary).

➢Value= (-1)S x 0.1M x 2E-bias

➢Example: (101.11)B converted to 0.10111 x 23. Mantissa is the number

after the point, M=10111, E=3+ bias
 Implicit Normalization
➢ Only one non-zero digit left to the point (1 in case of binary).

➢Value= (-1)S x 1.M x 2E-bias

➢Example: (101.11)B converted to 1.0111 x 22 (implicit). Mantissa is the

number after the point, M=0111, E=2+ bias

➢Note: The bias value is added to the true exponent to solve the problem
of representation of negative exponent.
 Example
➢Q. 16 bit register store floating point number. The mantissa is
normalized and exponent is represented in excess-32 form. What is 16
bit value for +(13.5)D in register?
➢Solution: +(13.5)D = (1101.1)B.
✓Explicit normalization (default) value = 0.11011 x 24 ,
✓M=11011 (Mantissa)
✓e=4, E=4+32 = 36D= 100100B (Exponent)
✓Excess-32 →bias=32→ 2k-1 =32 →k=6
✓ 16 bit representation: 1bit(Sign), 6 bit (Exponent), 9 bit (Mantissa)
✓ +(13.5)D= 0100100110110000
 Contd…
➢ Maximum value= (-1)0 x 0.111111111 x 263-32 as 26 -1 = 63
✓11111111 x 2-9 x 231 = + (29-1 )+ 222 = 231
➢Minimum value= -231
➢Smallest possible +ve value= 0 (S), 000000(Exponent), 100000000
(Mantissa)
➢Value= +0.1 x 20-32 = 2-33
➢Disadvantages of conventional representation
✓It can not store zero.
✓It can not represent infinity
✓It can not store or represent a number which is not normalized.
IEEE-754 32-bit Single-Precision Floating-Point Numbers
➢In 32-bit single-precision floating-point representation:
✓ The most significant bit is the sign bit (S), with 0 for positive numbers and 1 for
negative numbers.
✓The following 8 bits represent exponent (E).
✓The remaining 23 bits represents fraction (F).
IEEE-754 32-bit Single-Precision Floating-Point Numbers
(Normalized Form)
➢The sign-bit represents the sign of the number. Fractional part (1.F) are
normalized with an implicit leading 1.

➢The exponent is bias (or in excess) of 127, so as to represent both positive

and negative exponent. The range of exponent is -126 to +127.
Note:- Bias=127 is used, not to make E all zeros and all ones. The numbers
are preserved for special purpose. e=127, E = 127+bias → 127 + 127=254

➢For 1 ≤ E ≤ 254, N = (-1)^S × 1.F × 2^(E-127). These numbers are called

normalized form.
Table of Special Cases
S (1 bit) E (8 bit) M (23 bit) Number
0 00000000 0000…00 +0
1 00000000 0000…00 -0
0 11111111 0000…00 +INF
1 11111111 0000…00 -INF
0/1 11111111 M != 0 NaN (Not a Number)

0/1 00000000 M != 0 Denormalized 0 Fraction

0/1 E != 000…00 and E != M=xxxx…xx Implicit normalization (default)

111…11
Example
➢Q. IEEE-754 32-bit floating-point representation pattern is 1 01111110 100
0000 0000 0000 0000 0000.
✓Sign bit S = 1 ⇒ negative number
✓E = 0111 1110B = 126D (in normalized form)
✓Fraction is 1.1B (with an implicit leading 1) = 1 + 2^-1 = 1.5D
✓The number is -1.5 × 2^(126-127) = -0.75D
IEEE-754 32-bit Single-Precision Floating-Point Numbers
(De-normalized Form)
➢For E = 0, N = (-1)^S × 0.F × 2^(-126). These numbers are called De-
normalized form. The exponent of 2^-126 evaluates to a very small number.

➢De-normalized form is needed to represent zero (with F=0 and E=0). It can
also represents very small positive and negative number close to zero.
Example
➢Q. IEEE-754 32-bit floating-point representation pattern is 1 00000000 000
0000 0000 0000 0000 0001.
✓Sign bit S = 1 ⇒ negative number
✓E = 0 (in de-normalized form)
✓Fraction is 0.000 0000 0000 0000 0000 0001B (with an implicit leading 0) = 1×2^-23
✓The number is -2^-23 × 2^(-126) = -2×(-149) ≈ -1.4×10^-45

Note:- For E = 255, it represents special values, such as ±INF (positive and negative
infinity) and NaN (not a number).
IEEE-754 32-bit Single-Precision Floating-Point Numbers
(De-normalized Form)
➢For E = 0, N = (-1)^S × 0.F × 2^(-126). These numbers are called De-
normalized form. The exponent of 2^-126 evaluates to a very small number.

➢De-normalized form is needed to represent zero (with F=0 and E=0). It can
also represents very small positive and negative number close to zero.
IEEE-754 64-bit Double-Precision Floating-Point Numbers
➢The representation scheme for 64-bit double-precision is similar to the 32-
bit single-precision:
✓ The most significant bit is the sign bit (S), with 0 for positive numbers and 1 for
negative numbers.
✓ The following 11 bits represent exponent (E).
✓ The remaining 52 bits represents fraction (F).
IEEE-754 64-bit Double-Precision Floating-Point
Numbers (Normalized Form)
➢1 ≤ E ≤ 2046 with excess of 1023. The actual exponent is from -1022 to
+1023, and
➢ N = (-1)^S × 1.F × 2^(E-1023)
➢Example 1: Normalized maximum floating point number (N(max))
✓7FEF FFFF FFFF FFFFH
✓N(max) = 1.1...1B × 2^1023 = (2 - 2^-52) × 2^1023
✓(≈1.7976931348623157 × 10^308)
➢Example 2: Normalized minimum floating point number (N(min))
✓0010 0000 0000 0000H
✓N(min) = 1.0B × 2^-1022
✓(≈2.2250738585072014 × 10^-308)
IEEE-754 64-bit Double-Precision Floating-Point
Numbers (De-normalized Form)
➢For E = 0, N = (-1)^S × 0.F × 2^(-1022).
➢Example 1: De-normalized maximum floating point number (D(max))
✓001F FFFF FFFF FFFFH
✓D(max) = 0.1...1 × 2^-1022 = (1-2^-52)×2^-1022
✓(≈4.4501477170144023 × 10^-308)
➢Example 2: De-normalized minimum floating point number (D(min))
✓0000 0000 0000 0001H
✓D(min) = 0.0...1 × 2^-1022 = 1 × 2^-52 × 2^-1022 = 2^-1074
✓(≈4.9 × 10^-324)
Note: For E = 2047, N represents special values, such as ±INF (infinity), NaN (not a
number).
Problem1
➢convert 25.5 to IEEE 754 Single Precision (32-bit) format:
➢Convert to binary: Integer part: 25 → 11001 Fractional part: .5 → .1
Combined binary: 11001.1
➢ Normalize: 11001.1 = 1.10011 × 2⁴ (Shift left 4 position from .(dot))
➢ Exponent = 4 Biased exponent = 127 + 4 = 131 → binary: 10000011
➢Mantissa (fractional part after leading 1.): 10011000000000000000000
(pad to 23 bits)
➢Sign bit: Positive number → 0
➢Ans: 0 10000011 10011000000000000000000
Problem2
➢convert 25.5 to IEEE 754 Double Precision (64-bit) format:
➢Convert to binary: Integer part: 25 → 11001 Fractional part: .5 → .1
Combined binary: 11001.1
➢ Normalize: 11001.1 = 1.10011 × 2⁴ (Shift left 4 position from .(dot))
➢ Exponent = 4 Biased exponent = 1023 + 4 = 1027 → binary: 10000000011
➢Mantissa (fractional part after leading 1.):
1001100000000000000000000000000000000000000000000000 (pad to
52 bits)
➢Sign bit: Positive number → 0
➢Ans: 0 10000000011 1001100000000000000000000000000000000000000000000000
References
1. “Computer Organization”, C. Hamacher, V. Zvonko, S. Zaky, Tata
McGraw Hill Publication, ISBN 007-120411-, 5th Edition.
2. “Computer System Architecture”, M. Morris Mano, Pearson
Education, ISBN-978-81-317-0070-9, 3rd Edition.
3. https://www.geeksforgeeks.org/computer-organization-and-
architecture-tutorials/
4. https://nptel.ac.in/courses/106/103/106103068/
5. https://www3.ntu.edu.sg/home/ehchua/programming/java/datare
presentation.html