UNIT -3

DIGITAL MODULATION
&
TRANSMISSION

AMPLITUDE SHIFT KEYING

(ASK)
INTRODUCTION
 INTRODUCTION

The simplest digital modulation technique is amplitude-shift keying (ASK), where a binary
information signal directly modulates the amplitude of the analog carrier. ASK is similar to
standard amplitude modulation except there are only two output amplitudes possible.
Amplitude-shift keying is sometimes called digital amplitude modulation (DAM)

In ASK, carrier is switched on when binary 1 is to be transmitted and it is switched off

when binary 0 is to be transmitted ASK is also called on-off keying.
MATHEMATICAL EXPRESSION FOR ASK
ASK MODULATOR
ASK MODULATION WAVEFORM
 ASK DEMODULATION
ASK demodulation can be done in two ways. They are,
● Coherent detection (Synchronous demodulation)
● Noncoherent Detection (Asynchronous demodulation)

Coherent ASK Detection

In coherent ASK detection, the carrier signal used at the receiver stage is in the same phase with
the carrier signal used at the transmitter stage.

The receiver receives the ASK modulated waveform from the channel but is effected with noise
signal because it is forwarded from the free space channel. Hence, noise can be eliminated after
the multiplier stage by the help of a low pass filter. Then it is forwarded from the sample and hold
circuit for converting it into discrete signal form. At each interval, the discrete signal voltage is
compared with the reference voltage (Vref) to reconstruct the original binary signal.
Non-coherent ASK Detection

● In this, the only difference is the carrier signal which is using at the transmitter side and
receiver side are not in the same phase with each other.

● The output signal generated from the square-law device is forwarded through a low pass
filter to reconstruct the original binary signal.
Advantages of ASK
1. Simple technique
2. Easy to generate and detect

Disadvantages of ASK
1. It is very sensitive to noise
2. It is used at very low bit rates up to 100 bits/sec
3. Because ASK requires the excessive bandwidth. It leads to power loss in the spectrum of
ASK.
4. ASK modulated waveforms are easily affected by noise. And this leads to amplitude variations.

ASK Applications
1. Low-frequency RF applications
2. Home automation devices
3. Industrial networks devices
4. Wireless base stations
5. Tire pressuring monitoring systems
VIDEO LINK:

https://youtu.be/iV57nbAUn_4
Frequency Shift Keying (FSK)
● Called as Binary Frequency Shift Keying (BFSK)

● The output of a FSK modulated wave is high in frequency for a binary

High input and is low in frequency for a binary Low input. The binary 1s
and 0s are called Mark and Space frequencies.
● The phase shift in carrier frequency (∆f) is proportional to the amplitude of

the binary input signal (vm(t)) and the direction of the shift is determined by
the polarity

Where vfsk(t) = binary FSK waveform

Vc = peak analog carrier amplitude (volt)
fc = analog carrier center frequency (Hz)
∆f = peak shift in analog carrier frequency (Hz)
vm(t) = binary input signal (volt)
FSK Bandwidth
FSK Modulator
FSK Demodulators
Coherent FSK Demodulator

● As the input to the PLL shifts between the mark and space
frequencies, the dc error voltage at the output of the phase
comparator follows the frequency shift.
● Because there are only two input frequencies (mark and space),
there are also only two output error voltages.
● One represents a logic 1 and the other a logic 0.
Advantages
● Simple process to construct the circuit
● Zero amplitude variations
● Supports a high data rate.
● Low probability of error.
● High SNR (signal to noise ratio).
● More noise immunity than the ASK
● Error-free reception can be possible with FSK
● Useful in high-frequency radio transmissions
● Preferable in high-frequency communications
Disadvantages
● It requires more bandwidth than the ASK and PSK(phase shift keying)
● Due to the requirement of large bandwidth, this FSK has limitations to use only in
low-speed modems which the bit rate is 1200bits/sec.
● The bit error rate is less in AWGN channel than phase shift keying.
 EC8395
COMMUNCATION ENGINEERING

UNIT NO -3

DIGITAL COMMUNICATION &

TRANSMISSION
3.1 Binary Phase‐Shift Keying (BPSK)

II IV
EC 8395
COMMUNICATION ENGINEERING
 EC8395
COMMUNICATION ENGINEERING (COMMON TO ICE & EIE )

BINARY PHASE‐SHIFT
KEYING (BPSK)
TRANSMITTER & RECEIVER
 EC8395
COMMUNICATION ENGINEERING (COMMON TO ICE & EIE )

Binary phase-shift keying (BPSK)

● Simplest form of PSK is Binary Phase Shift Keying (BPSK), where

N = 1 and M= 2
● Therefore, with BPSK, the two phases (21=2) are possible for the carrier.
● One phase represents a logic 1, and the other phase represents a logic
0. As the input digital signal changes state (i.e., from a 1 to 0 or from a 0
to a 1), the phase of the output shifts between two angles that are
separated by 180°.
● Hence, the other names for BPSK are phase reversal keying (PRK) and
biphase modulation.
● BPSK is a form of square-wave modulation of a continuous wave (CW)
signal.
 EC8395
COMMUNICATION ENGINEERING (COMMON TO ICE & EIE )

Representation of BPSK signal

● In binary phase shift keying (BPSK), binary symbol ‘1’ and ‘0’ modulate the
phase of the carrier. Let, the carrier be
s(t)= Acos(2πf0(t))…(1)
● A represents peak value of sinusoidal carrier .In the standard 1 ohm load
register , the power dissipated will be,

● When the symbol is changed , then the phase of the carrier is changed by 180
degrees (π radians )
 EC8395
COMMUNICATION ENGINEERING (COMMON TO ICE & EIE )

Consider for example,

Symbol ‘1’

Symbol ‘0’

Therefore
 EC8395
COMMUNICATION ENGINEERING (COMMON TO ICE & EIE )

over equation we can define BPSK signal combinely as,

Here, b(t)
= +1 when binary ‘1’ is to be transmitted .
= -1 when binary ‘0’ is to be transmitted.
 EC8395
COMMUNICATION ENGINEERING (COMMON TO ICE & EIE )

Generation of BPSK

● The binary data sequence is applied into a polar non-return-to-zero

(NRZ) level encoder which generates bipolar NRZ signal b(t).
● This b(t) signal and the carrier signal Ф(t) both are applied to the
product modulator. The desired BPSK signal S(t) is obtained at the
modulator output
 EC8395
COMMUNICATION ENGINEERING (COMMON TO ICE & EIE )
 EC8395
COMMUNICATION ENGINEERING (COMMON TO ICE & EIE )
 EC8395
COMMUNICATION ENGINEERING (COMMON TO ICE & EIE )
 EC8395
COMMUNICATION ENGINEERING (COMMON TO ICE & EIE )

BPSK RECEIVER

● To detect the original binary sequence from noisy BPSK signal X(t), the
received signal from the channel is applied to a correlator.
X(t)=S(t)+n(t) ; Where, n(t) is noise signal
 EC8395
COMMUNICATION ENGINEERING (COMMON TO ICE & EIE )

● A locally generated coherent reference carrier signal Ф(t) is applied to the

correlator which suppress the transmitted carrier signal. The output of the
multiplier is b(t) signal which is integrated over one bit period (Tb)
● If the correlator output is exceeded the threshold(=0), the receiver decides
in favour of symbol “1”
X1>0 ≈ 1
● If the correlator output is not exceeded the threshold(=0), the receiver
decides in favour of symbol “0”
X1< 0 ≈ 0
● If X1is exactly 0, the receiver makes a random guess in favour of 0 (or) 1
X1=0 ≈ 0 (or) 1
 EC8395
COMMUNICATION ENGINEERING (COMMON TO ICE & EIE )

Advantages:
1. It has lower bandwidth when compared to BFSK signal.
2. It has the best performance of all the systems in presence of noise.
3. It has a very good noise immunity and
4. It gives minimum possibility of error.

Disadvantages:
1. Generation and detection is not easy. It is quite complicated, because the
synchronous (coherent) demodulation is used to recover the original signal
from BPSK signal.
 EC8395
COMMUNICATION ENGINEERING (COMMON TO ICE & EIE )

Applications:
1. BPSK is the most efficient of the three binary modulation methods and it is
used for high bit rates even higher than 1800 bits/sec.
2. Due to low bandwidth requirement BPSK modems are preferred over the FSK
modems at higher operating speeds.
 EC8395
COMMUNICATION ENGINEERING (COMMON TO ICE & EIE )

VIDEO LINK:

https://www.youtube.com/watch?v=KiFF25TmZ8c
 EC8394
ANALOG AND DIGITAL COMMUNICATION
2-5-1-1 BPSK transmitter.
Figure 2-12 shows a simplified block diagram of a BPSK
transmitter.
The balanced modulator acts as a phase reversing switch.
Depending on the logic condition of the digital input, the carrier
is transferred to the output either in phase or 180° out of phase
with the reference carrier oscillator.
Figure 2-13 shows the schematic diagram of a balanced ring
modulator.

The balanced modulator has two inputs: a carrier that is in

phase with the reference oscillator and the binary digital data.

For the balanced modulator to operate properly, the digital

input voltage must be much greater than the peak carrier
voltage.

This ensures that the digital input controls the on/off state of
diodes D1 to D4. If the binary input is a logic 1(positive
voltage), diodes D 1 and D2 are forward biased and on, while
diodes D3 and D4 are reverse biased and off (Figure 2-13b).
With the polarities shown, the carrier voltage is developed
across transformer T2 in phase with the carrier voltage across T
1. Consequently, the output signal is in phase with the reference
oscillator.

If the binary input is a logic 0 (negative voltage), diodes Dl and

D2 are reverse biased and off, while diodes D3 and D4 are
forward biased and on (Figure 9-13c). As a result, the carrier
voltage is developed across transformer T2 180° out of phase
with the carrier voltage across T 1.

24
FIGURE 9-13 (a) Balanced ring modulator; (b) logic 1 input;
(c) logic 0 input

25
FIGURE 2-14 BPSK modulator: (a) truth table; (b) phasor
diagram; (c) constellation diagram

2-5-1-2 Bandwidth considerations of BPSK.

In a BPSK modulator. the carrier input signal is multiplied by

the binary data.

If + 1 V is assigned to a logic 1 and -1 V is assigned to a logic

0, the input carrier (sin ωct) is multiplied by either a + or - 1 .

The output signal is either + 1 sin ωct or -1 sin ωct the first
represents a signal that is in phase with the reference oscillator,
the latter a signal that is 180° out of phase with the reference
oscillator.

26
Each time the input logic condition changes, the output phase
changes.

Mathematically, the output of a BPSK modulator is

proportional to

BPSK output = [sin (2πfat)] x [sin (2πfct)] (2.20)

where
fa = maximum fundamental frequency of binary
input (hertz)
fc = reference carrier frequency (hertz)

Solving for the trig identity for the product of two sine
functions,

0.5cos[2π(fc – fa)t] – 0.5cos[2π(fc + fa)t]

Thus, the minimum double-sided Nyquist bandwidth (B) is

fc + f a fc + f a
-(fc + fa) or -fc + fa
2fa

and because fa = fb / 2, where fb = input bit rate,

where B is the minimum double-sided Nyquist bandwidth.

Figure 2-15 shows the output phase-versus-time relationship

for a BPSK waveform.

Logic 1 input produces an analog output signal with a 0°

phase angle, and a logic 0 input produces an analog output
signal with a 180° phase angle.

27
As the binary input shifts between a logic 1 and a logic 0
condition and vice versa, the phase of the BPSK waveform
shifts between 0° and 180°, respectively.

BPSK signaling element (ts) is equal to the time of one

information bit (tb), which indicates that the bit rate equals the
baud.

FIGURE 2-15 Output phase-versus-time relationship for a BPSK

modulator

Example 2-4

For a BPSK modulator with a carrier frequency of 70 MHz and an

input bit rate of 10 Mbps, determine the maximum and minimum
upper and lower side frequencies, draw the output spectrum, de-
termine the minimum Nyquist bandwidth, and calculate the baud..

28
Solution
Substituting into Equation 2-20 yields

output = [sin (2πfat)] x [sin (2πfct)] ; fa = fb / 2 = 5 MHz

= [sin 2π(5MHz)t)] x [sin 2π(70MHz)t)]

= 0.5cos[2π(70MHz – 5MHz)t] – 0.5cos[2π(70MHz +

5MHz)t]
lower side frequency upper side frequency

Minimum lower side frequency (LSF):

LSF=70MHz - 5MHz = 65MHz

Maximum upper side frequency (USF):

USF = 70 MHz + 5 MHz = 75 MHz

Therefore, the output spectrum for the worst-case binary input

conditions is as follows: The minimum Nyquist bandwidth (B) is

B = 75 MHz - 65 MHz = 10 MHz

and the baud = fb or 10 megabaud.

29
 EC8394
ANALOG AND DIGITAL COMMUNICATION

UNIT NO -3

DIGITAL COMMUNICATION &

TRANSMISSION
3.3 Quaternary Phase‐Shift Keying (QPSK)

II IV
EC 8395
COMMUNICATION ENGINEERING
 EC8395
COMMUNICATION ENGINEERING (COMMON TO ICE & EIE )

QUATERNARY
PHASE‐SHIFT KEYING
(QPSK)
TRANSMITTER & RECEIVER
 EC8395
COMMUNICATION ENGINEERING (COMMON TO ICE & EIE )

Quaternary phase-shift keying (QPSK)

● QPSK is an M‐ ary encoding scheme where

N = 2 and M= 4
● Therefore, with Q , PSK, the binary input data are combined into groups
of two bits, called dibits.
● Each dibit code generates one of the four possible output phases (+45°,
+135°, ‐45°, and ‐135°)
 EC8395
COMMUNICATION ENGINEERING (COMMON TO ICE & EIE )

QPSK transmitter

● Two bits (di‐bit) are clocked into the bit splitter.

● After both bits have been serially inputted, they are simultaneously parallel
outputted.
● The I bit modulates a carrier that is in phase with the reference oscillator
(hence the name "I" for "in phase" channel)
● The Q bit modulate, a carrier that is 90° out of phase i.e. cosine wave .
 EC8395
COMMUNICATION ENGINEERING (COMMON TO ICE & EIE )
 EC8395
COMMUNICATION ENGINEERING (COMMON TO ICE & EIE )

Working
● For a logic 1 = + 1 and a logic 0 = ‐ 1 , two phases are possible at the
output of the –I modulator (+sinwct and ‐ sinwct)
● Similarly two phases are possible at the output of the Q balanced
modulator (+coswct), and (‐coswct).
● For input of Q =I= 1, the two inputs to the I balanced modulator are
+1 and sinwct, and The two inputs to the Q balanced modulator are
+1 and coswct.
● Outputs are
(a) I balanced modulator =(+1)(sinwct) = +1 sinwct
(b) Q balanced modulator =(+1)(coswct) = +1 coswct
 EC8395
COMMUNICATION ENGINEERING (COMMON TO ICE & EIE )

Mathematically
 EC8395
COMMUNICATION ENGINEERING (COMMON TO ICE & EIE )

Truth Table, Phasor & Constellation Diagrams

 EC8395
COMMUNICATION ENGINEERING (COMMON TO ICE & EIE )

Features of QPSK

● Each of the four possible output phasors has exactly the same amplitude.
Therefor, the binary information must be encoded entirely in the phase of
the output signal.
● The angular separation between any two adjacent phasors in QPSK is 90°.
● Thus a QPSK signal can undergo almost a +45° or -45° shift in phase
during transmission and still retain the correct encoded information when
demodulated at the receiver.
 EC8395
COMMUNICATION ENGINEERING (COMMON TO ICE & EIE )
 EC8395
COMMUNICATION ENGINEERING (COMMON TO ICE & EIE )
 EC8395
COMMUNICATION ENGINEERING (COMMON TO ICE & EIE )
 EC8395
COMMUNICATION ENGINEERING (COMMON TO ICE & EIE )
 EC8395
COMMUNICATION ENGINEERING (COMMON TO ICE & EIE )
 EC8395
COMMUNICATION ENGINEERING (COMMON TO ICE & EIE )
 EC8395
COMMUNICATION ENGINEERING (COMMON TO ICE & EIE )

Advantages:
1. Low error probability
2. Very good noise immunity
3. For the same bit error rate, the bandwidth required by QPSK is reduced to
half as compared to BPSK
4. Because of reduced bandwidth, the information transmission rate of QPSK is
higher
5. Carrier power remains constant
Due to these advantages the QPSK is used for high bit rate
Disadvantages
1. Very complex generation and detection
2. Inter channel interference is large due to side lobes
 EC8395
COMMUNICATION ENGINEERING (COMMON TO ICE & EIE )

VIDEO LINK:

https://www.youtube.com/watch?v=KiFF25TmZ8c

https://youtu.be/ij760lCUtfw
 EC8395
COMMUNICATION ENGINEERING (COMMON TO ICE & EIE )
 Comparison of Digital communication techniques

Introduction:

Comparison between ASK , FSK & PSK

S.NO PARAMETERS/ ASK FSK PSK
CHARACTERISTICS

1 Variable Amplitude Frequency Phase

Characteristics
2 Noise immunity Low High High
3 Complexity simple Moderately Very complex
complex
4 Error probability High Low Low
5 Performance in Poor Better than Better than
presence of noise ASK FSK
6 Bit rate Suitable upto Suitable upto Suitable for
100 bits/sec about 1200 high bit rates
bits/sec

Comparison between BPSK & QPSK:

S.NO PARAMETERS/ BPSK QPSK
CHARACTERISTICS

1 Type of modulation 2 level phase 4 level phase

2 Bit rate = baud rate =2baud rate
3 Complexity complex Very complex
4 Constellation

5 Noise immunity Same Same

6 Bandwidth 2fb fb
7 Bandwidth utilization Low when compared to Better than BPSK
QPSK
8 Bit error rate (BER) Same Same
9 Variable Phase Phase
characteristics of the
carrier
10 Applications Suitable for Suitable for applications
applications that need that need very high bit
high bit rate rate
Comparison between QPSK & QAM:

S.NO PARAMETERS/ QPSK QAM

CHARACTERISTICS

1 Type of modulation Quadrature phase Quadrature amplitude and

modulation phase modulation
2 Noise immunity Better than QAM Poorer than QPSK
3 Probability of error Less than QAM More than QPSK
4 Type of Demodulation Synchronous Synchronous
5 System Complexity Less More
6 Location of signal All signal points placed Signal points are replaced
points on circumference of symmertrically about the
circle origin
2-5-3 8-PSK

With 8-PSK, three bits are encoded, forming tribits and

producing eight different output phases. To encode eight different
phases, the incoming bits are encoded in groups of three, called
tribits (2 3 = 8).

2-5-3-1 8-PSK transmitter.

A block diagram of an 8-PSK modulator is shown in Figure 2-

23.

FIGURE 2.23 8-PSK modulator

FIGURE 2-24 I- and Q-channel 2-to-4-level converters: (a)

1-channel truth table; (b) D-channel truth table; (c) PAM
levels

43
The bit rate in each of the three channels is fb,/3.

The bits in the I and C channels enter the I channel 2-to-4-level

converter and the bits in the Q and C channels enter the Q
channel 2-to-4-level converter.

Essentially, the 2-to-4-level converters are parallel-input

digital-to-analog converter, (DACs). With two input bits, four
output voltages are possible.

The I or Q bit determines the polarity of the output analog

signal (logic 1=+V and logic 0 = -V), whereas the C or C
bit determines the magnitude (logic 1= 1.307 V and logic 0 =
0.541 V).

Figure 2-24 shows the truth table and corresponding output

_
conditions for the 2-to4-level converters. Because the C and C
bits can never be the same logic state, the outputs from the I
and Q 2-to-4-level converters can never have the same
magnitude, although they can have the same polarity. The
output of a 2-to-4-level converter is an M-ary, pulse-
amplitude-modulated (PAM) signal where M = 4.

Example 2-7

For a tribit input of Q = 0, 1 = 0, and C = 0 (000), determine the

output phase for the S-PSK modulator shown in Figure 2-23.

Solution

The inputs to the I channel 2-to-4-level converter are I = 0 and C =

0. From Figure 2-24 the output is -0.541 V. The inputs to the Q
_
channel 2-to-4-level converter are Q = 0 and C = 1.

Again from Figure 2-24, the output is - 1.307 V.

Thus, the two inputs to the I channel product modulators are -0.541

44
and sin ωct. The output is

I = (-0.541)(sin ωct) = -0.541 sin ωct

The two inputs to the Q channel product modulator are - 1.307 V

and cos ωct. The output is

Q = (-1.307)(cos ωct) = - 1.307 cos ωct

The outputs of the I and Q channel product modulators are

combined in the linear summer and produce a modulated output
of

summer output = -0.541 sin ωct - 1.307 cos ωct

= 1.41 sin(ωct - 112.5°)

For the remaining tribit codes (001, 010, 011, 100, 101, 110, and
111), the procedure is the same. The results are shown in Figure
2-25.

45
FIGURE 2-25 8-PSK modulator: (a) truth table; (b) phasor
diagram; (c) constellation diagram.

46
From Figure 2-25, it can be seen that the angular separation
between any two adjacent phasors is 45°, half what it is with
QPSK.
Therefore, an 8-PSK signal can undergo almost a ± 22.5°
phase shift during transmission and still retain its integrity.
Also, each phasor is of equal magnitude; the tribit condition
(actual information) is again contained only in the phase of
the signal.
The PAM levels of 1.307 and 0.541 are relative values. Any
levels may be used as long as their ratio is 0.541/1.307 and
their arc tangent is equal to 22.5°. For example, if their
values were doubled to 2.614 and 1.082, the resulting phase
angles would not change, although the magnitude of the
phasor would increase proportionally.

Figure 2-26 shows the output phase-versus-time relationship of

an 8-PSK modulator.

FIGURE 2-26 Output phase-versus-time relationship for an 8-

PSK modulator

2-5-3-2 Bandwidth considerations of 8-PSK.

With 8-PSK, because the data are divided into three channels,
the bit rate in the I, Q, or C channel is equal to one-third of the
binary input data rate (fb /3).

47
 (2.25)
where

And X = ± 1.307 or ± 0.541

Thus

48
FIGURE 2-27 Bandwidth considerations of an 8-PSK
modulator

Figure 2-27 shows that the highest fundamental frequency in

the I, Q, or C channel is equal to one-sixth the bit rate of the
binary input (one cycle in the I, Q, or C channel takes the same
amount of time as six input bits).

With an 8-PSK modulator, there is one change in phase at the

output for every three data input bits. Consequently, the baud
for 8 PSK equals fb / 3, the same as the minimum bandwidth.
Again, the balanced modulators are product modulators; their
outputs are the product of the carrier and the PAM signal.

49
Mathematically, the output of the balanced modulators is

The output frequency spectrum extends from fc + fb / 6 to fc

- fb / 6, and the minimum bandwidth (fN) is

Example 2-8

For an 8-PSK modulator with an input data rate (fb) equal to

10 Mbps and a carrier frequency of 70 MHz, determine the
minimum double-sided Nyquist bandwidth (fN) and the baud.
Also, compare the results with those achieved with the BPSK
and QPSK modulators in Examples 2-4 and 2-6. If the 8-PSK
block diagram shown in Figure 2-23 as the modulator model.

Solution

The bit rate in the I, Q, and C channels is equal to one-third of

the input bit rate, or 10 Mbps

fbc = fbQ = fb1 = 10 Mbps / 3 = 3.33 Mbps

Therefore, the fastest rate of change and highest fundamental

frequency presented to either balanced modulator is
fa = fbc / 2 = 3.33 Mbps / 2 = 1.667 Mbps

The output wave from the balance modulators is

(sin 2πfat)(sin 2πfct)

0.5 cos 2π(fc – fa)t – 0.5 cos 2π(fc + fa)t

0.5 cos 2π[(70 – 1.667)MHz]t – 0.5 cos 2π[(70

50
+ 1.667)MHz]t

0.5 cos 2π(68.333MHz)t - 0.5 cos

2π(71.667MHz)t

The minimum Nyquist bandwidth is

B= (71.667 - 68.333) MHz = 3.333 MHz

The minimum bandwidth for the 8-PSK can also be determined

by simply substituting into Equation 2-10:

B = 10 Mbps / 3 = 3.33 MHz

Again, the baud equals the bandwidth; thus,

baud = 3.333 megabaud

The output spectrum is as follows:

B = 3.333 MHz

It can be seen that for the same input bit rate the minimum
bandwidth required to pass the output of an 8-PSK modulator is
equal to one-third that of the BPSK modulator in Example 2-4 and
50% less than that required for the QPSK modulator in Example 2-6.
Also, in each case the baud has been reduced by the same
proportions.

51
2-5-3-3 8-PSK receiver.

Figure 2-28 shows a block diagram of an 8-PSK receiver. The

power splitter directs the input 8-PSK signal to the I and Q
product detectors and the carrier recovery circuit.

The carrier recovery circuit reproduces the original reference

oscillator signal. The incoming 8-PSK signal is mixed with the
recovered carrier in the I product detector and with a
quadrature carrier in the Q product detector.

The outputs of the product detectors are 4-level PAM signals

that are fed to the 4-to-2-level analog-to-digital converters
(ADCs). The outputs from the I channel 4-to-2-level
converter are the I and C_bits, whereas the outputs from the
_
Q channel 4-to-2-level converter are the Q and C bits. The
_
parallel-to-serial logic circuit converts the I/C and Q/ C bit
pairs to serial I, Q, and C output data streams.

FIGURE 2-28 8-PSK receiver.

52
2-5-4 16-PSK

16-PSK is an M-ary encoding technique where M = 16; there

are 16 different output phases possible. With 16-PSK, four
bits (called quadbits) are combined, producing 16 different
output phases. With 16-PSK, n = 4 and M = 16; therefore, the
minimum bandwidth and baud equal one-fourth the bit rate (
fb/4).

FIGURE 2-29 16-PSK: (a) truth table; (b) constellation

diagram

Figure 2-29 shows the truth table and constellation diagram

for 16-PSK, respectively. Comparing Figures 2-18, 2-25, and
2-29 shows that as the level of encoding increases (i.e., the
values of n and M increase), more output phases are possible
and the closer each point on the constellation diagram is to an
adjacent point. With 16-PSK, the angular separation between
adjacent output phases is only 22.5° (1800 / 8 ). Therefore, 16-
PSK can undergo only a 11.25° (1800 / 16) phase shift during
transmission and still retain its integrity.

For an M-ary PSK system with 64 output phases (n = 6), the

angular separation between adjacent phases is only 5.6° (180 /
32). This is an obvious limitation in the level of encoding (and

53
bit rates) possible with PSK, as a point is eventually reached
where receivers cannot discern the phase of the received
signaling element. In addition, phase impairments inherent on
communications lines have a tendency to shift the phase of the
PSK signal, destroying its integrity and producing errors.

2.6 QUADRATURE – AMPLITUDE MODULATION

https://www.youtube.com/watch?v=IbUflaeJcU8
2-6-1 8-QAM

8-QAM is an M-ary encoding technique where M = 8. Unlike 8-

PSK, the output signal from an 8-QAM modulator is not a
constant-amplitude signal.

2-6-1-1 8-QAM transmitter.

Figure 2-30a shows the block diagram of an 8-QAM

transmitter. As you can see, the only difference between the 8-
QAM transmitter and the 8PSK transmitter shown in Figure 2-
23 is the omission of the inverter between the C channel and
the Q product modulator. As with 8-PSK, the incoming data are
divided into groups of three bits (tribits): the I, Q, and C bit
streams, each with a bit rate equal to one-third of the incoming
data rate. Again, the I and Q bits determine the polarity of the
PAM signal at the output of the 2-to-4-level converters, and
the C channel determines the magnitude. Because the C bit is
fed uninverted to both the I and the Q channel 2-to-4-level
converters. the magnitudes of the I and Q PAM signals are
always equal. Their polarities depend on the logic condition of
the I and Q bits and, therefore, may be different. Figure 2-30b
shows the truth table for the I and Q channel 2-to-4-level
converters; they are identical.

54
FIGURE 2-30 8-OAM transmitter: (a) block diagram; (b) truth
table 2-4 level converters

Example 2-9

For a tribit input of Q = 0, I= 0, and C = 0 (000), determine the

output amplitude and phase for the 8-QAM transmitter shown in
Figure 2-30a.

Solution

The inputs to the I channel 2-to-4-level converter are I= 0 and C =

0. From Figure 2-30b,
the output is -0.541 V. The inputs to the Q channel 2-to-4-level
converter are Q = 0 and C = 0. Again from Figure 9-30b, the
output is -0.541 V.

Thus, the two inputs to the I channel product modulator are -0.541
and sin ωct. The output is

I = (-0.541)(sin ωct) = -0.541 sin ωct.

The two inputs to the Q channel product modulator are -0.541 and
cos ωct.. The output is
Q = (-0.541)(cos ωct.) = -0.541 cos ωct.

55
The outputs from the I and Q channel product modulators are
combined in the linear summer and produce a modulated output of

summer output =-0.541 sin ωct. -0.541 cos

ωct.
= 0.765 sin(cos - 135°)

For the remaining tribit codes (001, 010, 0ll, 100, 101, 110, and
111), the procedure is the same. The results are shown in Figure 2-
31.

Figure 2-32 shows the output phase-versus-time relationship for an

8-QAM modulator. Note that there are two output amplitudes, and
only four phases are possible.

FIGURE 2-31 8-QAM modulator: (a) truth table; (b) phasor

diagram; (c) constellation diagram

56
FIGURE 2-32 Output phase and amplitude-versus-time
relationship for 8-QAM

2-6-1-2 Bandwidth considerations of 8-QAM.

The minimum bandwidth required for 8-QAM is fb / 3, the

same as in 8-PSK.

2-6-1-3 8-QAM receiver.

An 8-QAM receiver is almost identical to the 8-PSK receiver

shown in Figure 2-28.

2-6-2 16-QAM

As with the 16-PSK, 16-QAM is an M-ary system where M =

16. The input data are acted on in groups of four (24 = 16). As
with 8-QAM, both the phase and the amplitude of the
transmit carrier are varied.

2-6-2-1 QAM transmitter.

The block diagram for a 16-QAM transmitter is shown in Figure

2-33.

57
FIGURE 2-33 16-QAM transmitter block diagram

The input binary data are divided into four channels: I, I', Q,
and Q'. The bit rate in each channel is equal to one-fourth of the
input bit rate (fb/4).

The I and Q bits determine the polarity at the output of the 2-

to-4-level converters (a logic 1 = positive and a logic 0 =
negative).

The I' and Q' buy determine the magnitude (a logic 1 = 0.821
V and a logic 0 = 0.22 V).

For the I product modulator they are +0.821 sin ωct, -0.821 sin
ωct, +0.22 sin ωct, and -0.22 sin ωct.

For the Q product modulator, they are +0.821 cos ωct, +0.22 cos
ωct, -0.821 cos ωct, and -0.22 cos ωct.

The linear summer combines the outputs from the I and Q

channel product modulators and produces the 16 output
conditions necessary for 16-QAM. Figure 2-34 shows the truth
table for the I and Q channel 2-to-4-level converters.

58
FIGURE 2-34 Truth tables for the I- and Q-channel 2-to-4-
evel converters: (a) I channel; (b) Q channel

Example 2-10

For a quadbit input of I= 0, I' = 0, Q = 0, and Q' = 0 (0000),

determine the output amplitude and phase for the 16-QAM
modulator shown in Figure 2-33.

Solution

The inputs to the I channel 2-to-4-level converter are I = 0

and I' = 0. From Figure 2-34, the output is -0.22 V. The inputs
to the Q channel 2-to-4-level converter are Q= 0 and Q' = 0.
Again from Figure 2-34, the output is -0.22 V.

Thus, the two inputs to the I channel product modulator are -

0,22 V and sin ωct. The output is

I = (-0.22)(sin ωct) = -0.22 sin ωct

The two inputs to the Q channel product modulator are -0.22 V
and cos ωct. The output is

Q = (-0.22)(cos ωct) = -0.22 cos ωct

The outputs from the I and Q channel product modulators are

combined in the linear summer and produce a modulated output
of

summer output = -0.22 sin ωct - 0.22 cos ωct

= 0.311 sin(ωct - 135°)
For the remaining quadbit codes, the procedure is the same. The

59
results are shown in Figure 2-35.

FIGURE 2-35 16-QAM modulator: (a) truth table; (b) phasor

diagram; (c) constellation diagram.

60
FIGURE 2-36 Bandwidth considerations of a 16-QAM
modulator

2-6-2-2 Bandwidth considerations of 16-QAM.

With a 16-QAM, the bit rate in the I, I', Q, or Q' channel is

equal to one-fourth of the binary input data rate (fb/4).

Figure 2-36 shows the bit timing relationship between the

binary input data; the I, I'. Q, and Q' channel data; and the I
PAM signal. It can be seen that the highest fundamental
frequency in the I, I', Q, or Q' channel is equal to one-eighth of
the bit rate of the binary input data (one cycle in the I, I', Q, or

61
Q' channel takes the same amount of time as eight input bits).
Also, the highest fundamental frequency of either PAM
signal is equal to one-eighth of the binary input bit rate. With
a 16-QAM modulator, there is one change in the output signal
(either its phase, amplitude, or both) for every four input data
bits. Consequently, the baud equals fb/4, the same as the
minimum bandwidth.

Again, the balanced modulators are product modulators

and their outputs can be represented mathematically as

(2.26)
where

and

Thus,

The output frequency spectrum extends from fc + fb / 8 and

fc - fb / 8 the minimum bandwidth (fN) is

62
Example 2-11

For a 16-QAM modulator with an input data rate (fb) equal to

10 Mbps and a carrier frequency of 70 MHz, determine the
minimum double-sided Nyquist frequency (fN) and the baud.
Also, compare the results with those achieved with the BPSK,
QPSK, and 8-PSK modulators in Examples 2-4, 2-6, and 2-8.
Use the 16-QAM block diagram shown in Figure 2-33 as the
modulator model.

Solution

The bit rate in the I, I’, Q, and Q’ channels is equal to one-

fourth of the input bit rate,

fbI = fbI’ = fbQ = fbQ’ = fb / 4 = 10 Mbps / 4 = 2.5

Mbps

Therefore, the fastest rate of change and highest fundamental

frequency presented to either balanced modulator is

fa = fbI / 2 = 2.5 Mbps / 2 = 1.25 MHz

The output wave from the balanced modulator is
(sin 2πfat)(sin 2πfct)

0.5 cos 2π(fc – fa)t – 0.5 cos 2π(fc + fa)t

0.5 cos 2π[(70 – 1.25)MHz]t – 0.5 cos 2π[(70 +

1.25)MHz]t

0.5 cos 2π(68.75MHz)t - 0.5 cos

2π(71.25MHz)t

The minimum Nyquist bandwidth is

63
 B=(71.25 - 68.75) MHz = 2.5 MHz

The minimum bandwidth for the 16-QAM can also be

determined by simply substituting into Equation 2-10:

B = 10 Mbps / 4 = 2.5 MHz.

The symbol rate equals the bandwidth; thus,

symbol rate = 2.5 megabaud

The output spectrum is as follows:

For the same input bit rate, the minimum bandwidth required to
pass the output of a 16-QAM modulator is equal to one-fourth that
of the BPSK modulator, one-half that of QPSK, and 25% less than
with 8-PSK. For each modulation technique, the baud is also
reduced by the same proportions.

Example 2-12

For the following modulation schemes, construct a table showing

the number of bits encoded, number of output conditions,
minimum bandwidth, and baud for an information data rate of 12
kbps: QPSK, 8-PSK, 8-QAM, 16-PSK, and 16-QAM.

64
From Example 2-12, it can be seen that a 12-kbps data stream can
be propagated through a narrower bandwidth using either 16-PSK
or 16-QAM than with the lower levels of encoding.

Table 2-1 summarizes the relationship between the number of

bits encoded, the number of output conditions possible, the
minimum bandwidth, and the baud for ASK, FSK. PSK, and
QAM.

When data compression is performed, higher data transmission

rates are possible for a given bandwidth.

Table 2-1 ASK, FSK, PSK AND QAM summary.

65
2-7 BANDWIDTH EFFICIENCY

Bandwidth efficiency (sometimes called information density or

spectral efficiency, often used to compare the performance of
one digital modulation technique to another.

Mathematical bandwidth efficiency is

transmission bit rate (bps ) bits / s

Bη = = (2.27)
min imum bandwidth ( Hz ) Hertz

Where B η = bandwidth efficiency

Example 2-13

For an 8-PSK system, operating with an information bit rate of 24

kbps, determine (a) baud, (b) minimum bandwidth, and (c)
bandwidth efficiency.

Solution

a. Baud is determined by substituting into Equation 2-10,

baud = 24 kbps / 3 = 8000

b. Bandwidth is determined by substituting into Equation 2-11:
B = 24 kbps / 3 = 8000

c. Bandwidth efficiency is calculated from Equation 2-27:

Bη = 24, 000 / 8000

= 3 bits per second per cycle of bandwidth

Example 2-14

For 16-PSK and a transmission system with a 10 kHz bandwidth,

determine the maximum bit rate.

66
Solution

The bandwidth efficiency for 16-PSK is 4, which means that four

bits can be propagated through the system for each hertz of
bandwidth. Therefore, the maximum bit rate is simply the product
of the bandwidth and the bandwidth efficiency, or

bit rate = 4 x 10,000 = 40,000 bps

Table 2-2 ASK, FSK, PSK and QAM summary

2-8 DIFFERENTIAL PHASE-SHIFT KEYING

Differential phase-shift keying (DPSK) is an alternative form of

digital modulation where the binary input information is
contained in the difference between two successive signaling
elements rather than the absolute phase.

2-8-1 Differential BPSK

2-8-1-I DBPSK transmitter.

Figure 2-37a shows a simplified block diagram of a

67