Hesham Hamed Amin

Computer Interfacing Systems

Lecture #4
ADC and DAC Interfacing

SPRING 2022
Instructor:
Dr. Hesham H. Amin
ADC Conversion
➢ This chapter explores real-world devices such as
ADCs, DACs, and sensors.
➢ Explain how to interface AVR to these devices.
➢ The process of A/D conversion involves:
✓Band-limiting the analog signal
✓Setting periodic sampling points (setting
sampling period) at which the continuous time
analog signal is going to be digitized.
✓Freezing analog signal at sampling points so
that signal doesn’t change for duration of
conversion (sample & hold)
✓Determining what digital value best represents
the analog signal level (quantizing).
Periodic Sampling
➢ Now that we have limited the bandwidth of the signal, we
need to sample it.
➢ The Nyquist/Shannon theorems say that you need to
sample the signal at least at twice the maximum frequency
contained in the signal.
➢ E.g., if you limited your signal to a max frequency of 10Hz,
You should sample it at least at 20Hz, i.e., 20 times a
second).
➢ In many cases though we start from the sampling
frequency and having a good understanding of that we
limit the signal to at most half of that.
➢ This is superposition of two sine signals with a higher frequency = 4
➢ Thus, to be able to reconstruct the signal (without loosing any of its
features) we need to sample at least 8Hz.
➢ So, what happens if we over- or under-sample?
 Oversampling
➢ If original signal was
nicely limited,
oversampling will
result in more
samples than we
need for processing
and reconstruction
(i.e., burden on our
calculations/
processor time)
➢ Shown here is 20
samples per second
(a sampling clock of
20Hz)
Undersampling
➢ Undersampling will
result losing the
features of a signal.
➢ If we wanted to
reconstruct the signal
the reconstructed
signal (red) would not
look the same as the
original (black) signal
➢ What is the sampling
clock used here?
Hold after Sample
➢ We need circuitry
that can
“remember” (hold)
the analog voltage
at the sampling
time
Quantization
➢Now that the signal is not changing for
some time (depending on the sampling
period), we need to determine what digital
value best represents the analog level.
➢This will take some time, which should not
be more than the sampling period!
➢There are many methods of doing this,
many microcontrollers use “successive
approximation” to do this.
ADC CHARACTERISTICS
➢ ADC converters are among the most widely used
devices for data acquisition.
➢ Digital computers use binary (discrete) values, but in the
physical world everything is analog (continuous).
➢ Temperature, pressure (wind or liquid), humidity, and
velocity are a few examples of physical quantities that
we deal with every day.
➢ Physical quantity converted to electrical (voltage,
current) signals using transducer (also referred to as
sensor).
➢ Sensors for temperature, velocity, pressure, and other
natural quantities produce output that is voltage/current.
➢ We need ADC converter to translate analog signals to
digital numbers so that MC can read & process them.
ADC CHARACTERISTICS
➢ Resolution versus Step Size for ADC (Vref = 5 V)
Major Characteristics of ADC
Resolution:
➢ ADC has n-bit resolution, n = 8,10,12,16, or 24 bits.
➢ Higher-resolution ADCs provide a smaller step size
➢ step size is the smallest change that can be discerned
by an ADC.
➢ Although the resolution of an ADC chip is decided at
the time of its design and cannot be changed, we can
control the step size with the help of Vref
Major Characteristics of ADC
Conversion time
➢ is defined as the time it takes the ADC to convert the
analog input to a digital (binary) number.
➢ The conversion time is dictated by
✓the clock source connected to the ADC
✓the method used for data conversion
✓technology used in the fabrication of the ADC chip such as
MOS or TTL technology.
Major Characteristics of ADC
Vref
➢ Vref is input voltage used for the reference voltage.
➢ Voltage connected to this pin, along with resolution of the
ADC chip, dictate the step size.
➢ For 8-bit ADC, step size is Vref/256.
➢ if analog input range needs to be 0 to 4 volts, Vref = 4V.
That gives 4V/256=15.62 mV for step size of an 8-bit ADC.
➢ if we need a step size of 10 mV for an 8-bit ADC, then
Vref= 2.56 V, because 2.56V/256 = 10 mV.
Major Characteristics of ADC
➢ For 10-bit ADC, if Vref = 5V, then the step size is 4.88 mV
➢ In some applications, we need the differential reference
voltage where V = Vref (+) −Vref (−).
➢ Often the V (−) pin is connected to ground and the Vref (+)
pin is used as the Vref.
Major Characteristics of ADC
➢Digital data output
➢ In 8-bit ADC we have 8-bit digital data output of D0–D7,
in10-bit ADC data output is D0–D9.
➢ To calculate output voltage, we use the following formula:
Dout =Vin/step_size
➢ Dout = digital data output (in decimal), Vin = analog input
voltage, and step size (resolution) is the smallest change,
which is Vref/256 for an 8-bit ADC
➢ This data is brought out of the ADC chip either one bit at a
time (serially), or in one chunk, using a parallel line of
outputs.
Example
For an 8-bit ADC, we have Vref = 2.56 V.
Calculate the D0–D7 output if the analog input is:
(a) 1.7 V, and (b) 2.1 V.

➢step size = 2.56/256 = 10 mV,

(a) Dout = 1.7 V/10 mV=170
10101010 in binary for D7–D0.
(b) Dout= 2.1 V/10 mV = 210
11010010 in binary for D7–D0.
Parallel vs. Serial ADC
➢ ADC chips are either parallel or serial.
➢ In parallel ADC, we have 8 or more pins dedicated to
bringing out the binary data, but in serial ADC we have
only one pin for data out.
➢ That means that inside the serial ADC, there is a parallel-
in-serial-out shift register responsible for sending out the
binary data one bit at a time.
➢ The D0–D7 data pins of the 8-bit ADC provide an 8-bit
parallel data path between the ADC chip and the CPU.
➢ In the case of the 16-bit parallel ADC chip, we need 16
pins for the data path.
➢ In order to save pins, many 12- and 16-bit ADCs use pins
D0–D7 to send out the upper and lower bytes of the binary
data.
Parallel vs. Serial ADC
➢ In recent years, for many applications where space is
critical issue, using many pins for data is not feasible.
➢ Thus, devices such as serial ADC become widely
used.
➢ While serial ADCs use fewer pins and their smaller
packages take much less space on the printed circuit
board, more CPU time is needed to get converted
data from ADC because CPU must get data one bit at
a time, instead of in one single read operation as with
parallel ADC.
➢ ADC848 is an example of a parallel ADC with 8 pins
for the data output, while the MAX1112 is an example
of a serial ADC with a single pin for Dout.
Analog input channels
➢ Many data acquisition applications need more than 1 ADC.
➢ For this reason, ADC chips have 2, 4, 8, or 16 channels.
➢ Multiplexing of analog inputs is widely used as shown.
➢ In these chips, we have 8 channels of analog inputs,
allowing us to monitor multiple quantities (temperature,
pressure, heat, and so on).
➢ AVR MC chips come with up to 16 ADC channels.
Start & end-of-conversion signals
➢ The fact that we have multiple analog input
channels, and a single digital output register
creates the need for start conversion (SC) and
end-of-conversion (EOC) signals.
➢ When SC is activated, the ADC starts converting
the analog input value of Vin to n-bit digital
number.
➢ The amount of time it takes to convert varies
depending on the conversion method.
➢ When the data conversion is complete, the EOC
signal notifies the CPU that the converted data is
ready to be picked up.
Successive Approximation ADC
➢ Successive Approximation is widely used method
of converting analog input to digital output.
➢ It has three main components:
a) successive approximation register (SAR)
b) comparator
c) control unit.
Successive Approximation ADC
➢ Assuming step size of 10 mV, 8-bit successive approximation ADC
will go through following steps to convert an input of 1 V:
(1) It starts with binary 10000000 → 128×10 mV=1.28 V > 1 V input
→ bit 7 is cleared (dropped).
(2) 01000000 →64×10 mV=640 mV→bit 6 is kept since 640 mV< 1 V.
(3) 01100000 →96×10 mV=960 mV→bit 5 is kept since 960 mV< 1 V.
(4) 01110000 → 112×10 mV=1120 mv → bit 4 is dropped
(5) 01101000 → 108 × 10 mV = 1080 mV → bit 3 is dropped
(6) 01100100 → 100 × 10 mV =1000 mV = 1 V → bit 2 is kept
(Even though the answer is found it does not stop)
(7) 011000110→ 102 × 10 mV = 1020 mV → bit 1 is dropped
(8) 01100101 → 101 × 10 mV = 1010 mV → bit 0 is dropped
➢ Notice that Successive Approximation method goes through all
steps even if the answer is found in one of the earlier steps.
➢ The advantage of the Successive Approximation method is that
conversion time is fixed since it must go through all the steps.
ADC PROGRAMMING IN AVR
➢ ADC peripheral of ATmega32 has characteristics:
a) 10-bit ADC.
b) 8 analog i/p channels, 7 differential i/p channels, 2
differential i/p channels with optional gain of 10x & 200x.
c) converted output binary data is held by two special
function registers: ADCL (A/D Result Low) & ADCH (A/D
Result High).
d) ADCH:ADCL registers give us 16 bits & ADC data out is
only 10 bits→ 6 bits are unused. We have option of
making either upper 6 bits or lower 6 bits unused.
e) Three options for Vref:
✓ Vref can be connected to AVCC (Analog Vcc)
✓ internal 2.56 V reference
✓ external AREF pin.
f) Conversion time is dictated by crystal frequency
connected to the XTAL pins (Fosc) and ADPS0:2 bits.
AVR ADC hardware considerations
➢ For digital logic signals, small variation in voltage level
has no effect on the output.
➢ For example, 0.2 V is considered LOW, since in TTL
logic, anything less than 0.5 V will be detected as
LOW logic.
➢ That is not the case when we are dealing with analog
voltage.
➢ We can use many techniques to reduce the impact of
ADC supply voltage and Vref variation on the
accuracy of ADC output.
➢ Next, we examine two of the most widely used
techniques in the AVR.
Example
For a 10-bit ADC, we have Vref = 2.56 V.
Calculate the D0–D9 output if the analog input is:
(a) 0.2 V, and (b) 0 V.
(b) How much is the variation between (a) and (b)?
➢step size is 2.56/1024 = 2.5 mV, we have:
(a) Dout = 0.2 V/2.5 mV = 80 = 1010000 in binary.
(b) Dout = 0 V/2.5 mV = 0 = 0 in binary.
The difference is 1010000, which is 7 bits!
AVR ADC hardware considerations
➢ For digital logic signals, small variation in voltage level
has no effect on the output.
➢ For example, 0.2 V is considered LOW, since in TTL
logic, anything less than 0.5 V will be detected as
LOW logic.
➢ That is not the case when we are dealing with analog
voltage.
➢ We can use many techniques to reduce the impact of
ADC supply voltage and Vref variation on the
accuracy of ADC output.
➢ Next, we examine two of the most widely used
techniques in the AVR.
AVR programming
➢ In AVR MC five major registers are associated with
ADC that we deal with:
✓ADCH (high data)
✓ADCL (low data)
✓ADCSRA (ADC Control and Status Register)
✓ADMUX (ADC multiplexer selection register)
✓SPIOR (Special Function I/O Register).
ADMUX register
➢ Bit 7:6 Reference Selection Bits: select the reference
voltage for the ADC.

➢ Bit 5 ADC Left Adjust Results: dictates either the left bits
or the right bits of the result registers ADCH:ADCL that are
used to store the result. If ADLAR = 1, the result will be left
adjusted; otherwise, the result is right adjusted.

➢ Bit 4:0 Analog Channel and Gain Selection Bits: select the
gain for the differential channels. Also select which
combination of analog inputs are connected to the ADC.
Vref source
➢Vref Source Selection Table for AVR
ADC input channel source
➢among ADC0 to ACD7.
In this case a single pin
is used as the analog
line, and GND of the
AVR chip is used as
common ground.
➢Table 5 lists the values
of MUX4–MUX0 bits for
different single ended
inputs.
ADC input channel source

➢ if choose differential
input, can also select
op-amp gain.
➢ can choose gain of the
op-amp to be 1x, 10x,
or 200x.
➢ can select positive
input of op-amp to be
one of the pins ADC0
to ADC7, and the
negative input of the
op-amp can be any of
ADC0, ADC1, or
ADC2 pins.
ADLAR bit operation
➢ In AVR two 8-bit registers are dedicated to the ADC
result, but only 10 of the 16 bits are used and 6 bits are
unused.
➢ Notice that changing the ADLAR bit will affect the ADC
data register immediately.
ADCSRA register
➢ ADCSRA register is status and control register of
ADC.
➢ Bits of this register control or monitor operation of
ADC.
ADCSRA register
➢ Bit 7 ADC Enable: enables or disables the ADC. Setting
this bit to one will enable ADC and clearing this bit to zero
will disable it even while a conversion is in progress.
➢ Bit 6 ADC Start Conversion: To start each conversion you
must set this bit to one.
➢ Bit 5 ADC Auto Trigger Enable: Auto triggering of the ADC
is enabled when you set this bit to one.
➢ Bit 4 ADC Interrupt Flag: is set when an ADC conversion
completes, and data registers are updated.
➢ Bit 3 ADC Interrupt Enable: setting it to one enables the
ADC conversion complete interrupt.
➢ Bit 2:0 ADC Prescaler Select Bits: determine division
factor between XTAL frequency and input clock to ADC.
ADC Start Conversion bit
➢ ADC has a Start Conversion input.
➢ AVR chip has a special circuit to trigger start
conversion.
➢ In addition to ADSC bit of ADCSRA there are
other sources to trigger start of conversion.
➢ If you set the ADATE bit of ADCSRA to high, you
can select auto trigger source
➢ Notice that there are many considerations if you
want to use auto trigger mode.
A/D conversion time
➢ Using ADPS2:0 bits we can set the A/D conversion time.
➢ To select the conversion time, select any of Fosc/2,
Fosc/4, Fosc/8, Fosc/16, Fosc/32, Fosc/64, or Fosc/128
for ADC clock
➢ Fosc: speed of crystal frequency connected to AVR Chip
➢ ADC requires an input clock frequency less than 200 kHz
for the maximum accuracy.
Example
An AVR is connected to 8 MHz crystal oscillator.
Calculate the ADC frequency for:
(a) ADPS2:0 = 001 (b) ADPS2:0 = 100 (c) ADPS2:0 = 111
(a) ADPS2:0 = 001 (1 decimal) → ck/2 input activated
8 MHz / 2 = 4 MHz (>200 kHz and not valid)

(b) ADPS2:0 = 100 (4 decimal) → ck/8 input activated

8 MHz / 16 = 500 kHz (> 200 kHz and not valid)

(c) ADPS2:0 = 111 (7 decimal) → ck/128 input activated

8 MHz / 128= 62.5 kHz (a valid option since it is <200 kHz)
Sample-and-hold time in ADC
➢ Acquisition time: is a timing factor.
➢ After ADC channel is selected, ADC allows some time
for sample-and-hold capacitor to charge fully to input
voltage level present at channel.
➢ In AVR, first conversion takes 25 ADC clock cycles in
order to initialize the analog circuitry and pass the
sample-and-hold time.
➢ Then each consecutive conversion takes 13 ADC
clock cycles.
➢ If conversion time is not critical in application, use
ADPS2:0 = 111 to get maximum accuracy of ADC.
Signal conditioning
➢ transducers produce output in form of
voltage, current, charge, capacitance, and
resistance.
➢ to convert these signals to voltage, to send
input to an A/D converter. This conversion
(modification) commonly called signal
conditioning.
➢ conditioning can be current to voltage
conversion or signal amplification.
➢ For example, thermistor changes
resistance with temperature. The change of
resistance must be translated into voltages
to be of any use to ADC.
DAC INTERFACING
➢ Recall from your digital electronics course two methods
of creating a DAC: binary weighted and R/2R ladder.
➢ Majority of DACs use the R/2R method because it can
achieve a much higher degree of precision.
➢ The first criterion for judging a DAC is its resolution,
which is a function of the number of binary inputs. The
common ones are 8, 10, and 12 bits.
➢ The number of data bit inputs decides the resolution of
the DAC because the number of analog output levels is
equal to 2n, where n is the number of data bit inputs.
➢ Therefore, an 8-input DAC provides 256 discrete voltage
(or current) levels of output.
➢ 12-bit DAC provides 4096 discrete voltage levels
➢ 16-bit DACs, but they are more expensive.
DAC INTERFACING
➢ In the MC1408 (DAC0808), the digital inputs are converted
to current (Iout), and by connecting a resistor to the Iout
pin, we convert the result to voltage.
➢ The total current provided by the Iout pin is a function of
the binary numbers at the D0–D7 inputs of the DAC0808
and the reference current (Iref), and is as follows:

➢ D0: LSB, D7: MSB for inputs, and Iref is input current.
➢ Iref current is generally set to little mA (e.g., 2 mA).