Ultra Low-Power ANSI S1.11 Filter Bank For Digital Hearing Aids

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Ultra Low-Power ANSI S1.

11 Filter Bank for Digital Hearing Aids


Yu-Ting Kuo
VLSI Signal Processing Lab National Chiao Tung University, Taiwan 2009/01/20

Outline
Introduction Algorithm & architecture Implementation results Conclusions

Ultra Low-Power ANSI S1.11 Filter Bank for Digital Hearing Aids

Introduction
Digital hearing aid
Auditory compensation (main block)
Filter bank Dynamic range compression

ANSI S1.11 filter bank (standard 1/3-octave bands)


Popular in acoustic/speech applications
Well match the frequency analysis in human hearing systems

But high computation complexity (1,488-tap FIR filter required for a straightforward implementation)

So, we designed a low-power ANSI S1.11 filter bank to meet the stringent power constraints of hearing aids
Ultra Low-Power ANSI S1.11 Filter Bank for Digital Hearing Aids 3

Filter Bank Algorithm Design


Proposed multirate filter bank
ANSI S1.11 1/3-octave class-2 filters 22nd ~ 39th bands (~8980Hz) 24KHz sampling rate

F39 F38 F37 band39 band38 band37 F39


27-tap

F38
33-tap

band39 band38 band37

mux

demux

F37 D
41-tap

F22

Computation complexity

parallel filter bank

band22

1,148-tap

2
35-tap

band22

multirate filter bank

IIR Parallel # MPY # ADD # MPY # ADD 192 165 102 90

FIR 3,270 6,520 120 233

96% reduction

Multirate

Ultra Low-Power ANSI S1.11 Filter Bank for Digital Hearing Aids

Architecture Design
data paths control signals

Block diagram

sdi sdisel sdiclk clk rst

sdo sdosel sdoclk sdi sdisel sdiclk

system controller ctrl addr


16

ctrl f37 f38


16 16 16 16

input
16

wen
16 16

Low-power optimizations
Clock gating Selective coefficient negation Multi-VDD implementation

MAC f39 d

sdo sdosel sdoclk

original + clock-gating & negation +multi-VDD

94W 61W 61W 40 61W 18 (79W) 80

82W
(122W)

(176W total)

(SRAM)

Power (W) 120 160 200

Ultra Low-Power ANSI S1.11 Filter Bank for Digital Hearing Aids

Power domain VDD1 Power domain VDD2

Results
Silicon Implementation
TSMC 0.13m CMOS tech. Cell library from Artisan 6MHz clock frequency (for 24KHz sampling rate)
control & serial I/O memory (SRAM) MAC
Sub-modules MAC memory system controller memory controller serial I/O Gate count 2,847 5,594 1,010 301 1,103

Comparison
# bands [5] [6] [3] Proposed 7 8 16 18 Process (m) 0.70 0.18 0.35 0.13 VDD (V) 1.55 1.6 1.1 1.2/0.6
*

Power (W) 471 316 248 79

Pnormailzed* 7.49 16.05 6.85 4.39


1 # bands
2

Pnormalized

Ultra Low-Power ANSI S1.11 Filter Bank for Digital Hearing Aids

0.13 1.2 = Power Process V DD

Conclusions
An ultra low-power filter bank has been designed & implemented
ANSI S1.11 1/3-octave bands Class-2 filter specification 24KHz sampling rate

It is optimized for low power at the algorithmic, architectural, and circuit levels
96% multiplications saved with multirate algorithm 55% power saved with architectural/circuit level optimizations (from 176 to 79 W)

The proposed design is suitable for hearing aids


Only 27~64% power of other filter banks (more energy-efficient) The 1/3-octave bands match the human auditory characteristics

Ultra Low-Power ANSI S1.11 Filter Bank for Digital Hearing Aids

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