BANGLADESH UNIVERSITY OF ENGINEERING AND TECHNOLOGY

DEPARTMENT OF ELECTRICAL AND ELECTRONIC ENGINEERING

EEE 310 (July 2023)

Communication Systems I Laboratory

Final Project Report

Section: A2 Group: 04

Analog Signal Encoding using Delta Modulation

and Demodulation

Course Instructors:
Dr. Lutfa Akter, Professor
Shafin-Bin-Hamid, Lecturer

Signature of Instructor: ___________________________________________________

Academic Honesty Statement:

IMPORTANT! Please carefully read and sign the Academic Honesty Statement, below. Type the student
ID and name, and put your signature. You will not receive credit for this project experiment unless this
statement is signed in the presence of your lab instructor.
“In signing this statement, We hereby certify that the work on this project is our own and that we have not
copied the work of any other students (past or present), and cited all relevant sources while completing this project.
We understand that if we fail to honor this agreement, We will each receive a score of ZERO for this project and
be subject to failure of this course.”

Signature: ____________________________ Signature: ____________________________

Full Name: Rukaiya Habib Ullah Full Name: Sadman Samin Rahul
Student ID: 2006046 Student ID: 2006055

Signature: ____________________________ Signature: ____________________________

Full Name: Sumaiya Tabassum Anha Full Name: Mohammed Irtisam Sajin
Student ID: 2006056 Student ID: 2006057

Signature: ____________________________ Signature: ____________________________

Full Name: Asmaul Husna Pushpita Full Name: Habiba Akter
Student ID: 2006058 Student ID: 2006059
 Table of Contents
1. Abstract.......................................................................................................... 01
2. Introduction ................................................................................................... 01
3. Literature Review .......................................................................................... 02
4. Circuit Diagram ............................................................................................ 05
5. Circuit Design............................................................................................... 06
6. Simulation Model ......................................................................................... 09
7. Implementation & Data Collection .............................................................. 12
8. Design Considerations.................................................................................. 20
9. Limitation of Tools ....................................................................................... 20
10. Impact Assessment ..................................................................................... 21
11. Reflection on Individual and Team Work .................................................. 25
12. User Manual ............................................................................................... 28
13. Future Work ............................................................................................... 31
14. Cost Analysis .............................................................................................. 33
15. References .................................................................................................. 34

i
Abstract:
Engineers working in the field of Speech Coding have been actively searching
for methods to reduce the bandwidth consumed by quantized speech signals. By
quantizing the amplitude difference (delta) between two samples rather than the
total sample amplitude, the delta modulation approach decreases the
unnecessary bandwidth and requires fewer quantization levels to maintain the
same signal quality. The present study experimentally investigated the encoding
and decoding of an analog signal using delta modulation. During the encoding
process, the analog signal has been sampled, quantized, and encoded to convert
into a digital signal whereas the decoding process recovered the original signal.

Introduction:
Analog and digital signals have been transformed into one another's forms in
modern times. Multiple approaches have been developed for this objective; each
has advantages and disadvantages. Delta modulation is one method used to
transform analog signals into digital signals or vice versa.

Delta modulation was introduced by John R. Pierce, who also invented video
telephony and the FM radio in his 1949 paper “Some novel methods for
transmitting the information.” It is a technology that helps increase the speed of
communication up to V2V and V2I communication.

Delta Modulation is a version of differential pulse-code modulation (DPCM)

which is somehow the simplest version of it. By taking every sample and
encoding them all with PCM, pulse-code modulation increases the bandwidth of
the signal. Then, to solve the PCM issue mentioned above, the sample difference
is encoded in DPCM. The bandwidth is reduced by switching from PCM to
DPCM. The error function in DPCM is defined as the difference between two
successive samples; when the signal varies slowly between two consecutive
samples, this value is very small. Everything is the same since Delta Modulation,
a kind of DPCM, uses an error function with just two quantization levels. It
doesn’t focus on quality, and the data can be reduced to the size of a 1-bit data
stream. If we denote the quantization level as L and the number of bits in the
encoder as n, we may write

L=2n ……………………………………………………(1)
Since L equals 2 and n equals 1, delta modulation can explain a single-bit
encoder as either 0 or 1.

Bandwidth=nfs=fs [as n=1] ………………………….(2)

So, by reducing n, the BW is decreased to fs in this type of modulation.

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Literature Review:

A modulation technique that converts or encodes message signal into a binary

bit stream is known as Delta Modulation. Here only 1 bit is used to encode 1
voltage level thus, the technique allows transmission of only 1 bit per sample.

As PCM has the property of converting message signal directly into a sequence
of a binary coded pulse, this resultantly increases the bandwidth requirement of
the system. So, in order to remove the drawbacks of PCM, delta modulation is
used.

Operating Principle of Delta Modulation:

Delta modulation quantized the gap between the observed and previous steps
instead of the value of the input analog waveform.

The process of delta modulation compares the current sample value to the prior
sample value. The amplitude of the step signal will be raised or lowered based
on the difference. When the amplitude is raised, the signal is increased by one
step, resulting in bit 1. If the amplitude is lowered, the signal is reduced by one
step, resulting in bit 0.

Block Diagram Explanation of Delta Modulation:

Delta modulation employs oversampling to produce a high signal-to-noise ratio.
The transmitter circuit of a delta modulation system is made up of a Modulator,
Channel, and Demodulator.

Figure: Delta Modulation Block

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The integrator circuit has a Ts delay. The integrator’s output is a Ts-delayed
ramp approximation. The error signal is the difference between this ramp
approximation and the current sampling input signal.

This erroneous signal is sent into the sampler circuit, which is made up of a hard
limiter and an input-output relationship. The signal is sampled here into two
values, namely. The sampled output is unipolar and then it is converted to bipolar
signal to generate the appropriate Delta modulated wave.

Demodulation is performed in the receiver circuit using a low pass filter. The
modulated wave is then gone through a -60 dB low pass filter which is designed
with a certain cut off frequency (a bandwidth equal to the original signal
bandwidth) that directly reconstruct the input signal quite perfectly.

Advantage of Delta Modulation:

Some of its main advantages of delta modulation are as follows:

1. Delta modulation is a high-performance approach.

2. This modulation technique is utilized when extreme circuit simplicity is
critical, and the usage of a high bit rate is permissible.
3. This technology gets rid of the need for correcting circuits in radio
design and error identification.
4. The dynamic range is large because the different step size covers such a
variation.
5. Delta modulation is effective with narrower channel bandwidths.
6. There is no indication of granular or slope overload.
7. Slope error is reduced to a lesser degree.

Disadvantages of Delta Modulation:

Some drawbacks of delta modulation include:

1. Signals vary at a faster rate.

2. Granular or idle noise
3. Slope overload distortion

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Slope Overload Distortion

This distortion arises because of large dynamic range of the input signal.

Figure: Quantization Errors in Delta Modulation

We can observe from the given figure the rate of rise of input signal x(t) is so
high that the staircase signal cannot approximate it , the step size ‘Δ’ becomes
too small for staircase signal u(t) to follow the step segment of x(t).

Hence, there is a large error between the staircase approximated signal and
the original input signal x(t).

This error or noise is known as slope overload distortion.

To reduce this error, the step size must be increased when slope of signal x(t)
is high.

Granular or Idle Noise

Granular or Idle noise occurs when the step size is too large compared to small
variation in the input signal. This means that for very small variations in the
input signal, the staircase signal is changed by large amount (Δ) because of large
step size.

From the given figure we can see that when the input signal is almost flat, the
staircase signal u(t) keeps on oscillating by ±Δ around the signal. The error

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between the input and approximated signal is called granular noise. The
solution to this problem is to make the step size small.

Circuit Diagram:

Figure: Modulator Circuit Block Diagram

Figure: Demodulator Circuit Block Diagram

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Circuit Design:
• Modulator
o Comparator: For our comparator, we will be using an Op-Amp (IC
741). This would compare our input message signal to the feedback
signal coming from our integrator circuit.

o Sampler: The signal coming from our comparator is to be sampled

using a D-Flip Flop (IC 74HC74).
CLK D Qn Qn+1
0 0/1 0 0
0 0/1 1 1
1 0 0 0
1 0 1 0
1 1 0 1
1 1 1 1

Figure: IC 7474 Pin diagram and Truth Table

Here, Qn denotes the current output value and Qn+1 is the updated
output value. The given IC contains Dual Flip Flops embedded
inside. For our project, we need only one of the two. The Pins 1,4
and 14 are to be supplied with +5V DC supply and the Pin 7 is
grounded. The output of the comparator is supplied at Pin 2 as our
input for the IC. A clock pulse (about 10KHz) is supplied at Pin 3.
Based on the Truth table the output unipolar signal is generated at
Q (Pin 5) which is then sent to our next stage.
o Unipolar to Bipolar Converter: The unipolar signal coming from
the flip flop is converted into bipolar signal using an Op-Amp (IC
741). This bipolar signal is our desired modulator output.

o Integrator: The bipolar pulse is then to be sent to the integrator

circuit which is used to generate our reconstructed message signal.
We will be using an RC integrator. The bipolar signal is supplied
to the RC connected in series and the output of this integrator is
taking across the capacitor based on the following equation,
suitable R and C values are selected based on our desired input
signal.
1
𝑉𝑜 = ∫ 𝑉𝑖 𝑑𝑡
𝑅𝐶
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 o Clock Pulse: A 555 timer IC is to be used for generating the Clock
pulse. The frequency of our clock pulse would be around 10KHz
with duty cycle being less than 50%.

Figure: 555 Timer circuit design

Designing the timer circuit involves figuring out the values of
resistors and capacitors to achieve our desired frequency and duty
cycle. Since, we are aiming for a duty cycle less than 50%, a diode
D1 is added in parallel with R2. We choose C1 and C2 to be 0.1uF.
Next resistor values are chosen based on the following equations:

𝑇 = 0.7 ∗ (𝑅1 + 𝑅2) ∗ 𝐶1 ……….(i)

𝑡ℎ 𝑅1
𝐷𝑢𝑡𝑦 𝐶𝑦𝑐𝑙𝑒 = = ………..(ii)
𝑇 𝑅1+𝑅2

Here, for achieving a frequency of 10KHz, we take T=0.1ms and

Duty Cycle= 1/3. Thus, using the above equations, we obtain

R1 = 476.2Ω ≈ 500 Ω

R2 = 952.4Ω ≈ 1000 Ω
Approximating R1 and R2 to 500 Ω and 1000 Ω respectively, we
get the below design values for our clock pulse

R1 R2 C1 C2 T Frequency Duty Cycle

500 Ω 1000 Ω 0.1uF 0.1uF 0.105ms 9.523KHz 33.33%

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 • Demodulator:

For our demodulator circuit, a -60dB/decade Low Pass Filter is used.

Figure: -60dB/decade Low Pass filter

1. The cut-off frequency is set to be fc = 1KHz.

2. C3 is chosen to be 10nF.
3. C1 = C3 /2 and C2 = 2C3.
4. Using the equation

we obtain R = 15.92 Kohm, but for our implementation we used

R=15Kohm.
5. R1 =R2 =R3 =R
6. Rf1 = 2R and Rf2 = R

Using approximation for R, the final obtained cut-off frequency is

1.06KHz.

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Simulation Model:
PSpice has been used to simulate our circuit based on the designs mentioned in
the previous section. The input message signal is a sinusoidal signal having
1KHz frequency. The schematics and the necessary plots have been presented
below:

Figure: Schematic Diagram

5.0V

2.5V

0V
8.0ms 8.1ms 8.2ms 8.3ms 8.4ms 8.5ms 8.6ms 8.7ms 8.8ms 8.9ms 9.0ms
V(clock)
Time

Figure: Clock signal (T=0.1ms and Duty cycle=33.33%)

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 5.0V

0V

-5.0V
8.0ms 8.5ms 9.0ms 9.5ms 10.0ms 10.5ms 11.0ms 11.5ms 12.0ms
V(input) V(error) V(feedback)
Time

Figure: Input, feedback and comparator (error) output signals

4.0V

0V

-4.0V
8.0ms 8.5ms 9.0ms 9.5ms 10.0ms 10.5ms 11.0ms 11.5ms 12.0ms
V(input) V(pulse) V(feedback)
Time

Figure: Input, feedback and Flip Flop (pulse) output signals

5.0V

0V

-5.0V
8.0ms 8.5ms 9.0ms 9.5ms 10.0ms 10.5ms 11.0ms 11.5ms 12.0ms
V(input) V(out) V(feedback)
Time

Figure: Input, reconstructed and final modulator output signals

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 2.0V

0V

-2.0V
8.0ms 8.5ms 9.0ms 9.5ms 10.0ms 10.5ms 11.0ms 11.5ms 12.0ms
V(input) V(dem_out)
Time

Figure: Input signal and final demodulator output reconstructed signal

The obtained plots are very close to our desired outcomes. The final demodulator
output is a sinusoidal signal having some higher frequency components and a
phase shift from the original input message signal. This can be further improved
in the future using better filter design techniques. Since our simulation model
showed expected results, we moved onto the hardware implementation of our
project.

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Implementation & Data Collection

Description:
The whole project contains a modulator & a demodulator part for converting the
analog signal to digital and digital to analog form. In this way, the main message
signal is transmitted.
In the modulator part, an analog message signal is given as an input and a pulse
is generated throughout the process which is the modulated signal. To
accomplish different blocks, many essential components are used including IC
741, 555 Timer, IC 74HC74. Firstly, as we need to compare the present sampled
value with the previous sampled value, we have used an op-amp based
comparator. The output signal of the comparator which can be denoted as an
error signal, needs to be sampled and so it is sent to pin no 2 of D-Flip Flop (IC
74HC74). Another input of this D- Flip Flop is a clock which was generated
using a 555 Timer which had a 33% duty cycle & around 10kHz frequency. The
output is pin 5 of D-flip flop which is a pulse with two levels: 5V & 0V. This is
a unipolar signal that is to be converted to a bipolar signal with a peak-to-peak
voltage of 10V using another 741 Op-amp. This Op-amp’s noninverting pin gets
the output of D-flip flop and inverting pin gets +2.5V using voltage divider
across the resistor. The Op-amp then generates a bipolar signal having levels
+5V and -5V which is our desired Delta modulated signal. After that, this pulse
is sent to RC integrator which generates a delayed version of the output
modulated signal. This is then sent to the initial comparator where the two
signals are compared, generating an error signal.
In the demodulator part, the input is the delta modulated signal. The original
message signal is reconstructed after it passes through a -60dB low pass filter.
The LPF is designed with a cutoff frequency of 1kHz and so other high
frequency components are eliminated.

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 Figure: Hardware Implementation of the Entire Project

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Data Collection:
Clock for Sampling:
Our target was to generate a clock of around 10kHz frequency & 33.33% duty
cycle.
From the oscilloscope plot,
Time period of the pulse, T = 0.104ms
Frequency of the pulse, f = 1/T = 9.615KHz

Figure: Timer Output

Delta Modulator Output:

The following plot is the delta modulated output of the input sinusoidal signal
along with the input signal. The input wave was a 4V peak to peak signal with
1kHz frequency. The delta modulated waveform was a pulse with 6V peak to
peak voltage and the pulse width was not uniform at each point

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 Figure: Delta Modulated Signal along with Input signal

Integrator Output:
A pulse is sent into the integrator block which is an RC integrator and after
integrating, a triangular signal is produced. It is mainly generating a delayed
version of the modulated signal which is then sent to the comparator. At the peak
of the input signal, we observed small variation in the input wave. So, the ripples
were present at this part which represented granular noise.

Figure: Integrated Output along with Input Signal

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Comparator Output:
The comparator block compares the input signal & previous output signal.
From the oscilloscope plot, when the value of the message signal is higher than
the previous output signal, the comparator output is almost 5V and when the
value of the message signal is lower than the previous output signal, the
comparator gives an output of -2V. It matched with the simulated result.

Figure: Error Signal along with Input Signal

D-Flip Flop Output:

D-Flip Flop was designed such that when the output is high, it will give 5V and
when the output is low, it will give 0V. The same behavior was seen in the plot.

Figure: D-Flip Flop Output along with Input Signal

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Demodulated Output:
We were able to reconstruct the original input signal after the delta modulated
signal passed through the low pass filter. However, as can be seen, the
reconstruction was not perfect. The presence of harmonic components resulted
in noticeable distortions in the final demodulated signal. Its amplitude was also
reduced and there was a slight phase shift.

Figure: Reconstructed Signal along with Input Signal

Slope Overload Noise:

To observe the slope overload noise, we increased the amplitude of the input
signal to 15V peak to peak. Then we noticed high distortion in the reconstructed
signal. The integrator’s output was unable to precisely follow the message
signal.

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 Figure: Reconstructed Signal along with Input Signal
when Slope Overload

Figure: Integrator Output along with Input Signal

when Slope Overload

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Granular Noise:
To observe granular noise, we decreased the main signal amplitude to 100mV
peak to peak. The waveform spreads as the slope decreases. Hence the
reconstruction was not perfect and showed significant amount of noise.

Figure: Reconstructed Signal along with Input Signal

when Granular Noise

Analysis:
The most difficult part was to design the integrator as it had a significant role in
generating the previous value of the output modulated signal. An RC integrator
was used with a 1kHz resistor and a 0.1uF capacitor. The simulation showed an
optimum result so as the hardware. Another important part was the amplitude
and frequency of the message signal. If the amplitude & frequency of the
message signal was increased significantly, the reconstruction showed
discrepancies. As the low pass filter of the demodulator part was designed with
a cutoff frequency of 1kHz, increasing the input frequency will exceed this limit
and we won’t get our intended output. The final demodulated output showed
some unexpected noise which did not fully match with our simulations.

Results:
We ran simulations and examined each and every plot prior to putting the
hardware into place. The outcomes of our experiments and the simulations were
nearly identical. We can reduce the errors by improving the integrator and
making better implementation for the demodulator.

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Design Considerations:
Design Considerations for Public Health and Safety
When developing a hardware project, it's essential to prioritize public health and
safety considerations to ensure the safe operation of the system. We took
necessary design considerations in account for mitigating potential risks and
ensuring compliance with relevant safety standards.

Adhering to electrical safety standards is paramount to prevent risks such as

electric shock, fire hazards, and equipment damage. This involves implementing
proper insulation, grounding, and overcurrent protection mechanisms in the
hardware design. We tried to properly maintain these electrical safety standards
while developing the project.

By addressing these design considerations for public health and safety, we tried
to ensure that our hardware project involving delta modulation and
demodulation is not only technically sound but also safe for users and compliant
with regulatory requirements.

Design Considerations for the Environment

When developing any hardware project, it's important to consider the
environmental impact of the system to minimize potential harm to the
surroundings and promote sustainability.

Designing the hardware for optimal energy efficiency helps reduce power
consumption during operation, minimizing the environmental footprint and
lowering energy costs. In out project, we tried to utilize as less resources as
possible, preferred low-power components, and optimizing algorithms for
energy efficiency.

Limitations of Tools:
While implementing the project on delta modulation and demodulation, we have
faced various limitations associated with the tools and techniques used in the
implementation of this project.

Nonlinear Distortions: Nonlinearities in the delta modulation process, such as

slope overload distortion and granular noise distortion, can introduce signal
distortions that degrade performance. Mitigating nonlinear distortions often
requires additional signal processing techniques such as adaptive delta

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modulation, which we could not add in our project due to lack of resources and
development time.

Less availability of lab instruments: During the implementation of our project,

we had to go to the lab a couple of times to build and test our designed circuits.
Sometimes, we could not manage to get a free table in the lab. Also sometimes
after constructing the circuit, we found out that a particular wire, or a particular
instrument was not working properly, and hence, our circuit was not giving the
desired results. It cost us a lot of time figuring out what was wrong with the
circuit.

Acknowledging these limitations is essential for making informed decisions

regarding the suitability of delta modulation and demodulation for specific
applications and for implementing appropriate strategies to mitigate their impact
on system performance.

Impact Assessment
1)Assessment of Societal and Cultural Issues
As a modulation technique, delta modulation may have consequences in
different social and cultural contexts. The following are some things to think
about in terms of sociological and cultural aspects:

Audio and Video Quality Expectations

• Societal Impact: Delta modulation may encounter difficulties in

situations where high-quality audio and video reproduction are desired.
In applications such as multimedia communication, broadcasting, and
entertainment, modulation may be less acceptable if it results in
noticeable distortions or lowers the quality of the signal.

• Cultural Impact: If delta modulation doesn't live up to the high

standards of authenticity that certain cultures hold for the clear and
correct depiction of audiovisual content, they might oppose its use.

Education and Training

• Societal Impact: When implementing delta modulation in

communication systems, operators and technicians might need to
receive training. One aspect of the social impact is the requirement for

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 educational programs to guarantee professionals have the necessary
skills to manage and troubleshoot systems that use delta modulation.

• Cultural Impact: Acceptance and successful adoption of new

technology can be influenced by cultural perspectives on learning and
skill development. Societies that place a high emphasis on lifelong
learning might be better equipped to accommodate the delta modulation
training requirements.

Consumer Electronics

• Societal Impact: The design and operation of consumer electronics

may be affected by delta modulation. This modulation technique may
not be well received if compatibility problems occur with current
devices or if modifications are needed.

• Cultural Impact: Products that use delta modulation may not be well
received on the market depending on consumer preferences and cultural
views regarding technology. It's critical that the technology be easily
integrated with current cultural norms and usage patterns.

2)Assessment of Health and Safety Issues

As a communication modulation technique, delta modulation does not directly
endanger people's health or safety. However, health and safety issues may arise
during the implementation and operation of any communication system,
including ones that use delta modulation. The following are some broad health
and safety guidelines:

Health Impacts

• Electromagnetic Radiation: Electromagnetic fields are produced

during signal transmission, particularly signals modified with delta
modulation. Prolonged exposure to high-frequency electromagnetic
radiation has raised health concerns, even though the levels are usually
modest and regulated. To reduce potential health concerns, it is
essential to ensure compliance with applicable safety standards and
laws.

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 • Human-Machine Interaction: Human-machine interaction can be
influenced by the layout and user interface of devices that use delta
modulation. User tiredness, eyestrain, and other health problems may
be exacerbated by poorly designed interfaces. These dangers can be
reduced through interface design that takes ergonomics into account.

Safety Impacts

• Safety Concerns: In communication systems, including those

employing delta modulation, security concerns can indirectly impact
safety. Unauthorized access or interference with the communication
system could have safety implications, particularly in critical
applications such as healthcare, emergency services, or transportation.

• Power Consumption: Power consumption must be considered,

particularly for systems that must run continuously. High-power
gadgets produce heat, and insufficient cooling systems can lead to
overheating and possible fire hazards, among other safety risks. To
solve these issues, proper design and thermal management are crucial.

3)Assessment of Legal Issues

• Intellectual Property Rights: Intellectual property rights like patents,

copyrights, or trade secrets may apply to delta modulation algorithms,
hardware designs, and related technologies. Using delta modulation
without the right permission from the owner of the intellectual property
may result in legal issues.

• Contracts and Agreements: Contracts and agreements may be made

between organizations and different stakeholders while developing,
deploying, or using delta modulation systems. It is essential to make sure
that all the legal aspects of these contracts—including those about
warranties, responsibilities, and intellectual property—are upheld.

• Security and Cybersecurity: Legal issues related to cybersecurity and

the protection of communication systems from unauthorized access or
cyber threats may be relevant. Compliance with cybersecurity
regulations and standards is essential to mitigate legal risks.

• Spectrum Allocation and Licensing: Government agencies frequently

control the usage of specific frequency bands for communication.
Communication systems, including those using delta modulation, must

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 abide by the legal requirements of obtaining the necessary licenses for
spectrum usage and maintaining adherence to designated frequencies.

4) Sustainability and Environmental Impact Evaluation

• Energy Consumption: The entire environmental footprint of delta

modulation systems can be influenced by the energy efficiency of the
hardware and infrastructure that supports them. As fewer energy
resources are used and greenhouse gas emissions are decreased, lower
energy consumption promotes sustainability.

• Manufacturing Processes: The materials and manufacturing

processes used in the production of hardware components for delta
modulation systems can have environmental consequences. Evaluating
the environmental impact of manufacturing, including resource
extraction, energy use, and waste generation, is essential for
sustainability assessments.
• Life Cycle Assessment (LCA): A thorough examination of delta
modulation systems' environmental impact can be obtained by
performing a life cycle evaluation. This evaluation considers the
consequences on the environment at every stage, including the
extraction of raw materials and their manufacture, usage, and disposal.

• Sustainable Development Goals (SDGs): A framework for evaluating

the effects on the environment and society can be obtained by analyzing
how the application of delta modulation fits with international
sustainability goals, such as the Sustainable Development Goals
(SDGs) of the United Nations.

• Eco-Friendly Innovations: Adopting environmentally friendly

advances in delta modulation technologies, like using recyclable
materials, energy-efficient components, or alternative energy sources,
can have a positive impact on sustainability.

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Reflection on Individual and Team work:

Individual Contributions

Contribution
Student ID

Timer Circuit Design, timer hardware implementation, modulator

2006046
hardware implementation

Timer Circuit Design, timer hardware implementation, Simulation

2006055
Model

Circuit Block design, Demodulator Circuit Design, Modulator

2006056
circuit hardware implementation

Sampler Design, Timer hardware implementation, Simulation

2006057
model

Demodulator Circuit Design, Modulator hardware implementation,

2006058
Simulation Model

Sampler Design, Modulator hardware implementation,

2006059
Demodulator implementation

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Log Book of Project Implementation

Date Event Individual Role Team Role

(using last two digits of
Student ID)

30/11/23 Declaration of The team started

submission date for looking for project
project Proposal ideas

06/12/23 Initial Project ideas 56 and 57 presented The team started

two different project looking into the project
ideas ideas in depth

01/01/24 Selected the project 46, 55, 56, 57, 58, 59 The entire team
idea and prepared the all were present while conducted an online
project proposal preparing the proposal meeting for choosing
the project and
preparing the final
proposal

09/01/24 Presentation on project 57 presented the

proposal project idea to the
course teacher

10/01/24 Started designing the 46, 56 and 59 The team started

circuit presented resources for looking into the circuit
the circuit designs

10/01/24 Modulator circuit 56 presented a block The task of designing

block diagram for the specific parts of the
modulator circuit circuit was distributed
among the members

11/01/24 Circuit design for the 46, 55 presented a The designs were
modulator part design for the timer analyzed by the team
circuit

57,59 presented a
design for the flip flop

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 14/01/24 Early-stage simulation 58 prepared an initial The simulation model
model simulation model was discussed and
based on the modulator analyzed by the team.
circuit design methods There were issues with
using Proteus outcomes of the model
which needed further
study

15/01/24 Final simulation model 57 presented the final The simulation model
simulation model using was discussed and
PSpice analyzed by the team

16/01/24 Presented the The team presented the

Simulation model to simulation model and
the course teacher the outcomes to the
course teacher and
took note of the
feedback

24/01/24 Demodulator circuit 56,58 provided the The design and the
design and simulations design for the simulation model were
demodulator circuit analyzed by the team

55,57 made the

simulation of the entire
circuit

28/01/24 Initial hardware 46,55,57 implemented The team made the

implementation of the the timer circuit initial hardware
modulator circuit implementation of the
56,58,59 implemented modulator part,
the comparator, observed and analyzed
sampler and integrator the outputs
of the modulator
circuit

20/02/24 Final hardware 46, 58 implemented the The team made the
implementation modulator circuit final hardware
implementation of the
55, 57 implemented the entire circuit and took
timer circuit the necessary plot for
the final project report
56,59 implemented the
demodulator circuit

24/02/24 Final Project Report The final project report

was prepared by the
entire team

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User manual:
This project can be divided into two parts:
• Modulator:
1. Comparator
2. Sampler
3. Unipolar to bipolar converter
4. Integrator
5. Clock pulse
• Demodulator:
1. -60db low pass filter
Step by step guideline for the formulation of modulator circuit:
1.Comparator: An op-amp (IC 741) has been used as a comparator.
Connect terminal 3 of the op-amp to the signal generator and terminal 2 with the
output of the integrator circuit. Use +5V and -5V as the biasing of the op-amp
from a variable dc source, which should be connected with the terminal 7 and 4
of the op-amp.
The error voltage can be observed at terminal 6.
2.Sampler: D-Flip Flop (IC 74HC74) works as a sampler here. There is total 14
terminals on D-Flip Flop. Connect Pins 1,4 and 14 are to be supplied with +5V
DC supply and the Pin 7 is grounded. Connect output of the comparator is
supplied at Pin 2 as our input for the IC. A clock pulse (about 10KHz) is supplied
at Pin 3.
Unipolar signal is generated at Q (Pin 5) which is then sent to our next stage.

Figure: Pins of D-flip flop

3.Unipolar to bipolar converter: Connect Pin 5 of the D-Flip Flop with the
terminal 3 of the 2nd op-amp. Terminal 2 of the op-amp is to be connected with
2 resistors having resistance of 1k.5V dc supply is to be given with the 7 and 4
terminal for biasing. After connecting the 3 parts the circuit diagram would be:
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 Fig: Connection diagram of comparator, D-flip flop and Unipolar to bipolar
converter
Connect Terminal 6 of the op-amp with the integrator.
4.Integrator: Integrator circuit consists of 1k resistor and 0.1uF capacitor.
Connect one terminal of the resistor with the terminal 6 of the 2 nd op-amp and
other end with one terminal of the capacitor and connect this common point with
the 2nd terminal of the comparator. 2nd terminal of the capacitor is to be connected
with the ground.
5.Clock pulse: Connect the 555 timer IC according to the figure below which
generates clock pulse for sampling, having sampling frequency around 10Khz
and duty cycle 33.3%. Take the value of resistors and capacitor:
R1=500 Ohm, R2=1000 Ohm
C1=C2=0.1uF, Diode (IN4007)

Fig: Clock pulse connection

Connect terminal 3 of the clock pulse with the D-flip flop with terminal 3.
Summed up modulator schematic diagram is given below:

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 Fig: Schematic diagram of modulator circuit

Step by step guideline for the formation of demodulator circuit:

1.-60 db low pass filter: Connect the demodulator circuit as shown in the figure
below:

Fig: Schematic diagram of the demodulator circuit

Take resistors Rof2=R1=R2=R3=15k ohm and Rof1=30kohm, C3=10nF,

C1=5nF and C2=20nF. Connect them as given figure and the 2nd terminal of the
R1 resister is to be connected with the terminal 6 of the 2 nd op-amp of the
modulator circuit. To see the output connect oscillator channel 1 with the input
and channel 2 with the output which is 1k resistor Rout in the given diagram.

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Future work:
In the project of delta modulation and demodulation there are some limitations
on which more work or research could be done further. Such as the demodulator
circuit has a cut off frequency of 1khz. So, it cannot reconstruct a signal having
frequency other than 1kHz. Further work can be done on this .The circuit is not
adaptive so it cannot avoid granular or slope overloading noise by changing its
step size. Predictor circuit can be used which will increase or decrease the step
size according to the signal to make less error. Future works on delta modulation
could focus on overcoming these limitations and improving its performance.
Here are some potential areas for future research:
1. Quantization Noise Reduction: Delta modulation suffers from high
quantization noise, especially at low signal-to-noise ratios. Future work could
explore advanced quantization techniques or noise shaping methods to
reduce the impact of quantization noise.
2. Adaptive Delta Modulation: Developing adaptive delta modulation
schemes that can adjust their parameters based on the characteristics of the
input signal. Adaptive algorithms could improve performance in varying
signal conditions and provide better compression in regions of the signal with
low variability.
3. Multirate Delta Modulation: Investigating multirate delta modulation
techniques that adapt the sampling rate based on the characteristics of the
input signal. Variable or adaptive sampling rates could be employed to
improve the coding efficiency for signals with different frequency
components.
4. Predictive Delta Modulation: Integrating predictive techniques to estimate
future samples and improve the predictive accuracy of delta modulation.
Predictive delta modulation can potentially reduce the quantization error by
predicting the next sample based on the previous samples.

5. Nonlinear Delta Modulation: Investigating nonlinear delta modulation

techniques that introduce nonlinearity in the coding process. Nonlinear delta
modulation might be able to provide better performance in capturing signal
dynamics and reducing distortion.
6. Energy-Efficient Implementations: Focusing on developing energy-efficient
implementations of delta modulation for applications where power consumption
is critical. This could involve optimizing hardware architectures or exploring
low-power algorithms.
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7. Robustness to Channel Errors: Designing delta modulation schemes that
are more robust to channel errors or variations. This is particularly relevant
for applications where the transmitted signal may be subject to channel
distortions or noise.
8. Applications in Emerging Technologies: Exploring the applicability of
delta modulation in emerging technologies such as Internet of Things (IoT),
wireless sensor networks, and edge computing. Adapting delta modulation to
the requirements of these new technologies may open up new possibilities
and use cases.
9. Machine Learning Integration: Investigating the integration of machine
learning techniques to enhance the performance of delta modulation.
Machine learning algorithms could potentially adapt the delta modulation
parameters based on the characteristics of the input signals, leading to
improved coding efficiency.

These future directions aim to address the limitations of delta modulation and
enhance its capabilities for various applications in the evolving field of digital
signal processing.

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Cost Analysis:

Component Quantity Unit Price (BDT) Total Price (BDT)

Breadboard 3 159 477

Jumper Wire
2 100 200
(40pc set)

IC 74HC74 1 40 40

IC 555 1 14 14

Op-amp (IC 741) 4 20 80

Diode (1N4007) 1 4 4

Resistor (1K) 7 5 35

Resistor (10K) 15 5 75

Capacitor (0.1u) 3 6 18

Capacitor (10n) 5 15 75

Total cost 1018

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References:
1. “What is slope overload distortion and granular noise in delta
modulation and how it is removed in adaptive delta modulation” -
https://electronicspost.com/what-is-slope-overload-distortion-and-
granular-noise-in-delta-modulation-and-how-it-is-removed-in-adm/

2. “Delta Modulation: Learn Definition, Block Diagram, Principle,

Adaptive Delta Modulation” - https://testbook.com/physics/delta-
modulation#:~:text=The%20process%20of%20delta%20modulation,ste
p%2C%20resulting%20in%20bit%201

3. “Understanding Delta Modulation” - https://hardwarebee.com/delta-

modulation/

4. “Practical Approach of Producing Delta Modulation and Demodulation”

- https://www.iosrjournals.org/iosr-
jece/papers/Vol.%2011%20Issue%203/Version-2/M1103028794.pdf

5. “Delta modulation and demodulation : Theory and Applications” -

https://www.tescaglobal.com/blog/delta-modulation-demodulation/

6. “Modern Digital and Analog Communication Systems” - B. P. Lathi &

Zhi Ding

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