Unit-3

Introduction

In our previous sections, we learned about combinational circuit and their

working. The combinational circuits have set of outputs, which depends
only on the present combination of inputs. Below is the block diagram of
the synchronous logic circuit.

The sequential circuit is a special type of circuit that has a series of inputs
and outputs. The outputs of the sequential circuits depend on both the
combination of present inputs and previous outputs. The previous output
is treated as the present state. So, the sequential circuit contains the
combinational circuit and its memory storage elements. A sequential
circuit doesn't need to always contain a combinational circuit. So, the
sequential circuit can contain only the memory element.

Difference between the combinational circuits and sequential

circuits are given below:

Combinational Circuits Sequential Circuits

1) The outputs of the The outputs of the sequential

combinational circuit depend circuits depend on both present
only on the present inputs. inputs and present state
(previous output).
2) The feedback path is not The feedback path is present in
present in the combinational the sequential circuits.
circuit.

3) In combinational circuits, In the sequential circuit,

memory elements are not memory elements play an
required. important role and require.

4) The clock signal is not The clock signal is required for

required for combinational sequential circuits.
circuits.

5) The combinational circuit is It is not simple to design a

simple to design. sequential circuit.

Types of Sequential Circuits

Asynchronous sequential circuits

The clock signals are not used by the Asynchronous sequential

circuits. The asynchronous circuit is operated through the pulses. So, the
changes in the input can change the state of the circuit. The
asynchronous circuits do not use clock pulses. The internal state is
changed when the input variable is changed. The un-clocked flip-flops or
time-delayed are the memory elements of asynchronous sequential
circuits. The asynchronous sequential circuit is similar to the
combinational circuits with feedback.

Synchronous sequential circuits

In synchronous sequential circuits, synchronization of the memory

element's state is done by the clock signal. The output is stored in either
flip-flops or latches (memory devices). The synchronization of the outputs
is done with either only negative edges of the clock signal or only positive
edges.

Clock Signal and Triggering

Clock signal

A clock signal is a periodic signal in which ON time and OFF time need not
be the same. When ON time and OFF time of the clock signal are the
same, a square wave is used to represent the clock signal. Below is a
diagram which represents the clock signal:
A clock signal is considered as the square wave. Sometimes, the signal
stays at logic, either high 5V or low 0V, to an equal amount of time. It
repeats with a certain time period, which will be equal to twice the 'ON
time' or 'OFF time'.

Types of Triggering

These are two types of triggering in sequential circuits:

Level triggering

The logic High and logic Low are the two levels in the clock signal. In level
triggering, when the clock pulse is at a particular level, only then the
circuit is activated. There are the following types of level triggering:

Positive level triggering

In a positive level triggering, the signal with Logic High occurs. So, in this
triggering, the circuit is operated with such type of clock signal. Below is
the diagram of positive level triggering:

Negative level triggering

In negative level triggering, the signal with Logic Low occurs. So, in this
triggering, the circuit is operated with such type of clock signal. Below is
the diagram of Negative level triggering:
Edge triggering

In clock signal of edge triggering, two types of transitions occur, i.e.,

transition either from Logic Low to Logic High or Logic High to Logic Low.

Based on the transitions of the clock signal, there are the following types
of edge triggering:

Positive edge triggering

The transition from Logic Low to Logic High occurs in the clock signal of
positive edge triggering. So, in positive edge triggering, the circuit is
operated with such type of clock signal. The diagram of positive edge
triggering is given below.

Negative edge triggering

The transition from Logic High to Logic low occurs in the clock signal of
negative edge triggering. So, in negative edge triggering, the circuit is
operated with such type of clock signal. The diagram of negative edge
triggering is given below.

Basics of Flip Flop

A circuit that has two stable states is treated as a flip flop. These stable
states are used to store binary data that can be changed by applying
varying inputs. The flip flops are the fundamental building blocks of the
digital system. Flip flops and latches are examples of data storage
elements. In the sequential logical circuit, the flip flop is the basic storage
element. The latches and flip flops are the basic storage elements but
different in working. There are the following types of flip flops:

Types of Flip-Flops

 S-R Flip-Flop
 J-K Flip-Flop
 D Flip-Flop
 T Flip-Flop

S-R Flip-Flop

This is the simplest flip-flop circuit. It has a set input (S) and a reset input
(R). When in this circuit when S is set as active, the output Q would be
high and the Q' will be low. If R is set to active then the output Q is low
and the Q' is high. Once the outputs are established, the results of the
circuit are maintained until S or R get changed, or the power is turned off.
Truth Table of S-R Flip-Flop

S R Q State

0 0 0 No Change

0 1 0 Reset

1 0 1 Set

1 1 X

Characteristics Table of S-R Flip-Flop

S R Q(t) Q(t+1)

0 0 0 0

0 0 1 1

0 1 0 0

0 1 1 0

1 0 0 1

1 0 1 1

1 1 0 X

1 1 1 X

Characteristics Equation of S-R Flip-Flop

Q (t+1) =S+R′Q (t) Q (t+1) =S+R′Q (t)
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J-K Flip-Flop

Because of the invalid state corresponding to S=R=1 in the SR flip-flop,

there is a need of another flip-flop. The JK flip-flop operates with only
positive or negative clock transitions. The operation of the JK flip-flop is
similar to the SR flip-flop. When the input J and K are different then the
output Q takes the value of J at the next clock edge.

When J and K both are low then NO change occurs at the output. If both J
and K are high, then at the clock edge, the output will toggle from one
state to the other.

Truth Table of JK Flip-Flop

J K Q State

0 0 0 No Change

0 1 0 Reset

1 0 1 Set

1 1 Toggles Toggle
Characteristics Table of JK Flip-Flop
J K Q(t) Q(t+1)

0 0 0 0

0 0 1 1

0 1 0 0

0 1 1 0

1 0 0 1

1 0 1 1

1 1 0 1

1 1 1 0

Characteristics Equation of JK Flip-Flop

Q(t+1)=jk Q(t)′+K′Q(t)Q(t+1)=jk Q(t)′+K′Q(t)

D Flip-Flop

In a D flip-flop, the output can only be changed at positive or negative

clock transitions, and when the inputs changed at other times, the output
will remain unaffected. The D flip-flops are generally used for shift-
registers and counters. The change in output state of D flip-flop depends
upon the active transition of clock. The output (Q) is same as input and
changes only at active transition of clock
Truth Table of D Flip-Flop

D Q

0 0

1 1

Characteristics Equation of D Flip-Flops

Q (t+1) =DQ (t+1) =D

T Flip-Flop

A T flip-flop (Toggle Flip-flop) is a simplified version of JK flip-flop. The T

flop is obtained by connecting the J and K inputs together. The flip-flop
has one input terminal and clock input. These flip-flops are said to be T
flip-flops because of their ability to toggle the input state. Toggle flip-flops
are mostly used in counters.
Truth Table of T Flip-Flop

T Q(t) Q(t+1)

0 0 0

0 1 1

1 0 1

1 1 0

Characteristics Equation of T Flip-Flop

Q (t+1) =T′Q (t) +TQ (t) ′=T⊕Q (t)