Iec61850 Standard in Distribution Busbar Protection Schemes
Iec61850 Standard in Distribution Busbar Protection Schemes
by
Bellville campus
DECLARATION
I, Mkhululi Elvis Siyanda Mnguni, declare that the contents of this dissertation/thesis
represent my own unaided work, and that the dissertation/thesis has not previously
been submitted for academic examination towards any qualification. Furthermore, it
represents my own opinions and not necessarily those of the Cape Peninsula
University of Technology.
Signed Date
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ABSTRACT
Busbars are the most important components in the distribution networks. Faults on
the busbar are uncommon, however an occurrence of a busbar fault can lead to a
major loss of power. Busbars are the areas in a substation where the levels of current
are high and therefore the protective relay application is very critical. In order for the
protection scheme to be successful it is important to carry out the following
specifications: Selectivity, Stability, Sensitivity, and Speed. To meet all of the above
requirements protection must be reliable, meaning that the protection scheme must
trip when called up to do so (dependability) and it must not trip when it’s not
supposed to (security).
The thesis focuses on the reverse blocking busbar protection scheme with aim to
improve the speed of its operation and at the same time to increase operational
reliability, flexibility and stability of the protection during external and internal faults by
implementation of the extended functionality provided by the IEC61850 standard-
based protective IEDs. The practical implementation of the scheme by the use of IEC
61850 standard communication protocol is investigated. The research analyzes in
detail the reverse blocking busbar protection scheme that is used at the moment in
the power systems and it develops an improved IEC 61850 based reverse blocking
busbar protection scheme for a distribution network. The proposed scheme is
designed for a radial type of a distribution network and is modeled and simulated in
the DigSILENT software environment for various faults on the busbar and its outgoing
feeders. The results from the simulations are used further for implementation of the
designed protection scheme.
A laboratory test bench is build using three compliant with the IEC 61850 standard
ABB IEDs 670 series, CMC 356 Omicron test injection device, PC, MOXA switch, and
a DC power supplier. Two ways of the reverse blocking signals between the IEDs
implementation are considered: hard wired and Ethernet communication by using IEC
61850 standard GOOSE messages.
Comparative experimental study of the operational trip response speed of the two
implementation shows that the performance of the protection scheme for the case of
Ethernet communication is better
The thesis findings and deliverables will be used for postgraduate studies of other
students, research, short courses, and solution of industrial problems.
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ACKNOWLEDGEMENTS
I wish to thank:
To my living GOD for the strength and power invested in me, without him I am nothing
Professor R. Tzoneva, (Head of the Centre for Substation Automation and Energy
Management System- CSAEMS) (my supervisor) for her unconditional support all
these years
Professor P. Petev (my co- supervisor)
Professor Alexander Apostolov (PAC World magazine) (supporting me)
Mr Patrick Cost (ABB Technical Support)
All my colleagues at CSAEMS for the support
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DEDICATION
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Table of Contents
DECLARATION .................................................................................................................................. II
ACKNOWLEDGEMENTS ................................................................................................................. IV
DEDICATION ....................................................................................................................................... V
vi
1.7 Sub-Problems ...................................................................................................................................... 8
1.7.1 Design and implementation of a work station....................................................................................... 8
1.7.2 Development a model for the reverse blocking scheme for busbar protection .................................... 9
1.7.3 Improved busbar protection scheme analysis in DigSILENT environment ............................................ 9
1.7.4 Investigation of the reliability of the reverse blocking scheme for busbar protection.......................... 9
1.7.5 Development of methods for relay setting and calculation .................................................................. 9
1.7.6 Fault analysis .......................................................................................................................................... 9
1.7.7 Real- time implementation on using different software and hardware platforms ............................... 9
1.7.8 Comparison between two busbar protection schemes builds with relays from different generation 10
vii
2.1 Introduction .......................................................................................................................................17
viii
2.11 Conclusion ..........................................................................................................................................55
ix
4.2 Distribution network modelling .........................................................................................................71
4.2.1 Selected distribution network in one line diagram .............................................................................. 71
4.2.2 Preparation of Data for calculation of the load flow in DIgSILENT ...................................................... 72
5.6 The application of the IEC 61850 standard on ABB’s new IED 670 (Intelligent Electronic Device) ...136
5.6.1 IEC 61850 requirements for the ABB IED 670 series .......................................................................... 136
5.6.1.1 Computing and memory capacity ............................................................................................. 136
5.6.1.2 Communication facilities ........................................................................................................... 136
5.6.2 Ethernet link communication interface for ABB IED 670 series ......................................................... 137
5.6.3 Use of the IEC 61850-8-1 part standard protocol for peer to peer communication ......................... 137
5.7 Protection, control and monitoring functions for the ABB IED 670 series .........................................138
5.7.1 Substation Configuration Language ................................................................................................... 138
5.7.2 The principal structure of the SCL XML files for the ABB IED 670 series ........................................... 139
5.7.3 Object and signal designation ............................................................................................................ 141
5.7.4 Signal identification in the communication system ........................................................................... 141
5.7.5 The substation section for the ABB IED 670 series ............................................................................ 142
5.7.6 IED section for the ABB IED 670 series ............................................................................................... 142
5.7.7 The communication section for the ABB IED 670 series .................................................................... 142
xi
5.7.8 Organization of the Logical Devices, Logical Nodes, Data Objects and Data Attributes in an IED ..... 144
5.7.9 Signal engineering .............................................................................................................................. 145
5.7.10 DataSets ......................................................................................................................................... 146
5.7.11 Buffered Report Control Block....................................................................................................... 146
5.7.12 Trigger Options .............................................................................................................................. 146
5.7.13 Connection of the Buffered Report Control Block to a Client Logical Node .................................. 147
5.7.14 Principle operation of the Generic Object Oriented Substation Event (GOOSE) messages .......... 148
5.7.15 How to send GOOSE messages ...................................................................................................... 148
6.2 IEC 61850 standard based operation of the busbar protection scheme ............................................150
6.5 Communication establishment between PCM600 software and the IED’s .......................................157
6.5.1 Setting up IP addresses for the IEDs used .......................................................................................... 157
6.5.2 Setting up the PC for point to point communication using the front port of the IED........................ 158
6.5.3 Setting up the PC to access more than one IED via a switch ............................................................. 162
6.5.4 Setting up a project in PCM600 software tool ................................................................................... 163
6.5.5 Engineering configuration of the IEDs using PCM600 engineering Pro software .............................. 164
6.5.6 Application Configuration for the IEDs .............................................................................................. 166
6.5.7 The function blocks for analog data used in the IEDs for the outgoing feeders ................................ 167
6.5.8 Function blocks for overcurrent protection used in the IEDs for the outgoing feeders .................... 168
6.5.9 Function blocks for the signal matrix of binary outputs used in the IEDs for outgoing feeders ........ 169
6.5.10. Function blocks for logic signals used in the IEDs for the outgoing feeders ................................. 169
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6.5.11. Function blocks for measurement of power, current and voltage used in the IEDs for the outgoing
feeders ....................................................................................................................................................... 170
6.5.12. Function blocks for disturbance report of analog and binary signals used in the IEDs for the
outgoing feeders ............................................................................................................................................. 171
6.6 Application Configuration for the IED_C used for protection in the incoming feeder .......................171
6.6.1 Function blocks for analog input data in IED_C for protection in the incoming feeder .................... 171
6.6.2 Function blocks for protection in IED_C ............................................................................................ 172
6.6.3 Function blocks for the signal matrix of the binary outputs in the IED_C ......................................... 173
6.6.4 Function blocks for logic signals in the IED_C .................................................................................... 174
6.6.5 Goose binary receive function block (GOOSEBINRCV)....................................................................... 174
6.6.6 A logic AND gate function blocks in IED_C ......................................................................................... 175
6.6.7 A logic OR gate function blocks in IED_C ........................................................................................... 176
6.7 Operation of the busbar protection scheme using hard wire system ...............................................178
6.7.1 Fault on the two outgoing feeders making use of hard wires for communication............................ 179
6.7.2 Fault occurs on the busbar B2 making use of hardwires for communication ................................... 180
6.9 The operation of the protection scheme based on GOOSE communication ......................................187
6.9.1 Fault on one of the two outgoing feeders where the IED_A and the IED_B are used for protection 187
6.9.2 Fault at the busbar B2 where the IED_C is used for protection......................................................... 188
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7.2.3 Construction of the distribution network .......................................................................................... 196
7.2.4 Calculation of the short circuit impedance for all relevant components of the considered distribution
network ........................................................................................................................................................... 196
7.2.5 Reference of all impedances to the reference voltage ...................................................................... 197
7.2.6 Short circuit calculations .................................................................................................................... 197
7.2.7 Design of the parameters and settings of the protection devices and the protection scheme
investigation by simulation ............................................................................................................................. 197
7.2.8 Analysis of the application of the IEC 61850 standard to the process engineering of the ABB IED 670
series ........................................................................................................................................................... 197
7.2.9 Development of the Laboratory test bench ....................................................................................... 197
7.2.10 Design and implementation of the protection scheme ................................................................. 198
7.2.11 Implementation of the reverse blocking protection scheme using hard wires for transfer of the
blocking signals between the IEDs .................................................................................................................. 199
7.2.12 Implementation of the reverse blocking protection scheme using Ethernet GOOSE communication
....................................................................................................................................................... 199
7.2.13 Comparison of the operation of the hardwired and Ethernet communication based reverse
blocking protection schemes .......................................................................................................................... 200
BIBLIOGRAPHY/REFERENCES................................................................................................. 202
B.1.2 The settings of binary input modules (BIM) used by IED_B ..............................................................248
B.1.3 The setting of the binary output module (BOM) for IED_B ...............................................................249
B.1.4 The setting of the transformer module unit (TRM) for IED_B ...........................................................250
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B.1.4 The communication setting for IED_B ..............................................................................................252
B.1.5 The setting of four step phase overcurrent protection (OC4PTOC) for IED_B ...................................253
B.1.6 The measurement function (CVMMXN) function block for IED_B .....................................................255
B.1.7 The measurement function (CMMXU) function block for IED_B .......................................................256
B.1.8 The measurement function (VMMXU) function block for IED_B .......................................................257
B.1.9 The measurement function (VMSQ1) function block for IED_B ........................................................258
B.2.1 The settings of binary input modules (BIM) used by IED_C ...............................................................262
B.2.2 The settings of binary output module (BOM) used by IED_C ............................................................263
B.2.3 The setting of the transformer module unit (TRM) for IED_C ...........................................................264
B.2.4 The communication and Instantaneous phase overcurrent protection (PHPIOC, 50) setting for IED_C .
.........................................................................................................................................................265
B.2.5 The setting of four step phase overcurrent protection (OC4PTOC) for IED_C ...................................266
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LIST OF FIGURES
Figure 1.1: Typical Relay protection zones in a power system (Gill,2000) .................. 1
Figure 1.2: Block schematic of a transmission and a distribution system .................... 3
Figure 2.1: The Radial bus configuration (Bulletin, 2001). ........................................ 19
Figure 2.2: The main and transfer bus configuration (Bulletin, 2001). ....................... 20
Figure 2.3: Double breaker double bus configuration (Bulletin, 2001). ...................... 21
Figure 2.4: The Ring Bus Configuration (Bulletin, 2001). .......................................... 21
Figure 2.5: The Breaker and a half configuration (Bulletin, 2001). ............................ 22
Figure 2.6: The distribution busbars protection using interlocking scheme (Siemens
AG, 2005)................................................................................................................. 23
Figure 2.7: The representation of the differential protection zone of a single busbar
(Gajic et al, 2007) ..................................................................................................... 25
Figure 2.8: A basic differential scheme during normal operation and external faults (
Gill, 2000). ................................................................................................................ 25
Figure 2.9: A basic differential schemes during internal faults (Gill, 2000). ............... 26
Figure 2.10: The Equivalent diagrams for instrument transformers with ideal
transformers, (a) for a significant leakage flux in transformer core class T CTs and
VTs and (b) for a negligible leakage flux in transformer core class C CTs (Blackburn,
Domin 2006)............................................................................................................. 27
Figure 2.11: The Effect of the CT saturation (Andrichak, 1995). ............................... 28
Figure 2.12a: The Distribution Busbar system (Mohan and Chatterjee, 2010). ......... 31
Figure 2.12b: The architecture for distributed bus protection (Mohan and Chatterjee,
2010). ....................................................................................................................... 32
Figure 2.13: The IEEE papers for busbar protection publication rate per year .......... 33
Figure 3.1: The Single-Busbar Frame-Earth Protection (Elmore, 2004). ................... 58
Figure 3.2: A Frame – Earth Protection (Sectioned Busbar) (Elmore, 2004). ............ 58
Figure 3.3: The Frame – Earth Scheme - Double Bus Substation (NPAG, 2002) ..... 59
Figure 3.4: The Differential protection for a busbar (Andrichak and Cargenas,1995) 60
Figure 3.5: Basic Circulating Current Schemes (NPAG, 2002) ................................. 61
Figure 3.6: The Zones of Protection for Sectionalized Busbars (NPAG, 2002) ......... 62
Figure 3.7a: Current transformer mounted on both sides of the breaker (NPAG, 2002)
................................................................................................................................. 63
Figure 3.7b: Current transformer mounted only on a circuit side of the breaker with. 63
fault shown not cleared by the circuit protection (NPAG, 2002) ................................ 63
Figure 3.8: The Illustration of the interlocking scheme (Kasztenny and Brunello,
2004). ....................................................................................................................... 64
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Figure 3.9: A characteristic of two relays with different current/time settings (NPAG,
2002) ........................................................................................................................ 66
Figure 3.10: Algorithm adopted for distributed processing of the measured values
(NPAG, 2002)........................................................................................................... 69
Figure 4.1: One line diagram of the studied distribution network............................... 72
4. .............................................................................................................................. 72
Figure 4.2(a): One line diagram of the load flow calculation for the studied distribution
network .................................................................................................................... 74
Figure 4.2(b): Three phase voltages and currents for the simulated distribution
network .................................................................................................................... 75
Figure 4.3: One line diagram of the studied faults in the distribution network ........... 82
Figure 4.4: Three phase voltages when short circuits are introduced in the distribution
network into a busbar B2 (substation2/2), a load 1(line B2 to B3), and a load 2 (Line
B2 to B4) respectively .............................................................................................. 83
Figure 4.5: Definite -current characteristic of overcurrent relays ............................... 89
Figure 4.6: Definite -Time characteristics of overcurrent IEDs .................................. 89
Figure 4.7: Inverse-time characteristics of overcurrent relays ................................... 90
Figure 4.8: The Grading time determination for the relays (distribution Automation
Handbook, 2011) ...................................................................................................... 91
Figure 4.9: Flowchart for Setting Blocking Scheme –for a Single Incomer Substation
................................................................................................................................. 93
Figure 4.10: Single phase to ground fault in a line (B2 to B4) ................................... 95
Figure 4.11: Station2\B2 Relay A protection response for a minimum single phase to
the ground fault with a clearing time of 0.527 seconds ............................................. 96
Figure 4.12: Relays Protection response to a single phase to ground fault for the
outgoing feeders to loads 1 and 2 ............................................................................ 97
Figure 4.13: Relay A time-overcurrent response and Relay C acting as back-up
protection for the single phase to ground fault. ......................................................... 98
Figure 4.14(a): Three phase fault between a Substation2/B2 and a Substation4/B4 99
Figure 4.14(b): Three phase voltages and currents in the line (B2 to B4) when three
phase fault is introduced in the distribution network................................................ 100
Figure 4.15: Relay A protection response for the three phase fault with a clearing time
of 0.100 seconds for the DT and 0.324 seconds for the IDMT element respectively
............................................................................................................................... 100
Figure 4.16: Protection responses of the Relay A and B to the three phase fault ... 101
Figure 4.17: Characteristic of the Relay A time-overcurrent response and of the Relay
C acting as a back-up protection device for the three phase fault ........................... 102
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Figure 4.18: DigSILENT simulation diagram for a single phase to ground fault in a line
(B2 to B3) ............................................................................................................... 103
Figure 4.19: Relay B protection response for the minimum single phase to the ground
fault with a clearing time of 1.117 seconds ............................................................. 104
Figure 4.20: Protection responses to the single phase to the ground fault on a line (B2
to B3) for the relays A and B .................................................................................. 105
Figure 4.21: Relay B time-overcurrent response of 1.117 seconds and Relay C acting
as back-up protection with time response of 1.675 seconds for the single phase to the
ground fault in the line (B2 to B3) feeding the load 1 .............................................. 106
Figure 4.22: DigSILENT simulation diagram for the three phase fault in the line ( B2 to
B3) that feeds the load 1 ........................................................................................ 107
Figure 4.23: Relay B protection response for the three phase fault with a clearing time
of 0.200 seconds for DT and 0.495 seconds for IDMT elements respectively ......... 107
Figure 4.24: Protection responses to the three phase fault for the relays A and B in
the outgoing feeders............................................................................................... 108
Figure 4.25: Characteristics elements for relay B and C for three phase fault......... 109
Figure 4.26: DigSILENT simulation diagram of the single phase to the ground fault on
the busbar B2 ......................................................................................................... 110
Figure 4.27: Relay C protection response for the minimum single phase to ground
fault with a clearing time of 1.523 seconds ............................................................. 111
Figure 4.28: Relays A, B and C protection responses when the minimum single phase
to the ground fault is applied on the busbar B2 in the substation2/B2 ..................... 112
Figure 4.29 (a): DigSILENT simulation diagram for the three phase fault on the
busbar B2............................................................................................................... 113
Figure 4.29 (b): Recorded results for the three line-line voltages of the busbar B2 . 114
Figure 4.30: Relay C protection response to the three phase fault on the busbar B2
............................................................................................................................... 115
Figure 4.31: Relays A, B and C protection responses when a three phase fault is
applied on the busbar B2........................................................................................ 116
Figure 4.32: The IED A protection response to the minimum single phase to the
ground fault with a clearing time of 0.527 seconds ................................................. 118
Figure 4.33: Protection responses to the single phase to the ground fault for the IEDs
A and B on the outgoing feeders ............................................................................ 119
Figure 4.34: IED A time-overcurrent response and IED C acting as back-up protection
for the single phase to the ground fault................................................................... 119
Figure 4.35: The IED A protection response for the three phase fault with a clearing
time of 0.100 seconds for the DT and 0.324 seconds for the IDMT element
respectively ............................................................................................................ 120
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Figure 4.36: IEDs A and B protection responses to the three phase fault ............... 121
Figure 4.37: IED A time-overcurrent response and IED C acting as back-up protection
response to the three phase fault ........................................................................... 121
Figure 4.38: IED B protection response for the single phase to the ground fault with a
clearing time of 1.117 seconds ............................................................................... 122
Figure 4.39: Protection responses to the single phase to the ground fault for the IEDs
A and B from outgoing feeders ............................................................................... 123
Figure 4.40: IED B time-overcurrent response of 1.117 seconds and IED C acting as
back-up protection with time response of 1.675 seconds for the single phase to the
ground fault ............................................................................................................ 123
Figure 4.41: IED B protection response for the three phase fault with a clearing time
of 0.200 seconds for the DT and 0.495 seconds for the IDMT elements respectively
............................................................................................................................... 124
Figure 4.42: Protection response to the three phase fault for the IEDs A and B from
the outgoing feeders............................................................................................... 125
Figure 4.43: IED B time-overcurrent response of 0.20 seconds for the DT and 0.495
seconds for the IDMT element respectively and IED C acting as back-up protection
with time response of 0.430 seconds for the DT and 0.826 seconds for the IDMT
elements respectively for the three phase fault ....................................................... 125
Figure 4.44: IED C protection response to the minimum single phase to ground fault
with a clearing time of 1.523 seconds ..................................................................... 126
Figure 4.45: IEDs A, B and C protection responses to the minimum single phase to
the ground fault applied on the busbar B2. ............................................................. 127
Figure 4.46: IED C protection response to the three phase fault ............................ 127
Figure 4.47: IEDs A, B and C protection responses to the three phase fault applied to
the busbar B2 ......................................................................................................... 128
Figure 5.1: Developments of Substation Automation over time (De Mesmaeker et al.,
2005). ..................................................................................................................... 132
Figure 5.2: Station Bus and conventional wiring to the process (Andersson et al.,
2003). ..................................................................................................................... 132
Figure 5.3: IEC 61850-8 station bus and IEC 61850- 9 links to non-conventional
instrument transformers (Andersson et al., 2003). .................................................. 133
Figure 5.4: Hierarchical communication networks with IEC 61850-8 part as a station
bus and a process bus using both IEC 61850-8 and IEC 61850-9 (Andersson et al.,
2003). ..................................................................................................................... 133
Figure 5.5: One Single, Station wide communication network using both IEC 61850-8
and IEC 61850-9 part of the IEC 61850 standard (Andersson et al., 2003). ........... 134
xx
Figure 5.6: Example of Logical Nodes used for protection functions (Andersson et al.,
............................................................................................................................... 135
Figure 5.7: Example of the Substation Automation system architecture (Andersson et
al., 2003). ............................................................................................................... 137
Figure 5.8: The physical device that consists of logical groupings (Lundqvist et al.,
2007). ..................................................................................................................... 138
Figure 5.9: The Engineering process for substation configuration (Engineering guide
IEC61850, 2006) .................................................................................................... 139
Figure 5.10: Principle structure of the SCL XML file (Engineering Guide IEC61850,
2006). ..................................................................................................................... 140
Figure 5.11: The components of the signal identification as defined in IEC 61850–7–2
(Engineering Guide IEC61850, 2006). .................................................................... 141
Figure 5.12: Communication network used by the IEC61850 standard (Engineering
Guide IEC61850, 2006). ......................................................................................... 143
Figure 5.13a: Communication sections: Possible network configuration (Engineering
Guide IEC61850, 2006). ......................................................................................... 144
Figure 5.13b: Communication sections: Possible network configuration (Engineering
Guide IEC61850, 2006). ......................................................................................... 144
Figure 5.14: Organization of Logic Devices, Logic Nodes, Data Objects and Data
Attributes in an IED (Engineering Guide IEC61850, 2006). .................................... 145
Figure 5.15: IEC 61850–7–2 part : Example of Datasets (Engineering Guide
IEC61850, 2006). ................................................................................................... 146
Figure 5.16: Mapping of the BRCB to the client LN (Engineering Guide IEC61850,
2006). ..................................................................................................................... 147
Figure 5.17: IEC 61850 Principle operation of GOOSE messages (Engineering Guide
IEC61850, 2006). ................................................................................................... 148
Figure 6.1a: A busbar reverse blocking scheme using a hard-wired system ........... 151
Figure 6.1b: A busbar reverse blocking scheme using IEC61850 standard-based
communication ....................................................................................................... 152
Figure 6.2: The main DigSILENT distribution network used for building of the lab test
bench ..................................................................................................................... 152
Figure 6.3: The lab test bench that is developed for case studies........................... 153
Figure 6.4: The flow chart for the practical experiment ........................................... 156
Figure 6.6: Point to point Ethernet link between the IED and the PC with PCM600
software ................................................................................................................. 159
Figure 6.7 Selected Network connections .............................................................. 159
Figure 6.8: The local area connection .................................................................... 160
Figure 6.9: The internet protocol (TCP/IP) selection ............................................... 160
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Figure 6.10a: The Internet protocol (TCP/IP) properties ......................................... 161
Figure 6.10b: The Internet protocol (TCP/IP) with completed properties................. 161
Figure 6.11: Ping command for checking of the connection between the IED_C and
the PC with PCM600 software ................................................................................ 162
Figure 6.12: Setting up the PC to access more than one IED via a MOXA switch 162
Figure 6.13: Ping command results for the connection between the IED_C, IED_B,
IED_A, and the PC with PCM600 via a MOXA switch ............................................ 163
Figure 6.14: The plant structure of the Distribution network .................................... 164
Figure 6.15: Inserting ABB device into a project ..................................................... 165
Figure 6.16: Inserting of IEDs in the plant structure ................................................ 166
Figure 6.17: The object type window that shows different function blocks .............. 167
Figure 6.18: Signal Matrix Analog Input for currents and voltages .......................... 168
Figure 6.19: The overcurrent protection function blocks for the IED_A ................... 169
Figure 6.20: The function blocks of the signal matrix for the binary outputs ............ 169
Figure 6.22: The function blocks for measurements of power, current and voltage 170
Figure 6.23: The function blocks for a disturbance report of analog and binary signals
............................................................................................................................... 171
Figure 6.24: The signal matrix of the analog inputs for currents of the IED_C ........ 172
Figure 6.25a: The protection function blocks for instantaneous tripping for internal
fault ........................................................................................................................ 172
Figure 6.25b: The protection function blocks used for back-up protection .............. 173
Figure 6.26: The function block for the signal matrix of the binary outputs.............. 173
Figure 6.27: The logic block of OR gates utilized for sending the tripping signals to the
physical circuit breaker ........................................................................................... 174
Figure 6.28: The GOOSEBINRCV function block for the IED_A and IED_B installed in
the IED_C .............................................................................................................. 175
Figure 6.29: GOOSE logical AND gates for the IED_A ........................................... 175
Figure 6.30a: Logic OR gates for the reverse blocking signals ............................... 176
Figure 6.30b: GOOSE logical OR gates for the IED_A and IED_B ......................... 176
Figure i: Hard-wires based reverse blocking scheme ............................................. 177
Figure ii: GOOSE messages based reverse blocking scheme ................................ 177
Figure 6.31: The Overcurrent characteristic programmed in the Omicron software 178
Figure 6.32: The busbar reverse blocking scheme when the fault 1 is on the line that
feeds load 2 ........................................................................................................... 179
Figure 6.33: The busbar reverse blocking scheme when the fault 2 is in the busbar B2
............................................................................................................................... 180
Figure 6.34: The flow chart algorithm for GOOSE engineering of the laboratory test
bench ..................................................................................................................... 181
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Figure 6.35: The identification of IEDs in the CCT600 software tool ....................... 182
Figure 6.36: The IED section in the CCT600 software tool ..................................... 182
Figure 6.37: The IEC61850 Data sets Engineering for the IED_B .......................... 184
Figure 6.38: The mapping of GOOSE control engineering...................................... 185
Figure 6.39: The updated data flow inputs .............................................................. 185
Figure 6.40: The exporting of the SCD file from the CCT600 software tool ............. 186
Figure 6.41: The representation of the signal matrix tool in PCM600 software ....... 187
Figure 6.42: The simulated faults in one of the two outgoing feeders ..................... 187
Figure 6.43: The simulated fault on the main intake busbar.................................... 189
Figure 6.44: The three phase fault at the outgoing feeder where the IED_B is installed
............................................................................................................................... 190
Figure 6.45: The results for Ethernet cable using GOOSE messages and hardwired
connection between IEDs ....................................................................................... 191
Figure 6.46: The results for the time measurement taken by the GOOSE BLOCKING
binary signal. .......................................................................................................... 191
Figure 6.47: The results for the time measurement taken by the the WH BLOCKING
binary signal ........................................................................................................... 192
Figure 6.48: The results obtained for three phase fault on the busbar B2 ............... 193
Figure A.1: A PCM600 viewer (Protection and control IED manager guide, 2012) . 211
Figure A.2: A signal matrix tool viewer (Protection and control IED manager guide,
2012) ...................................................................................................................... 212
Figure A.3: The Parameter setting viewer (Protection and control IED manager guide,
............................................................................................................................... 213
2012) ...................................................................................................................... 213
Figure A.4: The Graphical display editor (Protection and control IED manager guide,
2012) ...................................................................................................................... 214
Figure A.5: Application configuration and viewer (Protection and control IED manager
guide, 2012) ........................................................................................................... 215
Figure A.6: Signal matrix for the analog inputs (SMAI) function block(ABB 670 series
technical reference manual, 2012). ........................................................................ 217
Figure A.7: Signal matrix for binary inputs (SMBI) (ABB 670 series technical reference
manual, 2012) ........................................................................................................ 218
Figure A.8: The SMBO function block (ABB 670 series technical reference manual,
2012). ..................................................................................................................... 219
Figure A.9: Instantaneous phase overcurrent function block (ABB 670 series technical
reference manual, 2012). ....................................................................................... 220
Figure A.10: EFPIOC function block (ABB 670 series technical reference manual,
2012) ...................................................................................................................... 222
xxiii
Figure A.11: The OC4PIOC function block (ABB 670 series technical reference
manual, 2012). ....................................................................................................... 223
Figure A.12:The Functional overview of 0C4PTOC block (ABB 670 series technical
reference manual, 2012) ........................................................................................ 224
Figure A.13: The EF4PTOC function block (ABB 670 series technical reference
manual, 2012) ........................................................................................................ 226
Figure A.14: The functional overview of the EF4PTOC block (ABB 670 series
technical reference manual, 2012) ......................................................................... 227
Figure A.15: The Measurement function block (CVMMXU) (ABB 670 series technical
reference manual, 2012). ....................................................................................... 229
Figure A.16: The Phase current measurement function block (CMMXU) (ABB 670
series technical reference manual, 2012) ............................................................... 241
Figure A17: Calibration curves (ABB 670 series technical reference manual, 2012)
............................................................................................................................... 242
Figure A.18: The Phase-phase voltage measurement function (VMMXU) (ABB 670
series technical reference manual, 2012) ............................................................... 243
Figure A.19: The current sequence component measurements (CMSQI) function
block (ABB 670 series technical reference manual, 2012) ...................................... 244
Figure A.20: The voltage sequence measurement (VMSQI) block (ABB 670 series
technical reference manual, 2012) ......................................................................... 245
Figure A.21: The disturbance report structure (ABB 670 series technical reference
manual, 2012). ....................................................................................................... 246
xxiv
LIST OF TABLES
Table 2.1: Differential protection methods and a CT saturation detector for busbar
protection ................................................................................................................. 35
Table 2.2: The methods for busbar protection based on the hardware / software ..... 39
Table 2.3: The methods for busbars based on the digital protection ......................... 44
Table 2.4: Methods for busbar protection based on simulation ................................. 50
Table 2.4.1: PSCAD/EMTDC and EMTP simulation ................................................. 50
Table 2.4.2: EMTDC and MATLAB simulation .......................................................... 51
Table 2.4.3: Wavelet transforms (WT) ...................................................................... 52
Table 2.4.4: The EMTP simulation for busbar protection .......................................... 53
Table 3.1: Characteristics of the relay based on the IEC 60255 standard................. 66
Table 3.2: The relay timing errors with standard IDMT (NPAG, 2002). ..................... 68
Table 3.3: Overview of protection relays generations and their capabilities. ............. 70
Table 4.1: The parameters of the considered distribution network ............................ 73
Table 4.2: The load flow results for the different voltage levels in the network .......... 75
Table 4.3: The load flow results for the busbar voltages ........................................... 75
Table 4.4 Equation for calculations of impedance for each element in the distribution
network .................................................................................................................... 76
Table 4.5: Different types of short circuit faults in the three phase network .............. 80
Table 4.6: Results of the single phase to the ground short circuit on the busbar B2 . 84
Table 4.7: Results of the three phase short circuit on the the busbar B2 .................. 84
Table 4.8: Results of the single phase to ground short circuit results on the line (B2 to
B3) for the load 1 ...................................................................................................... 85
Table 4.9: results of the three phase short circuit on the line B2 to B3 for load 1 ...... 86
Table 4.10a: Single phase short circuit results for the line B2 to B4 for the load 2 .... 87
Table 4.10b: Three phase short circuit calculation for the line B2 to B4 for the load 2
................................................................................................................................. 87
Table 4.11: The simulation results done in all three loacation in the distribution
network .................................................................................................................... 88
Table 4.12: The parameters for characteristic curve ................................................. 92
Table 4.13: Relay A setting for the single phase to ground fault ............................... 94
Table 4.14: Minimum short circuit calculation results according to the IEC 60909
standard ................................................................................................................... 95
Table 4.15: The results for the relay A protection response for a minimum single
phase to the ground fault .......................................................................................... 96
Table 4.16: Relay A setting for three phase protection ............................................. 99
xxv
Table 4.17: Maximum Short circuit calculation results according to IEC 60909
standard ................................................................................................................... 99
Table 4.18: The result for the relay A protection response to the three phase short
circuit...................................................................................................................... 101
Table 4.19: Relay B setting for earth protection ...................................................... 103
Table 4.20: Short circuit results according to the IEC 60909 standard .................... 103
Table 4.21: The result for the relay B protection response for the single phase to the
ground fault ............................................................................................................ 105
Table 4.22: Relay B setting for three phase protection ........................................... 106
Table 4.23: Minimum short circuit calculation results according to the IEC 60909
standard ................................................................................................................. 107
Table 4.24: The result for the relay B protection response for the three phase fault 108
Table 4.25: Relay C setting for earth protection...................................................... 110
Table 4.26: Minimum Short circuit calculations results according to IEC 60909
standard ................................................................................................................. 111
Table 4.27: The result for the relay C protection response for the single phase to
ground fault ............................................................................................................ 112
Table 4.28: Relay C setting for phase protection .................................................... 113
Table 4.29: Maximum Short circuit calculations results according to IEC 60909
standard ................................................................................................................. 114
Table 4.30: The result for the relay C protection response for the three phase fault 115
Table 4.31 Combined results for the different faults in the distribution network used in
the case study one ................................................................................................. 117
Table 4.32: The result for the IED A protection response for the single phase to the
ground fault ............................................................................................................ 118
Table 4.33: The result for the IED A protection response for the three phase fault . 120
Table 4.34: The result for the IED B protection response for the single phase to
ground fault ............................................................................................................ 122
Table 4.35: The result for the IED B protection response for the three phase fault . 124
Table 4.36: The result for the IED C protection response for the single phase to the
ground fault ............................................................................................................ 126
Table 4.37: The result for the IED C protection response for the three phase fault . 128
Table 4.38 Combined results for the different faults in the distribution network used in
a case study two .................................................................................................... 128
Table 7.1: The block functions used for busbar reverse blocking scheme .............. 198
Table A.1: Supported functions per tool variant (Protection and control IED manager
guide, 2012) ........................................................................................................... 216
xxvi
Table A.2: Input signals for the SMAI function block (ABB 670 series technical
reference manual, 2012). ....................................................................................... 217
Table A.3: Output signals for the SMAI function block (ABB 670 series technical
reference manual, 2012). ....................................................................................... 218
Table A.4: Input signals for the SMBI function block (ABB 670 series technical
reference manual, 2012) ........................................................................................ 218
Table A.5: Output signals for the SMBI function block (ABB 670 series technical
reference manual, 2012 ......................................................................................... 219
Table A.6: Input signals for the SMBO function block (ABB 670 series technical
reference manual, 2012). ....................................................................................... 219
Table A. 7: The output signals for the SMBO function block (ABB 670 series technical
reference manual, 2012). ....................................................................................... 220
Table A.8: Input signals for the PHPIOC function block (ABB 670 series technical
reference manual, 2012) ........................................................................................ 221
Table A.9: Output signals for the PHPIOC function block (ABB 670 series technical
reference manual, 2012). ....................................................................................... 221
Table A.10: Input signals for the EFPIOC function block (ABB 670 series technical
reference manual, 2012). ....................................................................................... 222
Table A.11: Input signals for the EFPIOC function block (ABB 670 series technical
reference manual, 2012). ....................................................................................... 222
Table A.12: The input signals for the OC4PTOC function block (ABB 670 series
technical reference manual, 2012). ........................................................................ 224
Table A.13: The Output signals for the OC4PTOC function block (ABB 670 series
technical reference manual, 2012) ......................................................................... 224
Table A.14: The input signals for the EF4PTOC function block (ABB 670 series
technical reference manual, 2012) ......................................................................... 227
Table A.15: The Output signals for the EF4PTOC protection function block (ABB 670
series technical reference manual, 2012) ............................................................... 227
Table A.16: The Measurement function block (CVMMXU) input signals (ABB 670
series technical reference manual, 2012) ............................................................... 229
Table A.17: The Measurement function block (CVMMXU) output signals (ABB 670
series technical reference manual, 2012) ............................................................... 229
Table A.18: The Different methods for calculation of three phase power systems (ABB
670 series technical reference manual, 2012) ........................................................ 240
Table A.19: The phase current measurement function block (CMMXU) inputs (ABB
670 series technical reference manual, 2012) ........................................................ 241
Table A.20: The phase current measurement function block (CMMXU) outputs (ABB
670 series technical reference manual, 2012) ........................................................ 241
xxvii
Table A.21: The Input signals for the voltage measurement function (VMMXU) (ABB
670 series technical reference manual, 2012) ........................................................ 243
Table A.22: The output signal for the voltage measurement function (VMMXU) (ABB
670 series technical reference manual, 2012) ........................................................ 243
Table A.23: The Input signals for the current sequence component measurement
(CMSQI) (ABB 670 series technical reference manual, 2012) ................................ 244
Table A.24: The Output signals for the current sequence component measurement
(CMSQI) block (ABB 670 series technical reference manual, 2012) ....................... 244
Table A.25: The Input signals for the Voltage sequence measurement (VMSQI) (ABB
670 series technical reference manual, 2012) ........................................................ 245
Table B.1: The settings of the binary input modules ( BIM_3 and BIM_5) for IED_B
............................................................................................................................... 248
Table B.2: The setting of the binary output module (BOM_4) for IED_B. ................ 249
Table B.3a: The setting of the transformer module unit (TRM) for IED_B ............... 250
Table B.3b: The setting of the transformer module unit (TRM) for IED_B ............... 251
Table B.4: The communication / recording and measurement setting for IED_B .... 252
Table B.5: The setting of four step phase overcurrent protection (OC4PTOC) for
IED_B..................................................................................................................... 253
Table B.6: The setting of measurement function (CVMMXN) function block for IED_B
............................................................................................................................... 255
Table B.7: The setting of measurement function (CMMXU) function block for IED_B
............................................................................................................................... 256
Table B.8: The setting of measurement function (VMMXU) function block for IED_B
............................................................................................................................... 257
Table B.9: The setting of measurement function (VMSQI) function block for IED_B 258
Table B.10a: The settings for binary data (B1RBDR:1) of IED_B. .......................... 259
Table B.10b: The settings for analog data (A1RADR:1) of IED_B. ......................... 260
Table B.10c: The settings for analog data (A2RADR:2) of IED_B. .......................... 261
Table B.11: The settings of the binary input module (BIM_3) for IED_C ................. 262
Table B.12: The settings of the binary output module (BOM_4) for IED_C ............. 263
Table B.13: The setting of the transformer module unit (TRM) for IED_C ............... 264
Table B.14: The communication / recording and measurement setting for IED_C .. 265
Table B.15: The setting of four step phase overcurrent protection (OC4PTOC) for
IED_C .................................................................................................................... 266
Table B.15a: The settings for binary data (B1RBDR:1) of IED_C. .......................... 268
Table B.15b: The settings for analog data (A1RADR:1) of IED_C. ......................... 269
xxviii
GLOSSARY
Discrimination - The ability of two or more protection systems to decide which one
should react to a certain fault and then take corrective action.
Interchange ability - Ability to replace an IED with a different IED from a different
vendor without any impact.
xxix
GOOSE - Generic Object Orientated Substation Event
CT - Current Transformer
HV - High Voltage
IEC - International Electrotechnical Commission
IEDs - Intelligent Electronic Devices
SAS - Substation Automation System
SCL - Substation Configuration Language
SCADA - Supervisory Control and Data Acquisition
VT - Voltage Transformer
VDM - Vector Diagram Monitor
A/D - Analogue to Digital
UCA - Utility Communication Architecture
CU - Central Unit
MMI - Man Machine Interface
SV Sample Value
LAN - Local Area Network
PCB - Printed Circuit Board
PIOC - Instantaneous Phase Overcurrent Protection
EFPIOC - Instantaneous Residual Overcurrent Protection
OC4PTOC - Four Step Phase Overcurrent Protection
EF4PTOC - Four Step Residual Overcurrent Protection
SMAI - Signal Matrix Analog Input
SMBI - Signal Matrix for Binary Inputs
SMBO - Signal Matrix for Binary Outputs
CMMXU - A function block used for measuring phase current
VMMXU - Function block used for measuring phase - phase voltages
A1DADR - Disturbance Report for Analog Signals
B1RBDR - Disturbance Report for Binary Signals
GOOSEBINRCV Goose Binary Receive function block
xxx
Nomenclature
VA Is the volt-ampere burden
I Is the amperes
V Is Volts
t Is the trip time.
TMS Is Time Multiplier Setting.
I r Is the current setting
E R Is Relay timing error (IEC 60255-4)
ECT Is the CT ratio error (%)
t Is the operating time of relay nearer the fault (s)
t CB Is the CB interruption time ( s)
Sf
Is the fault level of the network feeder ( VA)
c Is the voltage factor
R Is the resistance of the network
X Is the reactance of the network
X d'' Is the sub-transient reactance of the generator in ohms
x d''
Is the per unit sub transient reactance of the generator in per unit
V g Is the nominal generator voltage
xxxi
S g Is the rated generator capacity
It
is the rated current of the transformer at the high or low side
Pkt Is the total copper loss in the transformer windings
xxxii
k Is an adjustable time multiplier
I Is the measured phase current value
I Is the set start (pickup) current value
and are curve set-related parameters
xxxiii
CHAPTER ONE
INTRODUCTION
1.1 Introduction
Power system is designed to generate electric power in sufficient quantity and its aim
is not just to be capable to meet the current loads but it must also be flexible to meet
future demands. An electric power system is divided into three major divisions which
are known as generation, transmission and distribution. Since electric power is
generated and transmitted over vast territories and are exposed to all different types
of conditions, different types of failures and abnormalities can occur. These can
damage the equipment and also can result in substantial loss of power. To avoid this
problem each element in the power system should be protected. The ideal function of
a protective device is to notice the occurrence of faults and quickly to isolate the fault
section from the power system as soon as possible in order to keep it stable.
Protection schemes used in power systems must comply with the requirement of the
electrical protection standard which requires operational speed, reliability, security,
stability and sensitivity and its purpose is to minimize damage when the fault occurs.
The equipment used for protection is not designed to prevent the fault in the system
but to limit the damage caused by the fault. Electrical power system is separated into
protection zones so that it can achieve its objective (protected and stable operation)
1
as shown in Figure 1.1 above. Some of the zones overlap to another zone to make
sure that the system is protected. In each zone there is a major element that is
protected using a protective relays ( Warrington, 1978).These relays are responsible
for protecting the zone by opening circuit breakers so that the zone is disconnected
from the remaining system when a fault occurs.
A well designed protection scheme must be able to protect the entire power system
Unrestricted forms of line protection, such as overcurrent and distance schemes,
meet this requirement, although faults in the busbar zone are cleared only after some
time delay
Line protection scheme that is not limited for example unit and distance protection
usually fit the requirement of using them as protection for busbar. A problem with this
scheme is when a fault occurs within the busbar zone. It takes longer to clear the
fault due to time delay. Since Busbar is one of the critical elements in the power
system because all electrical circuits are connected into it (NPAG, 2002). Due to its
importance it is required for the busbar to have a fast dedicate protection system.
This document describes research done on an existing busbar protection scheme by
developing an algorithm that is capable of applying IEC61850 standard to improve its
speed during internal faults and stability during external faults
This chapter explains the components that are found in power systems. It also covers
the importance of a busbar in distribution networks. This chapter also covers the 1.2
Awareness of the problem, 1.3 Instrument transformers, 1.4 Protective relay, 1.5
problems, 1.6 Problem statement, 1.7 Sub-problems, 1.8 Research aim and
objectives, 1.9 Objectives, 1.10 Hypothesis, 1.11 Delimitation of research, and 1.12
Motivation for the research project 1.13 Assumptions, 1.14 Research methodology,
1.15 Simulation, 1.16 Data collection and 1.17 Documentation method
2
Figure 1.2: Block schematic of a transmission and a distribution system
3
Flashover caused by prolonged and excessive overvoltage
Failure of a circuit breaker to clear fault current leading to its short circuit
Human error in operating and maintaining switchgear
Foreign object falling across busbar
To meet all of the above requirements protection must be reliable, meaning that the
protection scheme must trip when called up to do so (dependability) and it must not
trip when it’s not supposed to (security).
4
1.3 Instrument Transformer
Substations use power lines for distribution that run high voltages and also carry high
currents. Instrument transformers are connected into these lines and serves as an
input source of currents and voltages to relays, meters, and control devices.
5
1.4.2 Second generation
Static relays
In this all of the relays functions are derived from electronic components provided on
the printed circuit boards (PCB). Inter connection wiring diagram is still not reduced.
Their disadvantages are that they use large amount of electronic components made
by different manufacturers. If these electronic components are not tested with quality
control, the chances of failure during relay life time are high.
Then the issue was how to suit the acquired different protocols to accomplish a new
development. A need for one standard with universal protocol for communication was
considered. The International Electrotechnical Commission (IEC) formed a group
where the protocols were standardized creating an environment where relays can
communicated using common protocol. The new standard IEC 61850 was
developed. (De Mesmaeker et al., 2005)
6
1.5 Problems and a need for future developments
A well designed protection scheme of the busbar in power system must be able to
cover the whole busbar against all types of faults. Line and distance protection can
be used as a busbar protection even though it will not work well when a fault occurs
in busbar zone due to time delay to clear the fault. This is a problem when an internal
fault occurs because when unit protection is applied to feeders the busbars are not
protected and protection engineers tend to overlook this problem. Therefore a
dedicated protection scheme that is fast during internal faults and stable during
external faults for busbars in distribution level is highly needed (NPAG, 2002). It has
been discovered that the area of digital busbar protection research has not been
active and it is stated that a little work has been done on the development of
algorithms suitable for protecting busbars at distribution level (Gill, 2000). Another
concern for busbar protection is the current transformer saturation and most
algorithms that proposed solutions in the past for busbar protection dealt with CT
saturation problem by introducing a special circuitry. The main issue with introducing
an additional circuitry in the protection scheme is that it increases its complexity. This
also increases the possibility of incorrect protection and low stability due to
multifunction of its components. Another problem is that the increase of number of
components in protection schemes increases the cost and therefore destroys the
purpose to build cheap and stable protection scheme that is easy to implement.
Some circuits connected to the busbar may have their current transformers rated
insufficient. This creates a danger of CT saturation and this will threaten the security
of busbar protection. From the previous research it was discovered that there are no
schemes with inherent immunity to CT saturation (Gill, 2000), (Kasztenny and Kuras,
2001).
From the previous research it was also discovered that the principle of high-
impedance busbar protection faces major problems when applied to complex busbar
arrangements. When this protection is applied on busbar the zones of protection are
often required to adjust their boundaries based on changing of busbar configuration,
therefore switching secondary currents. This operation is never considered safe and
should be avoided whenever possible (Brunello, 2003).Digital busbar protection
schemes for medium and large voltages were not attractive to users until recently.
The reasons behind this were that the schemes available in the market were
expensive, difficult to apply, and were considerably slow. Due to modern digital
relays all these factors have changed because the digital relays are much faster, with
better algorithms for security and became affordable after introduction in late 2001
7
and early 2002 of a phase-segregated microprocessor-based busbar relay (Brunello,
2003).
The thesis focuses on the reverse blocking busbar protection scheme with aim to
improve the speed of its operation and at the same time to increase operational
reliability, flexibility and stability of the protection during external and internal faults by
implementation of the extended functionality provided by the IEC61850 standard-
based protective IEDs. The thesis also investigates the practical implementation of
the scheme by the use of IEC 61850 standard communication protocol. The
developed algorithms are simple to be implemented and provide better performance.
1.7 Sub-Problems
1.7.1 Design and implementation of a work station
Produce a Laboratory test-bench developed to simulate a substation environment
including all the components that are needed for the implementation of the IEC
61850 standard application.
8
1.7.2 Development a model for the reverse blocking scheme for busbar protection
Busbars using the current protection element for reverse blocking schemes are
investigated. Development and performing simulation case study for the existing
hardwired reverse blocking protection scheme using appropriate simulation software.
Analysis of the simulation results and a new algorithm is development for the
improvement of the current scheme.
1.7.4 Investigation of the reliability of the reverse blocking scheme for busbar
protection
Protection equipment that fails to be stable during external faults and fails to
discriminate under fault conditions can create serious problems for the power system
through increased disruption. The reliability of the protection scheme is investigated.
1.7.7 Real- time implementation on using different software and hardware platforms
A test bench created in the laboratory environment is used to implement the
protection scheme. Implementation of the scheme in real-time by using different
software tools and hardware platforms as follows:
Omicron CMC 356
9
This is used for modeling and signal injection simulation. It consists of the test basic
software (including the device database) and the VD Monitor (Vector Diagram
Monitor).This equipment is used to operate all the test system’s functions with
additional VD monitor. Other test monitors are also available to simplify, automate
and thus to speed up tests for various types of relay.
DigSILENT PowerFactory software
This software is used for power systems modeling, simulation and co-ordination of
the protection devices
Protection and Control IED Manager Tool (PCM600)
This software is used for configuration of the ABB Intelligent Electronic Devices (IED)
used to build the protection scheme.
Communication Configuration Tool (CCT600)
This CCT600 software is used to program and configure the IEC 61850 station bus
engineering for ABB IEDs used in this project
1.7.8 Comparison between two busbar protection schemes builds with relays from
different generation
Comparison of the operating results of the conventional relay used with the current
protection scheme and the digital relays with the proposed IEC 61850 standard-
based protection schemes. The analyses are based on the elements response
results, accuracy, speed, stability, compatibility and the most important cost.
.
1.8 Research aim and objectives
The aim of this project is to improve the existing reverse blocking busbar protection
scheme by development an algorithm for operation of the scheme that improves
flexibility of the scheme, circuit stability when there is an external fault, the protection
action speed when there is an internal fault, and also to improve the performance of
distribution busbar protection without using additional circuitry .The protection
scheme developed must also be easy to implement. This is achieved by application
of IEC61850 standard for communication and utilization of GOOSE messaging to
improve busbar protection and expand this novel application to the busbar protection
field.
1.9 Objectives
The aim stated above is achieved through the following objectives:
To identify and study reverse blocking busbar protection scheme used in
distribution systems.
10
To review and analyze the existing literature for busbar protection scheme
development.
To develop a test bench in a laboratory environment for future simulation and
experiments.
To select the best algorithm for busbar protection scheme that is going to be
implemented.
To analyze the IEC 61850 standard-based protection relays available on the
market and determine and analyze their functions for busbar protection.
To select the IEC 61850 standard based protection relays that are going to be
used on the thesis developments
To implement the current reverse blocking busbar protection scheme using
the standard based IEDs and investigate its performance
To develop an algorithm for reverse blocking busbar protection scheme using
IEC 61850 standard that is fast and stable during various faults.
To define the interface performance of IEDs in the busbar protection scheme
To use simulation package to study the efficiency, speed, sensitivity and
reliability of the developed algorithm
To compare the performance of the current and IEC 61850 standard-based
schemes and make recommendations for future improvements
1.10 Hypothesis
A possibility exist for developments of a reliable reverse blocking busbar protection
scheme that is stable and reliable for any power distributed network by implementing
comprehensive protection audit, developing an algorithm with protection philosophy
based on systems requirements, and by conducting protection co-ordination studies.
The application of the IEC 61850 standard employs permission digital busbar
protection to be done in an intelligent, reliable and cost effective way
11
Case study for external faults
GOOSE communication between the relays
IEC61850 has become a global standard for communication and integration of the
IEDs. With development of the new digital technology for protection, the researchers
have made a good significant achievement in the development of suitable algorithms
for the application of the IEC61850 standards-based relays. These algorithms apply
principles similar to these of their electromechanical counterparts. Substantial
improvements have taken place in transmission line and transformer protection but
busbar protection using digital techniques has received almost no attention (Gill,
12
2000).A literature survey has revealed that very few algorithms for protection busbar
have been proposed in the past especially at the distribution level. The previous
schemes have issues with speed and stability. Some proposed solutions for this
problem make use of additional circuitries that jeopardize stability in the system and
some solutions are not fast enough to clear the fault when it comes to the internal
faults. These challenging problems motivated the decision to investigate the
application of IEC61850 standard on distributed busbar scheme protection.
1.13 Assumptions
Based on the research that has been done till now in the field, the following
assumptions are used:
GOOSE communication is faster than wired based communication.
The co-ordination for protection should be in such a manner that the relay
closest to the fault should operate first.
The shortest operating time should be at the relay nearest to the fault
The disruption of the system due to the fault should be minimum
The other relays must have enough additional operating time to prevent them
from operation
It is possibly to provide a fast fault clearance say <10ms for large current.
13
It is currently the best scheme to use for busbar protection compared to other
existing schemes.
When it comes to external faults it has better performance in terms of stability
than the other schemes.
When it comes to internal fault it has better performance in terms of speed
than other schemes.
The methods to be used in the commissioning of the scheme will also be
provided.
1.14.3 Simulation
Simulation software is used to analyze the protection scheme making use of one line
diagram for modeling of all protection components. The analyzed model includes the
architecture of the power system to be protected as well as the selection of the model
of IEDs that are used to implement the functions and the communication within the
protection scheme other. Making use of the new technology digital relays have made
possible several alternative tools to be used in order to protect, collect, store, and
distribute the power system information in an efficient and economical manner. For
this thesis the protection functions of the Intelligent Electronic Devices (IED) that are
used are based on specific vendor algorithms meaning that the effects of these IEDs
on the system is studied and mathematical model of each is implemented. A one line
diagram of a distribution network is simulated using DIgSILENT, and for IEDs
programming PCM600 and CCT600 software are used. A test bench in the
laboratory environment is developed for simulation and practical work.
14
problem, problem statement, research objectives, and motivation for the research
work, hypothesis, and delimitation of research, assumptions, and research
methodology are described.
15
1.15.6 Chapter Six
This chapter describes development of a laboratory test bench and experiments
done in it to investigate the operation performance of the implemented reverse
blocking protection scheme for the two cases of communication of data between the
IED hard-wired and Ethernet GOOSE messages. A laboratory test bench was
developed to investigate and compare conventional hard-wired and GOOSE
communication-based blocking signals. A distribution busbar reverse blocking
scheme was designed and modeled for the laboratory test bench. This test bench
was utilized to improve the performance and reliability of the busbar reverse
interlocking scheme at the distribution level. The same power network used in
Chapter four is used for these practical studies.
1.15.7 Appendix A
This Appendix describes the software tool package used for IED configuration and all
ABB 670 series function blocks that were used to build the reverse blocking
protection scheme. These blocks are described in different categories which are
based on their functions.
1.15.8 Appendix B
This Appendix shows all the settings for the IED configuration and all ABB 670 series
function blocks that were used to build the reverse blocking protection scheme.
1.19 Conclusion
Different types of components that are found in power systems are explained and
analysed. The importance of a busbar protection in distribution networks is
described. In the next chapter the literature of busbar protection in power systems is
described and different types of papers and articles based on busbar protection are
reviewed
16
CHAPTER TWO
LITERATURE REVIEW
2.1 Introduction
Busbars are one of the important elements as they are used as a central point for
distribution in the power system. If a fault occurs on the busbar all components
connected to it will therefore be interrupted. Due to a high magnitude of currents
caused by the fault a high-speed operation of the busbar protection scheme is
required to limit equipment from being damaged. It is necessary to provide an
effective protection scheme that will be dedicated for the busbar. However, this high-
speed clearing of the fault must be balanced and able to discriminate between
external and internal faults. Incorrect tripping for a fault may cause large outages,
and jeopardize power system stability. Previous researchers discovered that during
high fault magnitudes the possibilities of CT saturation are high which results to an
incorrect operation of the busbar protection scheme (Eissa, 2004). Faults on busbars
do not occur frequently. They only represent small percentage (6-7%) of fault in
power system (Hodgkiss 1960) (Andersson and Hill, 1999). It is true that the numbers
of faults that can occur within the busbars are minimum but they cannot be
completely neglected. If a fault occurs on the busbar it may cause damage to
equipment and injure personnel. In order to avoid these issue protective devices
such as relays should be employed to trip the circuit breakers for isolating of the
faulted area from the power system. The protection scheme in the power system
should be designed in such a manner that it must cover the whole system from all
type of faults (Gill, 2000).
A literature survey has revealed that different bus configurations, current transformer
saturation, speed and stability are the factors that make the busbar protection
scheme complicated. Making use of digital technology, researchers have made
progress in developing suitable algorithms for the use in the microprocessor based
relays and these developed algorithms are based on the same principles as their
counterpart electromechanical relays. Progressive improvement using digital
techniques has been done in other elements of the power system but busbar
protection has received almost no attention (Schweitzer, 1996).
From previous research it can be revealed that a few algorithms for busbar protection
have been proposed and they have not found a good solution when it concerns
speed, future proof and other factors involved such as stability during external faults
17
and speed during internal faults. The objective of this literature review is to examine
the aspects that relate to busbar protection.
This chapter presents a review of the existing literature of busbar protection that is
used in power systems. It compares and analyzes the different methods that were
developed and used to improve the busbar protection. In 2.2 the requirements toward
operation of the busbar protection schemes are explained, 2.3 cover the different
types of busbar protection. In 2.4 the overview of different bus configurations is
covered. In section 2.5 the techniques employed for busbar protection are explained,
section 2.6 covers the problems for the current transformers saturation. The
importance and the benefits of the IEC 61850 standard-based digital relays are
shown in 2.7, a literature review of the existing papers for busbar protection is
presented in 2.8. Lastly section 2.9 presents the review discussions and gives
conclusion.
A line protection that is not restricted such as overcurrent and distances ones usually
meets this requirement, but when it comes to busbar internal faults, time taken to
clear the fault becomes a problem (Gill, 2000). When a unit protection scheme is
18
employed to feeders, busbars are partly protected and this leads to the busbars are
left without a specific protection (Hodgkiss, 1960). A good busbars protection scheme
demands high speed operation, reliability and stability. If it fails to operate during an
internal fault or false trip and is not stable during external faults a disastrous effect on
the power system can happen, creating complete blackout (Eissa, 2004).
Radial bus configuration has few advantages in terms of being the cheapest, and
small land area is required. It is easily expandable and also has simple operation.
The most important advantage for the radial bus is that the application of protective
relaying is simple. The disadvantage of the single bus is lowest reliability and if the
19
failure of the circuit breaker or the fault on the busbar is not cleared, causes loss of
the entire substation.
Figure 2.2: The main and transfer bus configuration (Bulletin, 2001).
20
Figure 2.3: Double breaker double bus configuration (Bulletin, 2001).
21
2.4.5 Breaker and a Half
This configuration consists of two main buses as shown in Figure 2.5, each normally
energized during normal operation. It is configured in such a way that every two
circuits have three breakers where each line is connected to the center circuit
breaker. This type of configuration is commonly used when a ring busbar is upgraded
in order to provide more terminals. This configuration has high reliability and any
breaker can be removed from service during maintenance without an outage to the
system. The disadvantages of this configuration are that it requires a large land area,
it is expensive, and control and protective relaying is complex (Nack, 2005).
22
2.5.1 Interlocking Scheme
This is a protection method used for distribution busbars that have one incoming
feeder. This protection is achieved by placing an overcurrent relay on an incoming
feeder and also at all outgoing feeders as shown in Figure 2.6 These relays are
configured to sense fault currents on the feeders, to detect feeder faults and trip the
circuit breakers. The relay on the incoming feeder is set to trip the circuit breaker of
the busbar unless blocked by any of the outgoing feeders. To avoid creation of race
conditions a short coordination time grading is required depending on the protection
devices used (Kasztenny et al., 2001).Such busbar protection schemes are common
in medium-voltage systems (www.energy.siemens.com AG, 2005)
Figure 2.6: The distribution busbars protection using interlocking scheme (Siemens
AG, 2005)
23
IR1 .This backup protection is used when the FR1 relay has operated and the IR1
relay still sees the fault at the FR1(www.energy.siemens.com AG, 2005).
24
Figure 2.7: The representation of the differential protection zone of a single busbar
(Gajic et al, 2007)
2.5.2.1 Operation
The operation makes use of circulating current arrangement at the extremities of the
zone. The currents are reduced in level by CTs and are continuously compared. The
operating coil of the relay is connected to the secondary windings of the CTs in such
a way that the current flowing through it is equal to the sum of the secondary currents
of the CTs. In a case of an external fault as shown in Figure 2.8, the current leaving
the bus is equal to the sum of all of the currents entering the bus and the current
flowing through the operating coil of the differential relay is zero ( Gill, 2000).
Figure 2.8: A basic differential scheme during normal operation and external faults (
Gill, 2000).
When an a fault is at the busbar (internal fault) as shown in Figure 2.9, the total
currents coming into the busbar is equal to the sum of fault current and this courses
the current to flow through the operating relay. An ideal differential relaying scheme
profits on the advantage that the summation of the currents is zero for external faults.
25
These conditions occur only if the CT’s behavior is ideal for the differential protection
requirements (Gill, 2000).
Figure 2.9: A basic differential schemes during internal faults (Gill, 2000).
The biggest problem implementing this protection busbar scheme is the fact that the
current transformer (CTs) secondary current is non-linear due to CT’s saturation.
From the previous research it has been discovered that there are two most common
busbar protection schemes applied in power systems (Kasztenny and Kuras 2001).
They are high impedance differential protection and low impedance protection (de
Oliveira and Koede, 2002). Low impedance differential protection scheme has
advantage of tolerating substantial CT saturation and dedicated current transformers
(CTs) are not required. This scheme is capable of providing high speed tripping.
High-impedance protection requires dedicated current transformers (CTs) and this is
a problem in terms of cost (Kasztenny and Kuras 2001).
with the leakage flux within the transformer core and its related leakage reactance
26
X ; Z e'' is the flux that does not influence the core, where, X p is the leakage reactance
from the flux that does not cut off the transformer core R P and R s are the resistance
of the primary and secondary windings respectively. For VTs the value of
RP Rs j X p X is kept low to minimize the loss of the voltage and shift to the
phase angle from primary to secondary. The Z e shunt impedances are kept high to
minimize current loss from the primary to secondary parts (Blackburn, Domin 2006).
Figure 2.10: The Equivalent diagrams for instrument transformers with ideal
transformers, (a) for a significant leakage flux in transformer core class T CTs and VTs
and (b) for a negligible leakage flux in transformer core class C CTs (Blackburn, Domin
2006).
The turn’s ratio n reduces the quantities on the primary side. Its offer voltage or
currents at the secondary side to energize the relays or other protection devices. The
loads contain impedances which are referred as burden and it can be either be from
one loading device or the total devices that are loaded. The burden is in volt–
amperes with a given current or voltage. The burden impedance Z B for CTs and VTs
are calculated using the equations below:
VA
ZB (for CTs) (2.1)
I2
V2
ZB (for VTs) (2.2)
VA
Where VA is the volt-ampere burden
I is the amperes
V is Volts
27
2.6.2 CT Saturation
Most of the previous proposed protection solutions have major problems with the CT
saturation. It occurs when the flux density required to produce the secondary current
exceeds the limits of the saturation flux density of the core. The CT saturation is
dependent on the following factors (Andrichak, 1995).
CT ratio
Core cross-sectional area
Connected burden
Magnitude of burden
Presence and amount of remanent flux (if any)
Amount and direction of a dc offset in the current (if any)
Saturation flux density of the core steel
A typical case of CT saturation as shown in Figure 2.11 is a full offset current wave
having a time constant of approximately 30 milliseconds. The time taken when the
secondary current starts to saturate is dependent on the factors listed above.
It can be noted from the graph that at least five cycles of secondary current are
distorted when it is compared to the primary current. In severe conditions this CT
saturation can even occur sooner. This distortion in the secondary currents causes
problems in the busbar differential protection creating abnormalities in the protective
relays operation (Andrichak, 1995).
Since the CTs used in the differential protection schemes are in series with the line,
they carry large amounts of currents during internal and external faults. A high level
of current can cause CTs to saturate resulting in different secondary currents out of
28
the two CTs. This results in the flow of a differential current in the operating element
of the relay while the fault is outside the protection zone. Saturation of the CTs can
therefore cause the differential relays to operate during external faults. It is essential
that steps be taken to detect CT saturation and block the relay operation when it is
necessary (Schweitzer, 1996).
The good thing about this is that is easy to identify that the digital data cannot be
distorted by aging of the hardware. Furthermore optical fibers are recommended in
the standard as process bus. The optical fibers are inherent to be immune from
electromagnetic interferences coming from the switchyard. When it comes to issues
such as data calibration or testing, the standard-based protection IEDs do not need
these operations with data. Another advantage is that the data flow in the protection
IED will be simplified and a second transformer for current and voltage
measurements is not necessary. The analogue to digital (A/D) conversion and the
29
related filtering for the current and voltage signal are also not required. The
protection IED is a perfect element for protection algorithm improvement in the field
of operation speed and reliability (Brand, 2004).
30
Object-oriented architecture
Lowers communication infrastructure costs
Reduces effort in engineering and commissioning
Lowers installation and maintenance costs
Lowers wiring costs
Provides a complete set of services
Interoperability without gateways / routers
Figure 2.12a: The Distribution Busbar system (Mohan and Chatterjee, 2010).
31
Figure 2.12b: The architecture for distributed bus protection (Mohan and Chatterjee,
2010).
Figure 2.13 shows a graph of the number of papers reviewed starting from 1914 up
to 2013. These papers are selected according to the field of protection in power
systems and focusing on the history of busbar protection.
32
Figure 2.13: The IEEE papers for busbar protection publication rate per year
From the graph above it can be seen that from the year 1914 up to January 2013,
sixty nine IEEE papers have been published that focus on the field of busbar
protection. The graph also shows that during the years 2005, 2009 and 2010 the
number of published papers based of busbar protection reaches its peak. In year
2005 the research of the implementation of digital protection for busbars started to
increase. As the years went by, the researchers constantly focused on the digital
protection for the transmission busburs. The distribution bubsbar were neglected.
This serves as a reason for the thesis investigations. The thesis focuses on
improving the busbar protection at the distribution level.The following key words are
used:
Busbar protection, Bus protection, feeder protection, overcurrent protection, zone
interlocking scheme, protective relaying, digital signal processors, unrestrained
differential protection, CT saturation, wavelet transform, design of microprocessor
relays, IEC 61850 substation, IEC 61850 standard, GOOSE communication and
development of microprocessor relays. From these key words a general review of the
papers are shown in Tables 2.1 up to 2.44 including their protection aspects. The
survey and comparison of the IEEE papers is carried out using the following criteria.
Paper author and year
Aim of the paper
Method of the protection
33
Structure of the system
Used hardware / software
Advantages / Drawbacks
Achievements
2.8.1 Review and analysis of the Differential protection methods for busbars
The developments of the Differential protection methods for busbar as shown in
Table 2.1 Leyburn and Lackey (1951) used biased differential relay for protection of
generators, power transformers, feeders and busbars. They discovered that the
generators needed more protection than any other component in power systems.
Royle and A Hill (1989) later used Differential Busbar Protection based on low
impedance biased schemes. This method managed to eliminate the stabilizing
resistance by using segregated and combined function scheme. When it came to
develop a CT saturation detector for the busbar protection Yang et al., (1990) used a
percentage differential scheme combined with a hybrid bus scheme in order to
improve the reliability. Kumar and Hansen (1993) developed a busbar protection
technique that is based on the low-impedance differential scheme. Requirements for
a fast trip and security against unwanted relay operations are achieved by
multiprocessing. Three microcomputers were used for the purpose. The protection
algorithm is based on the relationship between restraining and differential currents
and a restraining factor. Fernández (2001) used a waveform models and RL-model.
Hughes and Legrand (2001) introduced numerical system for busbar protection by
developing a new technique that makes use of average phase angle compensation
simulation. Zadeh et al., (2005) developed a fuzzy neuro method and a symmetrical
component to stabilize the busbar protection during CT saturation. Van Zyl, (2006)
has evaluated modern trend of implementing high impedance differential protection
by operating numerical overcurrent relays in series with external stabilizing resistors.
This offers a number of advantages when compared to the traditional
electromechanical-type high impedance relays. The method proposed by Kang, 2008
used single-slope operation for busbar differential relay in conjunction with the
compensating algorithm. However these methods for differential protection create
complexity of the busbar protection. The literature review illustrates that the
differential protection for busbars is mostly implemented at the transmission level, not
in distribution level. The literature review also shows that the CT saturation detector
uses an additional circuit and this creates possibility for mal-operation of the
schemes.
34
Table 2.1: Differential protection methods and a CT saturation detector for busbar protection
PAPER Aim of the paper Method of protection Structure of the Used hardware / Advantages / Achievements
system software Drawbacks
(Leyburn and Lackey, To analyze Differential protection A single busbar Biased differential relay A combination of The method used began
protection for power for generators, power system with one different protection with an examination of
1951)
system based on transformers, feeders source and three schemes are applied generator protection and
present-day practice and busbars feeders in parallel in one system and this it was discovered that
and recent progress. can lead to negative-phase-
maloparation. sequence protection
should be improved
since the generator
protection needed most
attention
(Royle and A Hill, 1989) To develop a low Differential Busbar A Segregated and A differential measuring The advantage is that The new methods
impedance biased Protection Combined Function and auxiliary relays stabilizing resistance eliminates the
differential busbar Scheme is used is not required and it requirement for a
protection reduces the level of stabilizing resistance
bias and guarantee stability
throughout the fault
(Yang et al.,1990) To develop CT To improve the A hybrid bus scheme A combination of A lot of tests had to be The saturation detection
saturation detector reliability of the using the percentage percentage differential made so that the and the hybrid bus
algorithm conventional differential method for principle and the phase conclusion of the protection algorithm
incorporation with percentage differential primary protection and comparison scheme is results is accurate were proven to be
percentage for scheme. for back up protection. used simple, efficient and
differential scheme The phase accurate
comparison method is
used
(Fernández,2001) To develop a new Algorithm that detects A busbar differential A waveform models and This CT saturation A new algorithm for
algorithm for CT the saturation of the protection. RL-model based detector is an addition busbar differential
saturation detection CT using impedance algorithm for the CT circuit and this creates protection shows a fast
to improve the measurements instead saturation detection are possibility for mal- response time
performance of of a model for the CT used operation
busbar differential secondary current.
protection scheme
(Hughes and Legrand, To develop a new Differential busbar General theory Average phase angle A numerical system Numerical busbar
techniques for protection research compensation simulation improves speed protection improve the
2001)
busbar protection for numerical protection reliability, sensitivity overall utilization of the
system to improve devices for busbar and stability when network and is beneficial
speed reliability, protection. compared to non- for the electrical
sensitivity and numeric conventional substation. These
stability systems. methods offers to the
operator flexibility.
35
( Rasher and Rica, 2002) To investigate the Differential busbar Computer simulation Simulation based project Improve availability A number of bus
necessity for bus protection of the protection and security configurations were
protection in system for various developed to meet
medium voltage busbar configuration different levels of power
systems system reliability
(Pave and Leonid, 2003) To deal with A differential Three generator- A modern The drawback is that It is discovered that
different features of protection is applied transformer units microprocessor-relay the algorithm used is extreme CT saturation
transients in current for busbar protection (GTU) connected to a not fast appears when Direct
transformer groups busbar system Current Components(
for differential DCC) percentage in the
busbar and busway resource current of this
protection CT is maximal
(Kang et al., 2004) To develop and To understand the A third-difference A current differential The technique used Discrimination between
evaluate stability of technique used to function of the current relay is used. had to be repeated for internal and external
busbar differential stabilize the busbar was used as a both internal fault and faults .The sensitivity of
relay during external differential relay not to detection algorithm at external fault the relay remains stable
faults using CT delay the operating the start and the end during CT saturation.
saturation detector. time of the relay of CT saturation
(Cheng Li-jun, 2004 ) To Improve CT To identify a A simulation and The synchronizing Need to understand The two methods were
saturation by using synchronized principle theory based research identification and phase the behavior of the successfully
synchronizing and the phase current project current comparison busbar protection implemented to improve
identification and comparison algorithm methods are used scheme and the main CT saturation for
phase current for CT saturation requirement numerical busbar
comparison checking protection
(Guzmán et al., 2005) to explain a reliable A differential A bus arrangement A differential relay The scheme is fast An innovative busbar
protection scheme protection system that with four buses and protection scheme with
that includes busbar is appropriate for the eight terminals. advanced zone selection
protection and protection of multiple that is safe for external
advanced zone busbar arrangements faults is achieved
selection;
(Zadeh et al., 2005) To present a new Busbar Protection for Adaptive fuzzy A fuzzy -neuro It is fast and accurate The proposed scheme is
methodology for 230 kV double busbar network with a 230 kV differential relay stable during CT
busbar protection double busbar is used saturation
with stability during
CT saturation by
utilizing Fuzzy -
neuro and
symmetrical
component
(Kang, 2008) To propose single- A busbar current A single one line Busbar differential relay The complexity of The algorithm used
slope operation for differential protection diagram with 154 kV / algorithm was busbar differential achieves greater stability
busbar differential that operates in double busbar implemented on the relay when aligned on external faults and is
relay in conjunction conjunction with a CT systems with 12 TMS320C6701 digital with CT compensation sensitive to internal
with the compensating feeders. signal processor faults
compensating algorithm is explained
algorithm
36
2.8.2 Review and analysis of the protection methods based on the hardware /
software
A summarized analysis of the hardware / software used for busbar protection based
on different methods is shown in Table 2.2. Lidgate et al., (1979) derived an
interlocking logic for secondary circuits for conventional double busbar substations.
The method was presented by auxiliary relays which were used for evaluating logic
diagrams for a complex switching network. The method of Pei et al., (1991) used
single chip microcomputer (SCMC) with CPU MCS 8098 to design busbar protection.
The problem with this design is that it needs to have an analog to digital (A/D)
converter within the chip and in this way it cannot satisfy the requirement for high
accuracy although it proved to be reliable and also has self-check functions against
break of the CT connections. Ing et al., (1991) developed a neural network numerical
busbar protection system (NBPS).His system made use of ABB relays. The scheme
used a computational intensive algorithm and focused on a distribution busbar
protection systems.
37
playback simulator (RTPS) to test the microprocessor-based bushar protection
scheme.
Brewis and Hearfield, (2001) used a single busbar with one incomer and a single
busbar with two incomers (Sectionalized) to investigate the performance of busbar
protection scheme. They made use of Blocking and Unblocking busbar zone logic for
the protection scheme. The problem with this scheme is that it made use of hard
wiring for communication between the relay. The method of Bo and Han, (2009) for
protection is based on Global Positioning System (GPS) technique where it detects
the fault using the generated high frequency transient signals and records the time
instant that corresponds to the moment of the fault at that busbar. Chothani et al.,
(2012) developed a trainer kit at a laboratory environment that uses a Digital Signal
Processor (DSP) TMS320LF2407A tool to discriminate between an internal fault and
an external fault on a busbar. In 2013 Khodadadi and Shahrtash, (2013) developed a
new non communication-based scheme that can discriminate between external and
internal faults by taking note of the busbar properties. The method used
mathematical morphology (MM) filter analyzing the transients that were captured.
38
Table 2.2: The methods for busbar protection based on the hardware / software
PAPER Aim of the paper Method of protection Structure of the Used hardware / Advantages / Achievements
system software Drawbacks
(Nellist and Mathews, To design an air- By applying linear N/A Research base d project Improve stability A technique of design to
core toroids or linear couplers for busbar secure optimum
1962)
couplers for busbar protection performance of voltage
protection summation circuits is
achieved
(Lidgate et al.,1979) To evaluate the Interlocking scheme A double-busbar An auxiliary relays The drawback is the A new approach to the
derivation of substation system complexity of derivation of logic
interlock logic and switching high power diagrams for a complex
the secondary networks switching network is
interlock circuits for achieved
conventional double
busbar substations.
(Pei et al.,1991 ) To improve a new A summation of A double bus A single chip Need to have an A/D The designed busbar
scheme capable to current around each arrangement with two microcomputer (SCMC) converter within the protection relay based
automatically bus zone for all bus sections. The with CPU MCS 8098 is chip cannot satisfy the on SCMCs 8098 is
accommodate bus switching patterns in a second one is the used. requirement for high proven to be reliable and
structure change substation making use double bus accuracy. also has self-check
and can correctly of differential arrangement with functions against break
determine new protection scheme three bus sections of CT and PT
summations of connections
current.
(Ing et al.,1991) To develop and A neural network for A distributed busbar ABB Relays The drawback is that It could be revealed that
apply neural network preprocessing the protection system the algorithm for this the application of a
technique in data and restore the scheme is neural network to
numerical busbar distorted signals. computational renovate distorted
protection systems ( intensive current values is
NBPS) possible.
(Schweitzer et al.,1992) To investigate and To upgrade a A distribution system A distribution system Modifying traditional Advanced digital
analyze additional distribution system by with one source as arrangement with digital protection schemes distribution relays
features of more applying a new incomer and three distribution relays is requires buying and improve distribution
advanced digital microprocessor based outgoing feeders. utilized installation of protection and reduce
distribution relays relays additional equipment maintenance costs
(Belvaux et al.,1993) To improve Feeder protection and Decentralized system The software LSA The advantage for This protection system
substation protection digital busbar with a double busbar MASS is used using digital protection reduces the normal hard
by applying protection and a bus coupler is that it can integrate wiring between the
numerical controlled several programmable conventional
protection devices protection functions. components.
(Peck at al.,1993) To develop a new A numerical busbar Decentralized system ABB relays The advantage is that The new numerical
bay-oriented protection base on the amount of hardwire busbar protection (BBP)
structure that central unit and spare parts are provides improvements
consists of reduced when compared with
numerical busbar the conventional
protection relays systems
39
(Wong and Kalam, 1996) To develop a new Distributed Intelligent Decentralized based A prototype is The drawback for this A multi- agent system
approach for Power System on an Intelligent constructed at Unix method is that the which involves case-
intelligent system in Protection System for Power platform which uses an object oriented based and object
the protection Protection ( ISPP) object oriented database technique is based on oriented approach in the
management system C language which is improvement of a
complex for protection distributed intelligent
engineers system for protection in
power system is
achieved
(Funk and Ziegler,1997) To investigate the Numerical low Decentralized system Numerical relays The advantage for this The numerical busbar
design and service impedance differential scheme is that it is fast protection scheme
experience when busbar protection and easy for reduces maintenance
using numerical commissioning it expenditure due to
busbar protection complete self-monitoring
(Stockton, 1999) To investigate A directional and Decentralized method Modern overcurrent Can provide faster By utilizing the
protection of non-directional relays fault clearance times programmable logics the
distribution Systems overcurrent busbar protection, control, and
protection monitoring facilities are
substantial improved
(Mohindar and Sachdev, To design a A computerized A computer-aided A graphic interface is Training of operators A new computer-aided
software application switching schemes for system for designing developed to interact because of the system for interlocking
2000)
that can be interlocking logic in interlocking schemes with the user, application complex configuration schemes in a substation
employed to substation software, and data base/ that are based on is developed
generate Computer-aided design Interlocking scheme
interlocking (CAD)
schemes
(Gill et al.,2000) To implement and Busbar protection that A double busbar A real-time playback The scheme is The proposed system
test a utilizes the positive- configuration with five simulator is used capable of fault offers an effective
microprocessor- and negative- different circuits (RTPS) A delta- detection in the busbar protection scheme with
based bushar sequence models impedance relay is protection zone substantial
protection scheme applied improvements
(Brewis and Hearfield, To discuss issues to To investigate the A Single Busbar with Blocking and Unblocking Still made use of hard Implementation of
be considered in the performance of busbar One lncomer and busbar zone protection wiring for blocking scheme
2001 )
design of busbar protection schemes Single Busbar with scheme logic is used communication provided improvement
protection schemes that use Two incomers between the relay and its cost effective
instantaneous (Sectionalized)
elements
(Bo and Han, 2009) To analyse the To design a new Bewley-Lattice Global Positioning The complexity of Results show the
response to different integrated protection diagram for a multi- System (GPS) based detailed station developed scheme is
power systems and scheme that has high end transmission line technique detects the communication insensitive to all fault
fault conditions that response speed in is used fault using the generated network has to be types and has high
are based on the fault detection high frequency transient reduced accuracy and speed in
positional protection signals and records the fault detection
techniques time instant
corresponding to the
moment of the fault at
that busbar
40
(Chothani et al., 2012) To develop a low To use a real time A three phase busbar A Digital Signal The advantage of A lab scale
voltage busbar Digital Signal system with current Processor( DSP) using DSP based implementation of
relaying scheme and Processor( DSP) transformers, line TMS320LF2407A and a differential scheme differential relying
implement it in a based Differential components, fault trainer kit gives better stability/ scheme has been
laboratory Protection for Low switches and DSP there are no achieved. The scheme
environment Voltage Busbar trainer kit drawbacks has accomplished to
discriminate between
internal fault and
external fault on
busbars.
( Khodadadi and To develop a new The scheme is applied A Three-terminal A mathematical The scheme is based The proposed scheme
non communication- on a three-terminal transmission line is morphology (MM) filter is on high-frequency outclasses other non-
Shahrtash, 2013)
based scheme that lines in Iran’s used as the structure used for analyzing the components to communication schemes
can discriminate Transmission Grid to transients that are discriminate the because of the high
between external discriminate between captured. captured transients security and
and internal faults by external and internal that are triggered by dependability that it has.
taking note of the faults faults whether to .
busbar properties group them as high
transient, or low
transient or very-low
transients
41
2.8.3 Review of the protection methods for busbars based on digital protection
devices
A summarized analysis of the digital protection methods for busbar protection is
given in Table 2.3 below. Evans et al., (1997) described a series of reliability studies
that are based on two digital busbar protection schemes. They compared the
conventional busbar protection with the digital protection by applying the protection
scheme in a double busbar system with eight outgoing circuits. They discovered that
digital busbar protection is more reliable and has the ability to remain stable in the
event of external faults. Andersson and Brunner, (2002) looked into the benefits of
how to utilize the IEC61850 standard in substation automation. Their task was to
improve the overall system reliability for the busbar protection scheme and also to
reduce the number of hard wiring in the system. Stringer, (2003) used a busbar
overcurrent protection by applying reverse interlocking scheme. Although he made
use of digital relays but the communication between them was hardwired.
(Kasztenny, and Cardenas, 2005) looked into a new phase-segregated solution for
interlocking schemes for single-income distribution busbars and a high-end
microprocessor based protection schemes. They applied scheme in a centralized
busbar protection and in a distributed busbar protection. Apostolov, (2005) used
directional comparison bus protection scheme to explain GOOSE and GSSE
messages as defined in IEC 61850 standard. He substituted hardwired analog inputs
of the conventional IEDs with the GOOSE or GSSE messages.
Duncan and Self, (2005), Bo et al., (2006) and Zou and Gao, (2008) Investigated the
various protection schemes that use IEC61850 standard. Their method was to
replace hard wiring by implementing the IEC 61850 standard for communication to
improve the performance of the scheme. On the other hand Schwarz, (2007) used
basic implementation of the IEC 61850 using Intelligent Electronics Devices (IEDs) to
provide training for utility engineers. Skendzic et al, (2007) have evaluated the impact
of IEC 61850-9-2 standard Process Bus on Power System Protection and Control
Reliability by means of Sampled Value (SV) concept analysis. His proposes to
digitize the CTs and VTs so that they can get rid of hardwire connection between
CTs and IEDs and use Process bus for communication. Nan-hua and Xin-hua (2009)
used the IEC 61850 standard GOOSE communication to reduce complexity of an
action triggering function between the IEDs. Aguilar and Ariza, (2010) investigated
the communication protocols between multivendor IEDs. Zadeh et al., (2011)
developed and implemented a superimposed directional comparison technique for
42
bus protection (DCBPU) that is based on an IEC61850 process bus. They used the
fault detection and directional functions in all feeders and sent GOOSE messages via
a station bus to a central unit to implement distributed directional comparison bus
protection. The problem with this method is that when the central unit maloperates or
stop operating the whole system will collapse. Apostolov, (2011) investigated the
impact of IEC61850 standard on busbar protection. His objectives were to reduce the
cost of the system by utilizing process bus based on the differential protection
scheme. His aims were to apply IEC61850 standard for the bus differential schemes
communication by using two types’ devices as solution, namely: Peripheral units and
central units. His results showed that using process bus reduces the possibility of CT
saturation. The speed performance of the directional comparison bus protection
scheme by utilizing peer-to-peer GOOSE communication is also improved. (Tanaka
et al., 2012) developed a peer-to-peer connection between Merging Units (MUs) and
Intelligent Electronic Devices (IEDs) in order to separate the Sample Value (SV)
messages of 32 bays on the process bus.
43
Table 2.3: The methods for busbars based on the digital protection
PAPER Aim of the paper Method of protection Structure of the Used hardware / Advantages / Achievements
system software Drawbacks
(Evans et al., 1997) To explain a series of Digital busbar A double busbar Modem digital relays The advantage is that The two digital busbar
reliability studies that are protection making use system with eight digital busbar protection schemes has
completed on two digital of high impedance outgoing circuits protection is more the ability of the to
busbar protection based on one zone reliable compared to remain stable in the
schemes. discrimination the conventional event of external fault
busbar protection
(Andersson and To investigate the To improve the overall A single busbar with a New communication Complexity of By implementing the
benefits of utilizing system reliability in a one in-feeder and one technology known as implementing the IEC61850 standard a
Brunner, 2002)
IEC61850 standard in substation automation out-feeder IEC61850 standard is IEC61850 standard number of hard wiring
substation automation by using the IEC utilized will be reduced
61850 standard
(Stringer, 2003) To develop an enhanced A busbar overcurrent A network consists of digital overcurrent relay The drawback is that The Scheme provides a
technique of applying protection is applied one source and two the communication faster clearing for bus
sensitive bus fault by using zone or feeders between the relays faults and this is
protection by means of reverse interlocking uses hardwire. achieved by setting the
digital overcurrent relays scheme coordination closer than
traditional overcurrent
protection methods
(Kasztenny, and To investigate a new Distribution Busbar A Centralized busbar Phase-Segregated The advantage of The new
phase-segregated protection high- protection and Busbar microprocessor- using phase microprocessor based
Cardenas, 2005)
solution for interlocking impedance principle, Distributed busbar based Relays segregated it offers protection schemes
schemes for single- low-impedance protection extra modularity at the provide a faster tripping
income distribution principle , and IED level time with modern
busbars and a high-end interlocking schemes features
microprocessor based
protection schemes.
(Apostolov, 2005) To explain GOOSE and A directional A distributed A HMI system using IEC The advantage is that The scheme provides a
GSSE messages as comparison bus protection 61850 standard sampled values backup functions in a
defined in IEC 61850 protection is used interface substitutes complete cost effective
and what method they the hardwired analog integrated solution for
can be utilized for inputs of conventional protection, control,
different distributed IEDs which is joined metering, monitoring,
applications. with the GOOSE or event reporting,
GSSE messages that recording and analysis
substitute the
hardwired binary
inputs
44
(Duncan and Self, To Investigate the To replace hard wiring One incomer feeder The new IEC61850 The Software tools for Allows easy fault and
various protection by implementing IEC connected to a busbar standard UCA 2.0 the configuration misoperations and the
2005)
schemes that use 61850 for that consists of three protocol is used to allow require a number of implementation leads to
IEC61850 Standard communication to outgoing feeders communication between settings. The lack of cost reduction
improve the IEDS within the engineers who
performance of the substation understand the
scheme standard
(Bo et al., 2006) To investigate novel A conventional A centralized Central protections relay The protection A new integrated
integrated protection directional overcurrent protection system is using one scheme is user overcurrent protection
scheme for distribution protection systems is used communication standard friendly and scheme for distribution
system implemented into the such as IEC61850. manageable when it system is achieved by
relay comes to practical improving its
implementation performance
(Schwarz, 2007) To analyze the basic To understand what The application of IEC 61850-1, and IEC Vendors, users, and IEC 61850 Standard is a
implementation of IEC aspects of the tools for various tasks 61850-2,Communication system integrators new comprehensive and
61850 using Intelligent automation systems is networks and systems in have to go through a a powerful tool for
Electronics Devices covered by IEC61850 substations learning curve communication in
(IEDs ) and to provide training substation automation
for utility engineers.
(Lundqvist, 2007) To implement IEC To design a user Double bus with a bay ABB IED 670 series that The implementation of With long term
61850 standard in a friendly system for controller comply with IEC61850 IEC61850 has been a experience of numerical
user friendly way new substations standard have been challenge during the protection a user friendly
utilized development of the implementation of
ABB IED 670 series IEC61850 is possible
family
(Jianzhong and Xu, How to utilize GOOSE To investigate benefits Single and double High speed peer to peer There is still a lot that IEC61850 standard is
message to improve and impacts of busbar GOOSE communication needs to be believed to have bright
2007)
busbar protection, what protection application. researched for the window for protection
are the benefits of to improve protection application of the applications
IEC61850 and non- performance using IEC61850 in the
conventional instrument GOOSE messages protection field
transformers specially on busbar
(Zou and Gao, 2008 ) To investigate To analyzed a digital A system used is a IEC61850 Since the system is From analyzing the
distributed busbar distributed busbar distributed busbar communication standard not centralized Peer- results the proposed
protection scheme protection based on protection that is is used to-peer scheme showed high
reliability requirements without a central unit communication is reliable and feasible
used distributed busbar
protection
(Hakala-Ranta et al., How to improve To improve the A System Single Line Utilizing of ABB Better performance GOOSE increases
reliability and reliability and Diagram that consist REF615 devices/IEC compare to the operating reliability and
2009)
performance of the performance of the one IED at the 61850 standard traditional schemes/ It makes the system easy
protection system is system using GOOSE incomer with one is a new application to be extended and to
studied communication busbar and three IEDs therefore there is be reconfigurable
between protection at outgoing feeders plenty to understand
and control devices
45
(Nan-hua and Xin-hua Comparison study To compare speed Single Bus-bar single IEC61850 standard IEC61850 standard GOOSE communication
between traditional performance between and main transformer making use of GOOSE with the horizontal is a good solution for
2009)
method and GOOSE two methods utilized for the first experiment messages protection communication improving speed
method schemes for for busbar protection and a pairs of main technique .results were creates a large performance of a
busbar protection transformer and sub- analyzed using learning curve for scheme and it also
bus connection for the Shenzhen NARI engineers who are increases reliability and
second experiment Technologies used to traditional flexibility
protection schemes
(Brand, 2009) Extension of substation To apply the IEC Topology Based IEC 61850 standard Operators will need The complexity
with one new bay 61850 standard Interlocking scheme making use of GOOSE training because of the triggering function
without reengineering GOOSE Example with communication service complexity of using functions between IEDs
the substation and communication to connectivity part IEC61850 standard are reduced
retesting the existing reduce complexity of numbers and electric and. the standard data
part action triggering potential attributes model extensions to
function between IEDs hold the appropriate
topology attributes
(Tournier and Werner, To evaluate To compare different Five process bus IEC61850 standard Vendors and users A full redundant
architectures process bus solutions architectures are used as the have to go through architecture including
2010)
applicability for both based on real- time structured for the communication training and will be process bus device
transmission and constraints system infrastructure for the constraints at the provides a high reliability
distribution substations. process bus. beginning because the and High availability
Challenges such as new technology needs Seamless Redundancy
scalability, reliability, to be studied (HSR )shows a cost
real-time and cost effect for distribution
efficiency of theprocess substation
bus are considered
(Aguilar and Ariza, To investigate Time comparison A System Single Line Four IEDs from different Lack of people who Test show that
communication between traditional Diagram that consist vendors /Traditional has the knowledge of IEC61850 standard
2010)
protocols between hardwired and IEC one incomer fed to hard wiring method and the standard leads to based scheme is faster
multivendor IEDs 61850 based breaker one busbar with three IEC61850 standard problems when trying than a traditional wired
failure scheme outgoing feeders communication to configure the breaker failure scheme.
IEC61850 based
protection scheme
(Miranda and Netto, To improve reliability a To compare results A system with one bay IEC61850 standard The problem is that The use of replacing
complete scheme between hard copper consist of one circuit using GOOSE implementation is functional circuits with
2010)
needed to be developed wiring and the IEC breaker, two line messages for expensive and has process bus reduces
61850 standard switch and one earth communication and also complex solution electrical connections
communication for a switch controlled via using bistable involved
bay control IEC 61850 equipment simulator at a
laboratory environment
46
(Zadeh et al., 2011) To develop and A directional High speed peer-to- A six feeder model is The fault detection The proposed protection
implement a comparison bus peer communications- simulated in and directional scheme did not lose
superimposed protection unit based bus protection PSCAD/EMTDC functions in all feeders dependability and
directional comparison (DCBPU) is system is used software tool. The send GOOSE security due to the
technique for bus investigated in order to results are imported messages via a packet loss and delay
protection ( DCBPU) provide a high speed from COMTRADE files station bus to a central and it provides a high
that is based on an bus fault clearing in to MATLAB where unit to implement speed protection.
IEC61850 process bus the IEC61850 DCBPU is simulated distributed directional
process-bus comparison bus
environment. protection. The
proposed scheme is
cost effective.
(Tanaka et al., 2011) To develop a Process A low impedance A one-and-a-half A IEC61850-9-2, The drawback is that The process bus
Bus for Busbar differential busbar circuit breaker bus and Merging Unit (MU), the cost for relay application to busbar
Protection protection double busbar system Intelligent Electronic hardware will increase protection and (Voltage
arrangement is device ( IED) when compared to Selection Scheme) VSS
configured with a 32 existing systems. The achieve high reliability,
bays advantage is that the interoperability long
length and number of lifetime, and easy
copper cables can be maintenance.
reduced
(Kanabar, 2011) To analyze the impact of To investigate the IEC61850-9-2 Intelligent electronic SV are unlike GOOSE The results show that
Sampled Value (SV) correct measure for communication devices (IEDs) and messages. They are the protection device
loss and delay on the SV loss/delay by using network using Merging Unit (MU) /The not repeated several may lose security, and
protection functions for IEC61850-9-2 based Sampled Values (SV) power system model is times and therefore mis-operate during an
busbar and distance process bus was done in a simulated using the analysis of the external fault due to SV
communication laboratory PSCAD/EMTDC protection function is loss/delay in certain
network for digital environment to test software Results are important. Currently conditions.
protection system impact of SV analyzed using MATLAB IEDs used in
loss/delay on bus substation are not
differential and line signed for SV
distance protection contingencies
functions
(Tanaka et al., 2012) To develop a peer-to- Busbar protection A one-and-a-half A busbar protection The drawback is that The process bus
peer connection making use of Low circuit breaker bus and scheme with IEDs and the cost for relay application to busbar
between Merging Units impedance differential double busbar system MUs is used. IEC61850- hardware will increase protection and (Voltage
(MUs) and Intelligent protection arrangement is 9-2 process bus is used when compared to Selection Scheme) VSS
Electronic Device (IED0 configured with a 32 for communication existing systems. The achieve high reliability,
in order to separate the bays advantage is that the interoperability, long
Sample Value (SV) length and number of lifetime, and easy
messages of 32 bays on copper cables can be maintenance.
the process bus. reduced
47
2.8.4. Review of the protection methods based on simulation
2.8.4.1 PSCAD/EMTDC and EMTP simulation
A summarized analysis of the different methods for busbar protection that use
PSCAD/EMTDC and EMTP software package tools are given in Table 2.4.1 below.
Batty et al., (1997) improved unit protection scheme which works on the information
restricted in the superimposed currents formed by a fault current. They modeled a
double bus grid system with four sources and simulated it with the EMTP package.
Villamagna and Crossley (2006) used a test bench that consists of an Electro-
Magnetic Transients Program / Alternative Transients Program (EMTP/ATP)
simulator to perform the effect of the CT saturation on a differential relay for various
faults. Chothani, (2011) investigated the same problem as Villamagna and Crossley
(2006) but PSCAD/EMTDC software package was used for simulation. The
technique they used is based on the ability to detect all types of faults within its zone
and to be stable during out of the zone faults. (Zou and Gao, 2012) also used
PSCAD/EMTDC simulation software tool to develop a new technique with an extra
high speed for busbar protection making use of the propagation theory of the
traveling wave.
48
simulator and MATLAB software package are used to filter the noise from the current
signals.
49
Table 2.4: Methods for busbar protection based on simulation
PAPER Aim of the paper Method of protection Structure of the Used hardware / Advantages / Achievements
system software Drawbacks
50
( Zou and Gao , 2012 ) To develop a new To create a an extra A 230-kV busbar A PSCAD/EMTDC is The discrimination of The protection scheme
technique with an high-speed busbar system model is used as a simulation the fault is based on developed is virtually
extra high speed for protection scheme constructed software tool the transient immune to CT saturation
busbar protection making use of directional traveling
making use of transient directional wave
propagation theory traveling wave
of traveling wave
(Mohindar et al.,2000) To explain a digital A technique uses A SaskPower A EMTDC Software is The advantage of the The method used is
method for positive- and negative- substation with 230 used for transient- scheme is that it is not stable during CT
protecting busbars sequence and 138 kV busbars simulation affected by CT ratio- saturation
models was modeled mismatch
(Xu and Grasset, 2002) To investigate the To design a new A single busbar with a Analyses were Thousands of RTDS Results show that
effectiveness of algorithm that utilizes one in-feeder and one performed by an RTDS tests have to be done current phase
busbar differential phase comparison to out-feeder on each and MATLAB software in order to conclude comparison method
protection scheme improve stability of protection Zone environments the result improves stability of
according to busbar protection simulation busbar protection
reliability and under CT saturation
stability
( Dashti and Pasan, 2009) To design two To apply busbar A substation with a A differential relay Extensive studies The combined method
detectors for CT differential scheme in busbar that has four REB500 have to be performed provided fast and
saturation for order to develop the feeders and one 250- PSCAD/EMTDC and various reliable results and was
stabilizing busbar best CT saturation MVAR reactor simulator is used and combinations of able to detect CT
differential detector MATLAB software algorithms is saturation in all cases.
protection. package used to filter developed The
white noise from current disadvantage is that
signals the method may
create maloperation
51
Table 2.4.3: Wavelet transforms (WT)
(Jiang et al.,2001) To investigate the Differential Busbar Double busbar The protection schemes This scheme can be A good selectivity, fast
application of Protection are based on transient used to protect more response to the fault,
wavelet transforms Based Protection ( TBP) than one component immune to the
to detect faults in a and Wavelet transform ( that is in the network parameters of supply
power system faults WT) of the system. sources is achieved by
in order to develop a the new scheme.
new protection Primary system
principles based on interfacing is simple and
the wavelet easy to implement.
transform
(Wang et al., 2005) To develop a The protection method A distributed busbar A wavelet transforms The advantage is that A new numerical
scheme that uses a is based on polarities protection system in a are used it can improve the protection for busbar
new numerical of transient current single-phase busbar reliability of the that is based on polarity
protection for waves for identification systems distributed protection. comparison of transient
busbars of the internal and current waves is
external faults to achieved. This method
busbars makes use of wavelet
transform modulus
(Gafoor and Rao, 2006) To investigate the A Wavelet Transforms Four generators are A WT based busbar The proposed scheme The proposed scheme is
application of (WT) based scheme connected to two protection scheme is simple, fast, reliable prove to be fast, stable
Wavelet Transform for detecting busbar 220KV busbar and stable under and reliable in detecting
(WT) for detection of faults sections. various conditions the internal faults and
busbar faults and to discriminating them from
discriminate them the external faults.
from external faults.
(Wang and Dong, 2008) To decompose the To analyze the A single-line diagram The proposed scheme The complicated High frequency currents
fault current signals principle of wavelet of one 500kV power utilizes power frequency extensive series of were able to prove the
into different multi-resolution signal system currents and Alternative simulation studies had performance of the
frequency bands decomposition for Transients Program to be done in order to busbar protection
making use of the differential busbar (ATP) for simulation conclude the results scheme and the
wavelet multi- protection technique used is
resolution reliable and stable under
various conditions
(Popov 2009) Investigation on the To produce a transient A radial network with a The proposed protection The transient methods The scheme only makes
effectiveness of the based protection detailed dynamic scheme made use of a used were use of current
protection principles scheme that provides model of the Doubly- transient-based implemented in the measurements and
a fast fault clearing Fed Induction technique based on Field Programmable therefore it is cost-
time Generator (DFIG) discrete wavelet Gate Arrays (FPGA) effective. Lack of
wind turbine unit. transform (DWT) which can create sustained fault current
complexity to problems are solved by
protection engineers. the proposed protection
52
(Moni et at, 2010 ) To review different To overcome the A decentralized Microprocessor based Introduction of the The novel prospect to
aspects of busbar problems of CT busbar protection relay/ A Wavelet Packet WPT algorithm can design relays
protection schemes saturation and ratio scheme with individual Transform Analysis tool create maloperation if inconjuction with
mismatch of CT Bay Units (BU) was used for busbar the settings are not wavelet transform
secondary making use connected to a central fault analysis accurate analysis provides faster
of A Wavelet Packet unit ( CU) clearance of faults and
Transform Analysis can be used for busbar
tool differential protection
( Eissa, 2012) To develop a To differentiate A single 230kV An alternative transient The proposed Discriminating the faults
method that is between faults in a busbar model with four program (ATP) is used technique for faults during CT saturation,
based on extracting busbar protection sources and two to generate data and discrimination is given ratio-mismatch, and
the windowed zone or outside the feeders is simulated wavelet transform (WT) in the conventional early CT saturation is
wavelet transform of zone is used to test the techniques and successfully achieved by
fault generated performance of the therefore cannot the proposed technique
transients in order to proposed algorithm properly solve the fault
discriminate current-based
between busbar magnitude The
faults technique uses
additional measures.
(Deng and Suonan,2010) To distinguish Identify the internal Made use of one An inductance model The algorithm utilized The scheme proposed
between faults in fault and external fault busbar that is fed by and EMTP simulator for identifying the can be used to identify
and outside a bus- on bus-bar with two sources were utilized faults is complicated the internal and the
bar protection zone different current for the first time users external faults on a bus-
transformer (CT) by bar
using inductance and
the resistance
parameters
(Suonan et at., 2010) To analyze and To apply an effective A breaker-and-a-half EMTP simulation is used Busbar fault Based on the simulation
solve the impact of principle that is busbar system was to verify the results component network the results proved that
CT saturation capable to configured and used making use of the had to be analyzed in the principle works It is
discriminate between for applying the impedance based detail used to detect a CT
internal fault and protection scheme principle saturation
external fault making
use of ratio between
the fault components
of the voltage and the
fault components of
the differential current
of the busbar
53
2.9 Discussion
The literature review analyses the various techniques used for busbar protection.
Digital algorithms for busbar protection schemes in terms of speed, stability, security
and dependability have place a huge burden and responsibility among protection
engineers. The area of digital busbar protection at a distribution level has not been
subjected to active research and little work has been reported on the development of
algorithms that are suitable for protecting these busbars. Most proposed busbar
protection schemes developed by the previous researchers focused on the
transmission level. The studies have focused on the current transformer (CT)
saturation. These digital protection algorithms that were proposed in the past for
protecting busbars have been focused on using differential protection. This scheme
used various platforms applying different methods and simulators. All have been
concentrating on solving the CT saturation problem. No algorithm proposed in the
past has inherent immunity to the CT saturation. The stability of the algorithm during
the fault conditions is provided by using special means, such as: a special circuitry,
two algorithms working in conjunction, and choice of a restraint factor. The additional
circuitry increases the complexity of the protection scheme that leads to possibility of
incorrect operations due to malfunction of its components .Also an increase in the
number of components increases the total cost.
54
communication will be solved by means of using horizontal communication also
known as GOOSE messages between the IEDs
The application of protective (IED’s) that comply with the IEC 61850 standard has
proven to be the solution to a reliable protection of any power system. The IEC 61850
is a new communications standard that allows the development of new range of
protection and control applications that result in significant benefits compared to the
conventional hard wired solutions. It reliably supports interoperability between the
protective relays and control devices from different manufacturers in the substation.
This is a necessity in order to achieve substation level interlocking, protection and
control functions and to improve the efficiency of microprocessor based relays
applications.
2.11 Conclusion
This chapter began with the overview of the busbar protection in the electrical power
systems. A wide-range review of various developments completed by researchers in
the field of busbar protection is also presented. Although previous researchers
focused on protecting busbars at the transmission level there is still a large amount of
work that needs to be done. Protection of busbars at the distribution level has been
neglected for a long time and most distribution substations do not have dedicated
protection schemes. When it comes to busbars in distribution networks protection can
be accomplished mainly in two different ways, namely: blocks able for overcurrent
protection at the incoming bays to the switchgear and locating arc detectors inside
the enclosure. This thesis is only concentrating on improving the busbar blocking
scheme for a distribution network. The reason for this is because; based on the
review it was found that this scheme is the most convient for this type of networks.
Chapter Three presents the theoretical aspects of busbar protection. It also covers
the protection schemes that are currently used for busbars at the distribution level.
55
CHAPTER THREE
THEORETICAL ASPECTS OF BUSBAR PROTECTION
3.1 Introduction
Busbars play an important role in power transmission and distribution. They are
employed as a central distribution point for all feeders. In the case of a fault, current
on the busbar becomes high, resulting to mechanical destruction which would affect
all feeders. The problem is that the busbars are usually left out without specific
protection because it is assumed that they have high reliability. It was feared that if a
busbar had a dedicated protection scheme it might mal-operate and end up affecting
the whole power system. The other reason was that back up protection was assumed
to be good enough to provide decent bus protection. Due to problems such as loss of
loads and long time to clear the faults, when using back up protection, a dedicated
busbar protection scheme is required (Hodgkiss, 1960).
When it comes to a dedicated busbar protection the high speed operation, reliability
and stability is in demand. Instability of the power system might be caused by case of
a failure to trip during an external fault or false tripping during service of the busbar.
This will lead to a complete blackout. Precision and reliability are important factors
when designing a busbar protection scheme. Literature review has shown that small
distribution substations used for medium voltage make use of overcurrent relays to
provide busbar protection and large substations make use of differential protection
schemes (Mohan and Chatterjee, 2010).
This chapter explains a busbar theory at the distribution network level. It also covers
the busbar protection schemes that are currently in use and their operation. The
theory of the overcurrent protection devices is also explained. The digital busbar
scheme is also considered in this chapter. In 3.2 a number of busbar protection
schemes are explained, section 3.3 describes the overcurrent protection relays, 3.4
considers the digital protection application, 3.5 presents the reliability considerations
and 3.6 gives conclusion.
56
Frame-earth protection
Differential protection
Phase comparison protection
Reverse blocking / interlocking protection
The scheme for a system protection is used at small substations, while phase
comparison protection for busbars has become obsolete. A detailed explanation of
the frame earth protection, differential protection, and reverse interlocking protection
for busbars is discussed further.
57
Figure 3.1: The Single-Busbar Frame-Earth Protection (Elmore, 2004).
)
58
3.2.5 Frame-Earth Scheme - Double Bus Substation
In this system protection is provided as single bus insulation with additional trip
circuits connected to the auxiliary bus as shown in Figure 3.3 to operate for all faults.
Figure 3.3: The Frame – Earth Scheme - Double Bus Substation (NPAG, 2002)
A check system is used to provide security to the equipment against events caused
from operation due to human error or mechanical shock. This check system is not
applicable for small equipment. If the low voltage wiring is faulty the check system
must prevent the operation caused by the current passing to earth via the switchgear
frame. The operation is provided by energizing the protection relay using the neutral
current. If the check system for the neutral is not offered, the frame earth relays will
operate after a short time delay (NPAG, 2002).
59
3.2.6 Differential protection for busbars
Differential protection operation directly uses the Kirchhoff’s current law where it is
required that the currents going into a node are equal to current leaving the node.
When the sum of the currents is not equal to zero by comparing their magnitude or
phase the difference is referred as a fault current as shown in Figure 3.4. When the
busbar has a fault also known as internal fault, the total currents entering it is not
equal to zero. If the fault is on the bus the sum of the all currents.
Figure 3.4: The Differential protection for a busbar (Andrichak and Cargenas,1995)
There are numerous methods can be used to apply the scheme.. Figure 3.5 shows
an arrangement where one relay is employed with several CTs connected in parallel.
This method is also useful for earth fault protection system for a busbar. An additional
protection for phase faults can be achieved by connecting balanced group CTs in
each phase in conjunction with three phase element relay as shown in Figure 3.5
below. In order to have a good performance for the scheme it is recommended to
configure the phase and earth fault settings to be identical (Andrichak and Cargenas,
1995) and (Mohammed, 2005).
60
Figure 3.5: Basic Circulating Current Schemes (NPAG, 2002)
Figure 3.6: The Zones of Protection for Sectionalized Busbars (NPAG, 2002)
In a double busbar layout system the two busbars are handled as separate zones.
Where the busbar is coupled, the zones will overlap. This system is designed in such
a way that an isolator switch is connected between the busbars. It must be
associated to an appropriate zone by means of early make and late break auxiliary
contacts. This is to guarantee that when the isolators are closing, the auxiliary
switches operate before the main contacts of the isolator. When the isolators are
opened, their main contacts open before the auxiliary switches. The secondary
circuits of the two zones are briefly paralleled and are linked through the circuit
isolators during the transfer operation.
62
3.2.6.4 Location of the Current Transformers
In an ideal protection system the zones should overlap and have a separate
discrimination protection circuits. The system is designed in such a manner that
where the zones overlap there should be a circuit breaker across to cover both
zones. With this system CTs must be installed on both sides of the circuit breaker as
shown in Figure 3.7a. This is an ideal arrangement for basbar zone protection
because it covers all primary circuits. Figure 3.7b shows an arrangement where the
CTs are installed at one side of the circuit breaker. This is not ideal because it leaves
a small region of the primary circuit unprotected. This unprotected region is called
short zone. The disadvantage for this arrangement is when a fault is at the short
zone: the circuit breaker will open but the fault current will still be flowing if there is a
source of power in the circuit. This is not good for the system. A special protection
needs to be provided to detect faults in the “short zone” and a trip signal to be sent to
the next upstream breaker.
Figure 3.7a: Current transformer mounted on both sides of the breaker (NPAG, 2002)
Figure 3.7b: Current transformer mounted only on a circuit side of the breaker with
fault shown not cleared by the circuit protection (NPAG, 2002)
63
incomer is set to trip for a fault at the busbar unless it is blocked by any overcurrent
relays on the feeder. A time grading is required to coordinate these overcurrent relays
in order to avoid race conditions. The advantages for utilizing this scheme are as
follows:
Modifications for the scheme to suit substation extension are easy.
It utilizes overcurrent elements that are already supplied by the feeder
protection relays.
It requires minimal cost in comparison with the differential protection scheme.
It has faster fault clearance in comparison to a system that utilizes trip
originated by upstream feeder protection (Kasztenny and Brunello, 2004).
Figure 3.8: The Illustration of the interlocking scheme (Kasztenny and Brunello, 2004).
64
3.3.1 Principles of Time/Current Grading
Correct relay co-ordination can be achieved by utilizing three possible methods,
namely:
Time co-ordination
Current co-ordination
Combination of time and overcurrent
The general aim of all three methods is to provide accurate discrimination (So and Li,
2000),
Figure 3.9: A characteristic of two relays with different current/time settings (NPAG,
2002)
3.3.2 The standard Inverse Definite Minimum Time (IDMT) overcurrent relays
IDMT relay has current/time tripping characteristics that are varied according to the
requirement of the protection devices utilized in the network. In order to have a
correct design it is required to use IEC60255 standard that defines the characteristics
of the IDMT relays. The standard characteristics are as follows (Elmore, 2004).
Standard Inverse
Very Inverse
Extremely Inverse
Definite Time
Table 3.1: Characteristics of the relay based on the IEC 60255 standard
66
Where:
t is the trip time.
TMS is Time Multiplier Setting.
I r current setting is the Plug setting multiplier (PSM)
Typical relay errors based on the technology utilized are shown in Table 3.2 below in
high fault levels grading margin that is fixed can be used in order to have short relay
operating times. Grading margin can be defined by modifying the relay closest to a
fault to have +2E as maximum for timing error. E is the timing error, (So et al., 1997)
(NPAG, 2002).
67
Table 3.2: The relay timing errors with standard IDMT (NPAG, 2002).
The equation calculating minimum time interval of grading margin, t ' shown below:
2 E ECT
t' R t t CT t o t s
100
Where:
E R = Relay timing error (IEC 60255-4)
ECT = is the CT ratio error (%)
t = is the rating time of relay nearer the fault (s)
t CB = is the CB interruption time (s)
t o = relay overshoot time (s)
t s = safety margin (s)
For the Definite Time characteristics the CT error allowance is neglected, hence:
2E
t ' R t t CT t o t s
100
3.4 Digital protection
Digital protection application for busbars has lagged behind in comparison with the
application of the protection functions. Generally static technology is still utilized in
busbar protection schemes, but now introduction of the digital technology has
become mature enough to be considered for busbar protection. Digital technology
provided multiple communication paths for protection relays to link to various units.
Figure 3.10 shows the algorithm adopted for distributed processing of the measured
values (Hodgkiss, 1960); .Each feeder has a Processing Unit (PU) that utilizes the
storing information such as currents, voltages, circuit breaker and isolator status, etc.
It uses high-speed fibre-optic for communication to link data to a Central Unit (C U). In
large substations it is required to utilize more than one central unit while in small
stations co-location is used for the units.
68
Figure 3.10: Algorithm adopted for distributed processing of the measured values
(NPAG, 2002)
The central unit performs calculations required for the protection functions. The
available protection functions are as follows:
Protection monitoring
Backup over-current protection
Breaker failure
Dead zone protection
In order to monitor functions such as circuit breakers and isolator disturbance a
recording function must be provided.
3.6 Discussions
When it comes to the capabilities IEDs is considered as the ideal devices for the
thesis. ABB IEDs are chosen and IEC 61850 standard is used as the platform for
communication. These IEDs are selected based on their functional flexibility and
adaptive relaying.
3.7 Conclusion
This section covered the busbar theory with protection functions and applications in a
distribution environment. The ability, advantage and disadvantages between busbar
protection schemes utilized are discussed. The theoretical aspects that require
understanding in order to perform busbar protection studies using various schemes
are described.
The next chapter describes simulation studies of a selected distribution network done
to design its protection scheme and analyze its performance.
70
CHAPTER FOUR
SIMULATION STUDIES OF THE DISTRIBUTION BUSBAR PROTECTION
SCHEME
4.1 Introduction
A distribution busbar reverse blocking scheme is designed and simulated in this
chapter. A DIgSilent software package is the suitable program that is utilized for the
simulation.
A model of the distribution network is selected and its parameters are calculated. The
fault currents are calculated for different fault locations. Various types of faults are
applied to the network in order to be able to configure the setting of the protective
devices. Two case studies are considered:
Conventional relays are used for design and simulation of the reverse blocking
scheme a case study 1.
IEC 61850 standard compliant relays (IEDs) are used for design and
simulation of the reverse blocking scheme the case study 2.
ABB relay models from the DIgSilent library are used in the simulation.The effect of
the different fault levels over the fault clearing times and the stability of the network
are investigated. The protection devices time grading and co-ordination setting are
analyzed in order to have an efficient busbar protection scheme. The results are
compared and analyzed.
72
simulation. The distribution network that is selected and modelled for simulation has
the following parameters as shown in Table 4.1.
The data shown in the above table are completed on the network system model in
DIgSILENT shown in Figure 4.2(a) where the result boxes in the blue colour
represent the active, reactive and apparent power below. Figure 4.2(a) also show
result boxes in the red colour represent voltage in kV, voltage in p u and the phase
angle.This distribution network is simulated and analyzed The objectives for the
experiment are to develop different case studies of load flow analysis, short circuit
analysis and execution of load flow calculation. These assessments are done in order
to design the protection of the distribution network system.
73
Figure 4.2(a): One line diagram of the load flow calculation for the studied distribution
network
4.2.3 Load flow results
Once the load flow is successfully executed the results for the three phase voltages
and three phase currents are shown in Figure 4.2(b) below where phase A is
represented in red, phase B in yellow and phase C in blue. The results show that the
voltages and currents are balanced with a 120 degrees phase shift. This is recorded
during normal condition in the distribution network. Table 4.2 shows different voltage
levels in the network from bubar1 up to busbar 4, Table 4.3 shows voltage deviation
profiles of the calculated load flow which are within IEEE standard 141-1993 voltage
criteria.
74
Figure 4.2(b): Three phase voltages and currents for the simulated distribution network
Table 4.2: The load flow results for the different voltage levels in the network
Table 4.3: The load flow results for the busbar voltages
The results analyses show that voltage at the load buses are generally averaging
around 0.96 per unit. The loading on a transformer and cables are within normal
working capabilities. The generator reactive outputs are within the limits that are
75
defined by the generator capability curves. The voltage criteria are within the IEEE
standard 141-1993.
The next procedure is to calculate the short circuit currents as a preliminary step
before the design of the protection scheme.
balanced systems. The equations used in the DIgSilent software to calculate the
network impedances for each element are represented in Table 4.4,
Table 4.4 Equation for calculations of impedance for each element in the distribution
network
Element Equation
Upstream V2
Z eq n
S SC
Busbar One
X 0.15 10 3 , R is negligible, Vn 66kV
Transformer T1 V2
Z B ( LV ) B
ST ZT Z B X zpu
,
3
Busbar Two X 0.15 10 , R is negligible, Vn 66kV
Line One Z line1 R1 X 1
Line Two Z line1 R2 X 2
76
Busbar Three
ZB
P1 jQ1
SB , Vn 11kV
Busbar Four
ZB
P1 jQ1
, Vn 11kV
SB
Load One cVB2
Z load1 COS 1 PF
SB
Load Two cVB2
Z load2 COS 1 PF
SB
Where
V n is the nominal voltage
V B is the base voltage
S b is the apparent power
P is the active, power
Q is the reactive power
X is the reactance of each component
R is the resistance for each component
PF is the power factor
c is the voltage factor
cVn2
Zf (4.1)
Sf
Zf
Rf (4.2)
2
X
1
R
X
Xf Rf (4.3)
R
Vg2
X d'' x K g
Sg
(4.4)
X d''
Rg
X
R (4.5)
Vn c
Kg
V g 1 xd sin g
''
(4.6)
Where:
X d'' is the sub-transient reactance of the generator in ohms
Rg
is the resistance of the generator in ohms
Kg
is the voltage correction factor in per unit
x d'' is the per unit sub transient reactance of the generator in per unit
Vg
is the nominal generator voltage
Vn is the nominal system voltage
Sg
I s the rated generator capacity
sin g
is the power factor of the generator in per unit
X t Zt2 Rt2
(4.9)
Zt
Where is the positive sequence impedance of the transformer in ohms
Rt
is the resistance of the transformer in ohms
Xt
is the reactance of the transformer in ohms
uk
is the impedance voltage of the transformer
78
S t is the rated capacity of the transformer
Vt is the nominal voltage of the transformer at the high or low side
I t is the rated current of the transformer at the high or low side
Pkt is the total copper loss in the transformer windings
79
Once these calculations are completed the next step is to apply them into the
modeled distribution network in the software environment of the DigSilent package
The circuit diagram of the fault point, boundary conditions and a description of the
different short circuits given above are shown in Table 4.5 below
Table 4.5: Different types of short circuit faults in the three phase network
The short circuit currents are applied to check the rating of the equipment in the
network during the planning stage. In this case the interest is based on the maximum
expected currents and minimum expected currents to manage the design of the
protection scheme. Therefore the protection devices are required to protect the
distribution network and not to fail when faults occurs. The tool used for the short
80
circuit analysis is the DIgSILENT simulation software. This tool has of functions such
as co-ordination of protection equipment for system planning and protection relay
settings for system operations. Once all parameters of the network are complete the
next step is to calculate the required short circuit current levels making use of the
DIgSILENT simulation tool. Different case studies are developed with utilization of a
Single-Line-Diagram (SLD). The short circuit location and its requirements are
chosen. The initial three phase short circuit current I k'' , single phase to earth short
circuit current I kl'' , and the peak short circuit current I p of the system operation are
simulated and taken into consideration. The initial short circuit current is considered
as the sum of an AC symmetrical and DC decaying components. A basic
differentiation is made between the components for faults far from the generator and
the components for faults closer to the generator. The maximum and minimum short
circuit current values are calculated using the IEC 60909 standard. The short circuit
current calculation for the fault levels involves also the short circuit power S k'' . The
The short circuit are applied in to the distribution network at specific locations namely:
busbar B2 (substation2/2), load 1(line B2 to B3) and load 2 (Line B2 to B4)
respectively as shown in Figure 4.3 where boxes in the red colour represent short
circuit power, initial symmetrical short current and peak short circuit current.
81
Figure 4.3: One line diagram of the studied faults in the distribution network
82
Figure 4.4: Three phase voltages when short circuits are introduced in the distribution
network into a busbar B2 (substation2/2), a load 1(line B2 to B3), and a load 2 (Line B2
to B4) respectively
4.3.7.1 Results for the single phase to ground and three phase short circuit on the busbar B2
The results for the single phase to the ground short circuit are shown in Table 4.6.The
fault location on the busbar B2 is shown in blue and the results show that the fault is
at the phase A to the ground. The fault location on the feeder is shown in green. The
results shows that the two winding transformer in the station 1 is the power
83
component that is affected .The line to ground voltage zero, positive and negative
sequence are shown in brown and the zero, positive and negative sequences
currents are shown in red. In Table 4.7 the three phase short circuit results on the
busbar B2 in the station 2/B2 are shown. The same colour codes as for the single
phase to the ground short circuit are used to show the results. The fault location is on
the busbar B2, all three phases are affected and both feeders are affected.
Table 4.6: Results of the single phase to the ground short circuit on the busbar B2
Table 4.7: Results of the three phase short circuit on the busbar B2
84
4.3.7.2 Results for the single phase to ground and three phase short circuits on the line (B2
to B3) for the load 1
The results for the single phase to the ground short circuit are shown in Table 4.8.The
fault location is shown in blue colour and the result shows that the fault is on the
phase A to the ground. The fault location is shown in green colour. The results show
that the two winding transformer in the station 1 and the line (B2 to B3) feeding load 1
are affected by this fault. The line to ground voltage zero, positive and negative
sequences are shown in brown colour and for the currents are shown in red colour.
Only positive sequence is affected by this fault. In Table 4.9 the three phase short
circuit results at the line B2 to B3 for load 1 are shown. The same colour codes as for
the single phase to the ground short circuit are used to show the results. Three phase
fault is located on the line (B2 to B3) and it does not affect the line (B2 to B4) that
feeds the load 2.
Table 4.8: Results of the single phase to ground short circuit results on the line (B2 to
B3) for the load 1
85
Table 4.9: results of the three phase short circuit on the line B2 to B3 for load 1
4.3.7.3 Results of the single phase to the ground and the three phase short circuits on the
line (B2 to B4) for the load 2
The results for single phase to ground short circuit are shown in Table 4.10a.The fault
location is shown in blue colour. The result shows that the fault affects only phase A
to the ground. The fault location on the feeder is shown in green colour. The results
show that the two winding transformer in the station 1 and the line (B2 to B4) are the
electrical components that are affected by this fault .The line to ground voltage zero,
positive and negative sequences are shown in brown colour and the currents are
shown in red colour. Only the positive sequence is affected by this fault. In Table
4.10b the three phase short circuit results at the line (B2 to B4) for the load 2 are
shown. The same colour codes as for the single phase to the ground short circuit are
used to show the results. Three phase fault is located on the line (B2 to B4) and it
does not affect the line (B2 to B3) that feeds the load 1.
86
Table 4.10a: Single phase short circuit results for the line B2 to B4 for the load 2
Table 4.10b: Three phase short circuit calculation for the line B2 to B4 for the load 2
87
4.3.7.4 Application of the results from the short circuit current calculation
Table 4.11: The simulation results done in all three locations in the distribution network
Table 4.11 represents the simulation results for all fault types and locations in the
distribution network. The results give an indication for all the short circuit currents at
their locations where the protection devices have to be installed. From the results it is
now possible to select a specified setting and fault rating the protection devices that
are used for the scheme.
The next procedure is to configure the protection devices based on the result in Table
4.11.
88
characteristic the relay setting are selected is such a manner that the relay furthest
from the power source will operate. This method allows the relay with the lower
setting to operate first disconnecting the load close to the fault. The disadvantages of
this type of protection are that selectivity is low at high values of short circuit currents
and also the relay has poor discrimination.
89
Figure 4.7: Inverse-time characteristics of overcurrent relays
A combination of the overcurrent protection elements above are selected and used in
this thesis. Some parameters of these elements needed to be completed using
DigSILENT software and therefore certain requirement had to be followed. The basic
requirements when setting protection for a busbar scheme is that it must be stable
when the fault occurs outside the bus and it must also be with reliable operation
speed to minimize the damage from spreading through the network. The DigSILENT
simulation software poses some recommendation that needed to be followed. The
recommendations are as follows (DigSILENT basic training notes 2007:115):
The protection devices that behave upon a single switch must be kept in the
same cubicle.
The protection devices that behave upon a number of switches linked to the
same busbar should be placed in that specific busbar.
The protection devices that behave upon a number of switches linked into the
same busbar system must also be kept in the same station.
The protection device must be stored in the same folder with its instrument
transformers.
The definite time and the inverse time characteristics will be used further in the
scheme. The definite time characteristic is for maximum short circuit created by three
phase faults. The inverse time characteristic is for minimum short circuit created by
single phase to ground faults. These characteristics are combined and applied by
each protection devices that are used.
90
suitable grading time margin between the two curves with 0.4 seconds for the
electromechanical relays and 0.3 seconds for the digital relays.
Figure 4.8: The Grading time determination for the relays (distribution Automation
Handbook, 2011)
91
relays are used when the operating time needs to be speeded up and they are
suitable for high magnitude fault currents. The principle of inverse-time relay is the
higher the magnitude of the fault current the shorter the operating time. Inverse time
protection is suitable for the distribution network that is used in this thesis. Protection
relays usually have four characteristic time-current curves. They based on IEC
60255-151 and BS 142 standards and are as follows:
Normal inverse.
Long time inverse.
Very inverse.
Extremely inverse.
The operating time of the relay is calculated using the equation below:
k
t
(4.20)
I
1
I
Where:
k is an adjustable time multiplier
I is the measured phase current value
I is the set start (pickup) current value
and are curve set-related parameters
When the normal, very or extremely inverse time characteristics are used the relay
should start once the energizing current exceeds 1.3 times the set start current
according to the standard. The long time inverse relay should start once the
energizing current exceeds 1.1 times the set start current. The parameters for and
are define in the Table 4.12 below (distribution Automation Handbook, 2011) This
thesis only focuses on Time–graded protection as it is used for developing an
improved reverse blocking scheme for busbar protection at the distribution level.
Types of characteristic
Normal inverse 0.02 0.14
Very inverse 1.0 13.5
Extremely inverse 2.0 80.0
Long-time inverse 1.0 120.0
92
The used equipment in the distribution network for the reverse blocking protection
scheme is the ABB conventional relays and ABB IEDs. These protection devices are
used in the simulation with different fault events being implemented within the
distribution network. These devices are configured in such a way that their settings
must be capable of operating for both phase and earth overcurrent conditions.
Figure 4.9: Flowchart for Setting Blocking Scheme –for a Single Incomer Substation
93
4.6.1 Case study one
Conventional relays are used for protection implementation in this case. One relay is
installed at the main incomer on the LV side of the transformer, named (Relay C).
One relay named (Relay A) is installed on the outgoing feeder that feeds load 2 and
the other relay named (Relay B) is installed on the outgoing feeder that’s feeds load
1. The aim of this study is to execute a short circuit current in the network where each
relay is located making use of the IEC 60909 standard method. Two sets of
simulations are done for each protection device, namely minimum short circuit with
single phase to ground fault type and maximum short circuit with three phase fault
type. A combination of inverse time and definite time characteristics are used for the
busbar protection. The inverse time is selected for longer grading time. The definite
time element is selected for shorter grading time. The reason for this is to have a
protection scheme that is effective and has high sensitivity. The grading time for the
different stages is discussed in Chapter three.
4.6.1.1 Single phase to ground fault on line (B2 to B4) for relay A
Time overcurrent characteristics, pickup current and time dial for minimum short
circuit current had to be calculated using equation (4.20) and applied for the relay A.
For this project a suitable settings for relay A in this case study are shown in Table
4.13 below.
Table 4.13: Relay A setting for the single phase to ground fault
A short circuit current for a single phase to ground fault at the feeder A (line B2 to B4)
is simulated as shown in Figure 4.10 below also referred as external fault for the
busbar protection scheme. The data shown in Figure 4.10 where the result boxes in
the blue colour represent the short circuit power, initial symmetrical short current and
peak short circuit current, result boxes in the red colour represent three phase voltage
in kV. Using IEC 60909 methods the minimum power fault level S k'' of 1.96MVA, a
short circuit current I k'' of 0.309kA and a peak current I p of 0.821kA are recorded as
94
Figure 4.10: Single phase to ground fault in a line (B2 to B4)
Table 4.14: Minimum short circuit calculation results according to the IEC 60909
standard
A time/current curve of the Relay A is used to analyze the results and the scheme
performance. Two types of elements are used for this curve namely inverse definite
minimum time (IDMT) and definite time (DT) for earth fault currents. This time/current
curve definition shows for the single phase to ground fault simulated in Figure 4.10
that the tripping time issued by the relay A is 0.527 seconds. The IDMT and DT
elements displayed tripping time of 9999.99s as shown in Figure 4.11 below. When
the protection element displays 9999.99 sec for the tripping time it means that it did
not see the fault and therefore it will not trip the relay (DigSILENT GmbH, 2009:31).
The phase elements for both IDMT and DT characteristics are not affected by this
fault type therefore they did not trip. Table 4.15 below shows the results for the relay
A tripping times. Since the fault is a single phase to the ground the Ground Time
Overcurrent Element (51N) is active and it tripped at 0.527 seconds.
95
Figure 4.11: Station2\B2 Relay A protection response for a minimum single phase to the
ground fault with a clearing time of 0.527 seconds
Table 4.15: The results for the relay A protection response for a minimum single phase
to the ground fault
96
Figure 4.12: Relays Protection response to a single phase to ground fault for the
outgoing feeders to loads 1 and 2
The network shown in Figure 4.10 has a busbar B2 with two outgoing feeders that
feed the load 1 and load 2. The simulation focuses on protecting the busbar B2 and
the line feeding Load 1 and load 2. Figure 4.12 above shows the tripping
characteristics for both feeders when single phase to ground fault occurs on line (B2
to B4). Relay B tripping characteristic is represented in green color and this for the
relay A in blue color. It can be seen from the results that relay B does not see the
single phase to the ground fault that occurred in the line (B2 to B4) that feeds the load
2. Therefore the Relay B tripping time displayed 9999.999 seconds for both the IDMT
and the DT elements. This means that for the fault at the line (B2 to B4) the relay B
did not trip. This ensured that the protection is correct and no false tripping or
unwanted tripping will be experienced when the scheme is implemented.
97
Figure 4.13: Relay A time-overcurrent response and Relay C acting as back-up
protection for the single phase to ground fault.
The single phase to ground fault indicated in Figure 4.10 is picked-up by two
protection devices. With utilization of an IDMT and DT earth element for the relay A
and the IDMT and the Instantaneous Overcurrent (IOC) earth elements for the relay
C, a sequence tripping response of 0.527 and 1.581 seconds is recorded as shown in
Figure 4.13.The phase element tripping times displayed are 9999.99 seconds for both
relay A and C meaning that they did not trip for this fault. The results also show that
the relay A represented in blue colour which is close to the fault has responded in
0.527 seconds while the direct up-stream relay C represented in red followed with a
response delayed with 1.581 seconds. This algorithm suggests that should the relay
A fail to operate then the next up-stream relay C will operate in 1.581 seconds.
Therefore the relay C operates as a backup protection for the relay A.
4.6.1.2 Three phase fault in the line (B2 to B4) for the relay A
The three phase fault in the line (B2 to B4) is known as external fault for the busbar
B2 protection scheme. Time overcurrent characteristics, pickup current and a dial
time for maximum short circuit current had to be calculated using equation (4.20) and
applied for the relays A. The suitable settings for the relay A in this case study are
shown in Table 4.16 below.
98
Table 4.16: Relay A setting for three phase protection
The next step is to simulate the maximum short circuit current in the line (B2 to B4) as
shown in Figure 4.14 (a) The data shown the result boxes in the blue colour represent
the short circuit power, initial symmetrical short current and peak short circuit current
.Figure 4.14 (b) shows the recorded results for the three phase voltages and currents
in the line (B2 to B4) when a short circuits are introduced in the distribution network
The execution time for the short circuit event is 0.1 seconds. During the short circuit
period the phase current increase and the phase voltage decrease creating the
system to be unbalanced. The maximum fault level S k'' of 315.97MVA, a short circuit
current I k'' of 16,584kA and a peak current I p of 44,089kA are recorded as shown in
Table 4.17 below. After the 0.1 seconds the fault is cleared in the line (B2 to B4) and
the phase voltages and currents goes back to their normal condition.
Table 4.17: Maximum Short circuit calculation results according to IEC 60909 standard
99
Figure 4.14(b): Three phase voltages and currents in the line (B2 to B4) when three
phase fault is introduced in the distribution network
Figure 4.15: Relay A protection response for the three phase fault with a clearing time
of 0.100 seconds for the DT and 0.324 seconds for the IDMT element respectively
A time/current curve of the Relay A is used to analyse the results and the
performance of the protection scheme. Two types of elements were used for this
curve namely Inverse Definite Minimum Time (IDMT) and Definite Time (DT) for the
100
three phase fault currents. This time/current curve definition shows for the three
phase fault simulated in Figure 4.14(a) that the tripping times obtained for the relay A
are 0.100 seconds for the DT and 0.324 seconds for the IDMT elements as shown in
Figure 4.15 above. The earth element displays 9999.99 seconds for the tripping time.
This fault only affects the phase fault currents therefore only the phase faults
elements tripped as shown in Table 4.18.
Table 4.18: The result for the relay A protection response to the three phase short
circuit
Figure 4.16: Protection responses of the Relay A and B to the three phase fault
Figure 4.16 above shows the simulated tripping characteristics for both feeders line
(B2 to B3) for the load 1 and the line (B2 to B4) for the load 2 when a three phase
101
fault occurs. It can be seen from the results that the relay B shown in green does not
see the three phase fault that occurs in the line (B2 to B4). Therefore Relay B tripping
time is displayed as 9999.999 seconds for both the IDMT and the DT elements. This
means that for the fault in line (B2 to B4) the relay B did not trip. This ensures that the
protection is correct and no false tripping or unwanted tripping will be experienced
when the scheme is implemented.
Figure 4.17: Characteristic of the Relay A time-overcurrent response and of the Relay C
acting as a back-up protection device for the three phase fault
The three phase fault indicated in Figure 4.14 (a) is picked-up by A and C protection
devices. With utilization of the IDMT phase element for the relays A and C, a
sequence tripping response of 0.324 and 0.810 seconds is recorded as shown in
Figure 4.17.The earth elements tripping times are 9999.99 seconds, meaning that
they did not trip for this fault. The results also show that the relay A which is close to
the fault responses in 0.324 seconds while the direct up-stream relay C follows with a
response delayed by 0.810 seconds. This algorithm suggests that should the relay A
fail to operate then the next up-stream relay C will operate in 0.810 seconds.
Therefore the relay C is used as a backup protection for the relay A. For faster
tripping time the DT characteristic of the relay A responds in 0.100 seconds and the
instantaneous characteristic for the relay C delays by 0.420 seconds respectively.
This protection method makes use of a scheme called reverse blocking as explained
in Chapter two.
102
4.6.1.3 Single phase to ground fault in the line (B2 to B3) for the relay B
Same algorithms as the single phase to ground fault in the line (B2 to B4) for the
relay A are implemented for the single phase to ground fault in line (B2 to B3) The
difference between the two algorithms is the earth protection settings for the relay B.
Time overcurrent characteristics and time dial for minimum short circuit current had to
be calculated using equation (4.20) and applied for the relay B. The calculated
settings for the relay B in this case study are shown in Table 4.19 below. The data
shown in Figure 4.18 where the result boxes in the blue colour represent the short
circuit power, initial symmetrical short current and peak short circuit current, result
boxes in the red colour represent three phase voltage in kV and documented in a
sequence as show below. The minimum fault levels are recorded as shown in Table
4.20.
Table 4.19: Relay B setting for earth protection
Characteristics IDMT ( 51N ) DT ( 51N)
Current Setting 0.08 5
Dial Time 0.1 0.07
Figure 4.18: DigSILENT simulation diagram for a single phase to ground fault in a line
(B2 to B3)
Table 4.20: Short circuit results according to the IEC 60909 standard
103
The result for the single phase to ground fault in the Line (B2toB3) feeding the loads
1 are shown in Figure 4.19. The tripping time for earth element for the relay B is
1.117 seconds. The IDMT and DT element for the phase element show tripping time
of 9999.99s for the phase element meaning it is not affected by this fault.
Figure 4.20 shows the simulated tripping characteristics for both the line (B2 to B3)
feeding the load 1 and for the line (B2 to B4) feeding the load 2 when a single phase
to ground fault occurs. It can be seen from the results that the relay A shown in blue
on the line (B2 to B4) does not see the single phase to ground fault that occurs on the
line (B2 to B3). Therefore the Relay A tripping time is displayed as 9999.999 seconds
for both the IDMT and the DT elements. This means that for the fault at line (B2 to
B3) relay A did not trip. This ensures that the protection is correct and no false
tripping or unwanted tripping will be experienced when the scheme is implemented.
The single phase to ground fault indicated in Figure 4.18 is picked-up by B and C
protection devices. With utilization of the IDMT earth element for the relay B and C, a
sequence tripping response of 1.117 and 1.675 seconds is recorded as shown in
Figure 4.21.In the case the relay C is used as a backup protection if it does not trip.
The phase elements tripping times are 9999.99 seconds, meaning that they did not
trip for this fault. The results also show that the relay B which is close to the fault
responses faster than the up-stream relay C. Table 4.21 below shows the results for
the relay B tripping time. Since the fault is single phase the ground only the Ground
Time Overcurrent Element (51N) trips at 1.117 seconds.
Figure 4.19: Relay B protection response for the minimum single phase to the ground
fault with a clearing time of 1.117 seconds
104
Table 4.21: The result for the relay B protection response for the single phase to the
ground fault
Figure 4.20: Protection responses to the single phase to the ground fault on a line (B2
to B3) for the relays A and B
105
Figure 4.21: Relay B time-overcurrent response of 1.117 seconds and Relay C acting as
back-up protection with time response of 1.675 seconds for the single phase to the
ground fault in the line (B2 to B3) feeding the load 1
4.6.1.4 Three phase fault type at the line (B2 to B3) for the relay B
The same steps as for the single phase to the ground fault in the line (B2 to B3) for
the relay B are followed for the three phase fault in the line (B2 to B3). The results are
recorded and documented in a sequence as show below. The only differences are
the relay’s settings. Time overcurrent characteristics and the dial time for short circuit
current are calculated using equation (4.20) and applied to the relay B. The settings
for the relay B are shown in Table 4.22. Simulation diagram is shown in Figure 4.22
where boxes in the blue colour represent short circuit power, initial symmetrical short
current and peak short circuit current. The maximum fault level S k'' of 303.63MVA, a
short circuit current I k'' of 15.397kA and a peak current I p of 40.986kA are recorded
106
Figure 4.22: DigSILENT simulation diagram for the three phase fault in the line ( B2 to
B3) that feeds the load 1
Table 4.23: Minimum short circuit calculation results according to the IEC 60909
standard
Figure 4.23: Relay B protection response for the three phase fault with a clearing time
of 0.200 seconds for DT and 0.495 seconds for IDMT elements respectively
107
A time/current curve of the Relay B is used to analyse the results and the
performance of the protection scheme. This time/current curve definition shows that
the tripping times obtained for the relay B are 0.200 seconds for the DT and 0.495
seconds for the IDMT elements as shown in Figure 4.23 above. The earth element
displays 9999.99 seconds for the tripping time. This fault only affects the phase fault
currents therefore only the phase faults elements tripped. Table 4.24 shows the
results for the three phase faults where the phase time overcurrent element (51P)
tripping time response is 0.495 seconds and of the directional phase time overcurrent
element is 0.200 seconds.
Table 4.24: The result for the relay B protection response for the three phase fault
Figure 4.24: Protection responses to the three phase fault for the relays A and B in the
outgoing feeders
108
Figure 4.24 above shows the simulated tripping characteristics for both the line (B2 to
B3) feeding the load 1 and the line (B2 to B4) feeding the load 2 when a three phase
fault occurs. It can be seen from the results that the relay A shown in blue does not
see the three phase fault that occurs on the line (B2 to B3). Therefore Relay A
tripping time is displayed as 9999.999 seconds for both the IDMT and the DT
elements. This means that for the fault in the line (B2 to B3) the relay A did not trip.
This ensures that the protection is correct and no false tripping or unwanted tripping
will be experienced when the scheme is implemented
Figure 4.25: Characteristics elements for relay B and C for three phase fault
The three phase fault indicated in Figure 4.22 is picked-up by the B and C protection
devices. With utilization of the DT and IDMT phase elements for the relay B, and the
relay C. A sequence tripping response of 0.2 and 0.495 seconds for the relay B and
0.42 and 0.826 for the relay C are recorded as shown in Figure 4.25.The earth
elements tripping times are 9999.99 seconds, meaning that they did not trip for this
fault. The results also show that the relay B which is close to the fault responses in
0.495 seconds while the direct up-stream relay C follows with a response delayed by
0.826 seconds. This algorithm suggests that should the relay B fail to operate then
the next up-stream relay C will operate. Therefore the relay C is used as a backup
protection for the relay B. For faster tripping time the DT characteristic of the relay B
responds in 0.2 seconds and the instantaneous characteristic for the relay C delays
by 0.420 seconds respectively.
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4.6.1.5 Single phase to ground fault at the busbar B2 for the relay C
Busbars plays an important role in the power system. This is where different electrical
nodes of power systems are connected. A long time delay for tripping is not allowed
or acceptable for the busbar faults. It is therefore important to have a fast protection
system that can detect busbar faults with high selectively. Time overcurrent
characteristics, pickup current and time dial for minimum short circuit current are
calculated using equation (4.20) and are applied in the relays C. The suitable settings
for this relay are shown in Table 4.25 below
Figure 4.26: DigSILENT simulation diagram of the single phase to the ground fault on
the busbar B2
A single phase to ground fault was introduced on the busbar B2 as shown in Figure
4.26 where boxes in the blue colour represent short circuit power, initial symmetrical
short current and peak short circuit current. This particular fault is also known as
internal fault. The minimum fault level S k'' of 2.01MVA, a short circuit current I k'' of
110
0.317kA and a peak current I p of 0.845kA are obtained from the simulation recorded
Table 4.26: Minimum Short circuit calculations results according to IEC 60909 standard
A definite time and inverse characteristic model is chosen for the relay C that is
placed on the incomer feeder of the station2/B2. A time/current curve of the relay C is
used to analyze the performance of the protection scheme. These time/current curves
assist with additional information that is needed for the protection, such as lowest and
highest fault current levels. With a fault as shown in Figure 4.26, the relay C responds
with an earth normal inverse tripping of 1.532 seconds. The response characteristic
curve of the relay C is shown in Figure 4.27 below. The phase element tripping time is
9999.99 seconds meaning that it does not trip for this fault. Table 4.27 below shows
the results for the relay C tripping time. Since the fault is a single phase the ground
only the Ground Time Overcurrent Element (51N) trips at 1.523 seconds.
Figure 4.27: Relay C protection response for the minimum single phase to ground fault
with a clearing time of 1.523 seconds
111
Table 4.27: The result for the relay C protection response for the single phase to
ground fault
Figure 4.28: Relays A, B and C protection responses when the minimum single phase
to the ground fault is applied on the busbar B2 in the substation2/B2
The relay C on the incoming feeder is configured in such a manner that it trips for the
fault in the busbar B2 of station2/B2.Although the outgoing feeders of load 1 and load
2 are fed from the busbar B2 the relays A and B do not see the fault. This resulted for
relay A and B tripping time to be 9999.999 seconds as shown in Figure 4.28. The
response is correct because only the upstream relay needs to trip and the outgoing
feeder relays is not necessary to trip.
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Table 4.28: Relay C setting for phase protection
Figure 4.29 (a): DigSILENT simulation diagram for the three phase fault on the busbar
B2
A three phase fault is introduced on the busbar as shown in Figure 4.29 (a) where
boxes in the blue colour represent short circuit power, initial symmetrical short current
and peak short circuit current.This particular fault is also known as an internal fault.
Figure 4.29 (b) shows the recorded results for the three line-line voltages in the
busbar B2 when the three phase fault is introduced in the distribution network.The
execution time for the short circuit event is 0.420 seconds. During the short circuit
period the line voltages decrease down to zero due to the fault current creating the
system to be unbalanced. The fault level S k'' of 324.47MVA, a short circuit current I k''
of 17.030kA and a peak current I P of 45.354kA are obtained as results from the
simulation as shown on Table 4.29 below.
113
Figure 4.29 (b): Recorded results for the three line-line voltages of the busbar B2
Table 4.29: Maximum Short circuit calculations results according to IEC 60909 standard
The protection algorithm used here is the same as the one explained previously for
the single phase to the ground fault. Under the fault shown in Figure 4.29(a), the relay
C which is the bus protection device responded with an instantaneous phase tripping
of 0.420 seconds and a normal inverse phase tripping of 0.800 seconds as shown in
Figure 4.30 below.The earth element tripping time is 9999.99 seconds meaning that it
does not trip for this fault.
114
Figure 4.30: Relay C protection response to the three phase fault on the busbar B2
Table 4.30 shows the results for the three phase faults where phase instantaneous
overcurrent element (50P) tripping time response is 0.420 seconds and time
overcurrent element (51P) tripping time response is 0.800 seconds
Table 4.30: The result for the relay C protection response for the three phase fault
115
Figure 4.31: Relays A, B and C protection responses when a three phase fault is applied
on the busbar B2
The relay C on the incomer to the busbar B2 feeder is configured in such a manner
that it trips for fault at the busbar of the station2/B2. Although the protection devices
on the outgoing feeders that feed the substation4/B4 and the substation3/B3 are
being fed from this busbar they do not see the fault. This can be seen from the
tripping times of the relays A and B of 9999.999 seconds as shown in Figure 4.31
above. For this specific fault the earth elements did not see the fault and therefore
they did not trip. From the result it can be said that the response of the protection
method used is correct because only the upstream relay trips and the outgoing feeder
relays do not trip.
116
Table 4.31 Combined results for the different faults in the distribution network used in
the case study one
Protection Fault Fault Type Protection Short circuit Initial Peak short Tripping
Device Location function power ( ) symmetrical circuit Time in
in MVA short current current ( ) seconds
( in kA in kA
Relay A Line Single phase 51N ( IN>) 1.96 0.309 0.821 0.527
(B2toB4) to ground
fault
Relay A Line Three phase 51P(3I>) 315.97 16.584 44.089 0.100
(B2toB4) Fault
Relay B Line Single phase 51N ( IN>) 1.89 0.298 0.752 1.117
(B2toB3) to ground
fault
Relay B Line Three phase 51P(3I>) 303.63 15.937 40.986 0.200
(B2toB3) Fault
Relay C Station2/B2 Single phase 51N ( IN>) 2.01 0.317 0.845 1.523
to ground
fault
Relay C Station2/B2 Three phase 51P(3I>) 324.47 17.030 45.354 0.420
Fault
Case study two followed the same steps that were implemented in the case study
one. The results from the simulation for the minimum single phase fault and the three
phase fault were recorded. These results were documented as follows:
4.6.2.1 Single phase to ground fault in the line (B2 to B4) for IED A
For the fault shown in Figure 4.10, the results for the IED A fault response are shown
in Figures 4.32, 4.33 and 4.34 below. Table 4.32 below shows the results for the IED
A tripping time. Since the fault is the single phase to the ground only the Ground Time
Overcurrent Element (51N) trips at 0.527 seconds.
117
Figure 4.32: The IED A protection response to the minimum single phase to the ground
fault with a clearing time of 0.527 seconds
Table 4.32: The result for the IED A protection response for the single phase to the
ground fault
118
Figure 4.33: Protection responses to the single phase to the ground fault for the IEDs A
and B on the outgoing feeders
Figure 4.34: IED A time-overcurrent response and IED C acting as back-up protection
for the single phase to the ground fault.
119
4.6.2.2 Three phase fault on the line (B2 to B4) for the IED A
For a fault shown in Figure 4.14, the results for the IED A are shown in Figure 4.35,
4.36 and 4.37 below. Table 4.33 shows the results for the three phase faults where
phase time overcurrent element 51P-1(1) tripping time response is 0.324 seconds
and 51P-1(2) is 0.100 seconds.
Figure 4.35: The IED A protection response for the three phase fault with a clearing time
of 0.100 seconds for the DT and 0.324 seconds for the IDMT element respectively
Table 4.33: The result for the IED A protection response for the three phase fault
120
Figure 4.36: IEDs A and B protection responses to the three phase fault
Figure 4.37: IED A time-overcurrent response and IED C acting as back-up protection
response to the three phase fault
4.6.2.3 Single phase to the ground fault on the line (B2 to B3) for the IED B
For the fault shown in Figure 4.18, the results for the IED B are shown in Figures
4.38, 4.39 and 4.40 below. Table 4.34 below shows the results for the IED B tripping
time. Since the fault is the single phase to the ground only the Ground Time
Overcurrent Element (51N) trips at 1.117 seconds.
121
Figure 4.38: IED B protection response for the single phase to the ground fault with a
clearing time of 1.117 seconds
Table 4.34: The result for the IED B protection response for the single phase to ground
fault
122
Figure 4.39: Protection responses to the single phase to the ground fault for the IEDs A
and B from outgoing feeders
Figure 4.40: IED B time-overcurrent response of 1.117 seconds and IED C acting as
back-up protection with time response of 1.675 seconds for the single phase to the
ground fault
123
4.6.2.4 Three phase fault type on line (B2 to B3) for the IED B
For a fault shown in Figure 4.22, the results for the IED B are shown in Figures 4.41,
4.42 and 4.43 below. Table 4.35 shows the results for the three phase faults where
the phase time overcurrent element 51P-1(1) tripping time response is 0.495 seconds
and 51P-1(2) is 0.200 seconds.
Figure 4.41: IED B protection response for the three phase fault with a clearing time of
0.200 seconds for the DT and 0.495 seconds for the IDMT elements respectively
Table 4.35: The result for the IED B protection response for the three phase fault
124
Figure 4.42: Protection response to the three phase fault for the IEDs A and B from the
outgoing feeders
Figure 4.43: IED B time-overcurrent response of 0.20 seconds for the DT and 0.495
seconds for the IDMT element respectively and IED C acting as back-up protection with
time response of 0.430 seconds for the DT and 0.826 seconds for the IDMT elements
respectively for the three phase fault
125
4.6.2.5 Single phase to ground fault on the busbar B2 for the IED C
For the fault shown in Figure 4.26, the results for the IED C are shown in Figures 4.44
and 4.45 below. Table 4.36 below shows the results for IED C tripping time. Since the
fault is the single phase to the ground only the Ground Time Overcurrent Element
(51N) trips at 1.523 seconds.
Figure 4.44: IED C protection response to the minimum single phase to ground fault
with a clearing time of 1.523 seconds
Table 4.36: The result for the IED C protection response for the single phase to the
ground fault
126
Figure 4.45: IEDs A, B and C protection responses to the minimum single phase to the
ground fault applied on the busbar B2.
4.6.2.6 Three phase fault on the busbar B2 for the IED C consideration
For the fault shown in Figure 4.29, the results for the IED C are shown in Figures 4.46
and 4.47 below. Table 4.37 shows the results for the three phase faults where the
phase instantaneous overcurrent element (50P) tripping time response is 0.430
seconds and the time overcurrent element (51P) tripping time response is 0.800
seconds
Figure 4.47: IEDs A, B and C protection responses to the three phase fault applied to
the busbar B2
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4.7 Comparison and discussion of results
A comparison between case study one and two is done. The results for case study
one where the conventional relays are simulated is in Table 4.31. The results for case
study two where the IEDs are used are in Table 4.38. Based on the results in Table
4.31 and Table 4.38 can be seen that the performance for both protection case
studies is the same. The reason for this that the simulation environment of
DIgSILENT uses the same models of the protection elements for both conventional
and the IEC 61850 standard-based protective devices.
Implementation of the protective scheme using real protective and a conventional or
IEC 61850 standard-based approaches for exchange of data signals between the
relays is expected to bring differences in these time responses. The implementation
of the two variant of the reverse blocking protection scheme is described in chapter
six.
4.8 Conclusion
This chapter has addressed the overcurrent protection by implementing a reverse
blocking scheme for a distribution network. The model of the distribution network was
introduced and simulated using DIgSILENT software package. Load flow was
simulated. The short circuit currents were calculated for different faults locations on
the distribution network.
The protection used was based on ABB protection devices that implement time-
current characteristics. Discrimination has been achieved between the protection
devices. This was achieved by making use of a combination of both current and time
discrimination characteristics. This chapter investigated two case studies. Case study
one was based on simulating the performance of the protection scheme for the
distributed network using conventional relays that are not complained to the IEC
61850 standard. The case study two used IEDs that are compliant to the standard.
The same parameters for both case studies were used to configure the protection
devices. The protection device settings for the network have been carried out. The
results obtained in this chapter were recorded and analysed and presented
accordingly. A comparison of the results obtained from the two case studies show
that the type of communication between the protection devices does not influence the
protection response in the condition of simulation, as the protection algorithms and
settings are the same. The differences can only be seen from the real-time
implementation of the protection schemes. It was also discovered that the relays had
limited protection elements compared to the IEDs. When it came to flexibility the
129
relays had major disadvantages when compared to the IEDs. The objectives of this
chapter were achieved by introducing IEDs which is the most important aspects of the
modern electrical and protection systems. The next step in this thesis is to configure
the IEDs. The reason for this exercise is to improve the communication and provide
better performance than normal conventional relays, regarding their level of
functionality. The configuration of the IEDs is based on two software tools, namely
IED engineering is done using the PCM600 software tool and IED GOOSE
configuration making use of CCT600 software tool. The application of these tools is
presented in Appendix A.
The next chapter explains the importance of process engineering and the basic
aspects of the IEC 61850 standard utilized by the ABB 670 IEDs. It also considers the
effect of using the Ethernet networks and the IEC 61850 protocol for protection,
integration, automation. The use of IEC 61850 GOOSE messages to communicate
high-speed information between the IED’s is described shortly
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CHAPTER FIVE
PROCESS ENGINNERING FOR THE IEC61850 STANDARD-BASED ABB
670 SERIES INTELLIGENT ELECTRONIC DEVICES (IEDs)
5.1 Introduction
IEC 61850 is the global standard for communication between the Intelligent Electronic
Devices (IEDs) in the substation. This standard was developed to provide
interoperability between all functions used for protection, monitoring, control and
automation that are implemented by different vendors in substation (Krishnan and
Palki, 2006). The standard creates the possibility of free allocation of functions that
provides a path for a huge range of possible solutions for protection and substation
automation systems (De Mesmaeker et al., 2005). When IEC 61850 standard is
implemented it allows a major reduction of copper wire creating a better system and it
is easy to diagnose the equipment in the substations. This new approach provides
stability and overall reliability of the system (Andersson et al., 2003).
This chapter explains the importance of process engineering and some basic aspects
of the IEC 61850 standard utilized by the ABB 670 IEDs. The effect of using Ethernet
networks and IEC 61850 protocol for protection, integration, automation, and
communication of high-speed information between ABB 670 IED’s is described. The
points that are covered in the chapter are: Part 5.2 describes the objective of IEC
61850 standard, part 5.3 details the application of the IEC 61850 standard on the
ABB’s new IED 670 series, part 5.4 shows the protection, control and monitoring
functions for the ABB IED 670 series and part 5.5 gives the Conclusion.
Figure 5.1: Developments of Substation Automation over time (De Mesmaeker et al.,
2005).
Figure 5.2: Station Bus and conventional wiring to the process (Andersson et al., 2003).
132
As time progresses the non-conventional instrument transformers such as galvanic or
optical ones were developed as shown in Figure 5.3. The non-conventional
instruments are connected to the relay via serial point to point communication as
specified in the standard IEC 61850-9 part (Andersson et al., 2003).
Figure 5.3: IEC 61850-8 station bus and IEC 61850- 9 links to non-conventional
instrument transformers (Andersson et al., 2003).
The next phase was the introduction of modern switchgear fitted with communication
interface drivers creating a communication network with IEC61850-8 part of the
standard as shown in Figure 5.4 below. This method reduced the copper wiring
between the process and the bay level, simplifying the connection algorithm
(Andersson et al., 2003).
Figure 5.4: Hierarchical communication networks with IEC 61850-8 part as a station bus
and a process bus using both IEC 61850-8 and IEC 61850-9 (Andersson et al., 2003).
The communication network was now fully developed within the substation. The
substation communication network reaches a point where the system can use both
IEC 61850-8 and IEC61850-9 station wide as shown in Figure 5.5 below .This
133
algorithm permitted data to be easily transferred within the substation (Andersson et
al., 2003).
Figure 5.5: One Single, Station wide communication network using both IEC 61850-8
and IEC 61850-9 part of the IEC 61850 standard (Andersson et al., 2003).
134
5.4.4 Common naming for common understanding
The IEC 61850 standard is accepted all over the world and Part 7 of the standard
explains all the data models in the substation using a global language.
Figure 5.6: Example of Logical Nodes used for protection functions (Andersson et al.,
2003).
135
5.6 The application of the IEC 61850 standard on ABB’s new IED 670 (Intelligent
Electronic Device)
The implementation of the reverse blocking protection scheme designed in Chapter
four is implemented using the IEC 61850 standard compliant ABB IED 670 series
protection device. This part of the chapter describes now the IEC 61850 standard is
implemented on these devices.
In the substation automation system all protection related activities are influenced or
changed by introduction of the IEC61850 standard. The main idea is for the user to
understand how to implement the standard in practice (De Mesmaeker et al., 2005). It
is also important to have a system that is cost effective when designing SAS to
ensure faster returns on investment. The system must comprise devices that can
supply a wide range of communication capabilities and interfaces compliant to IEC
61850 standard. It also requires a device that ensures maximum performance in
protection, control and monitoring. The ABB’s new IED 670 series is capable of
meeting the above requirements (Lundqvist et al., 2007).
5.6.1 IEC 61850 requirements for the ABB IED 670 series
5.6.1.1 Computing and memory capacity
ABB IED 670 series has adopted new algorithm for numerical calculation module.
The new alternative Central Processing Unit (CPU) model design consists of the main
controller/CPU type IBM 3200, power computer 750FX 600MHz, and internal 100
Mbit/s communication bus components. The memory capacity is 128 Mb FLASH. It
permits performance of one millisecond for differential protection functions, three
milliseconds for other protection functions, and for the logic operations it takes
between three to hundred milliseconds depending on the application. (Lundqvist et al.
2007).
5.6.2 Ethernet link communication interface for ABB IED 670 series
The ABB IED 670 series can use the following communication protocols:
IEC61850-8-1 for peer-to-peer communication with GOOSE based on
Ethernet
IEC60870-5-103 is a serial protocol based on Ethernet
Strömberg protection acquisition (SPA) is a serial protocol based on Ethernet
Local operating network (LON) is a serial protocol based on Ethernet
Distributed Network Protocol (DNP) 3.0 use a both Ethernet and serial ports.
5.6.3 Use of the IEC 61850-8-1 part standard protocol for peer to peer communication
The ABB IED 670 series is fitted with a double optical Ethernet rear ports and a front
Ethernet port that are used for IEC61850-8-1 station bus communication. IEC 61850-
8-1 communication protocol provides the IEDs to exchange information coming from
different vendors. The communication is also used for simplifying the engineering
system. The IEC 61850-8-1 communication protocol for ABB IED 670 series consist
of two generic communications Input / output functions namely SPGGIO and
MVGGIO. Generic communication I/O SPGGIO is used to transport one single logical
signal to other systems or devices in the substation. Generic communication I/O
MVGGIO function is used to generate the instantaneous value of an analog output to
other systems or devices in the substations (EM 670 series, 2012). The IEC 61850-8-
137
1 protocol is used in this thesis for peer to peer communication, based on the
GOOSE been received function block.
5.7 Protection, control and monitoring functions for the ABB IED 670 series
For network communication in the substations the IEC61850 has become the main
standard that supports all communication tasks for protection, control and monitoring.
The ABB IED 670 series relays are physical device models that are compliant with
the IEC 61850 standard. The device model consists of logical groupings as shown in
Figure 5.8. These groups provide logical nodes that are hardware independent and
with future proof implementation. The IED 670 allows the tools for engineering
solution to be used and specifies all the required file formats for substation
configuration (Lundqvist et al., 2007).
Figure 5.8: The physical device that consists of logical groupings (Lundqvist et al.,
2007).
138
IED Capability Description file
Station Configuration Description file
Configured IED Description file
Figure 5.9: The Engineering process for substation configuration (Engineering guide
IEC61850, 2006)
Various possibilities are available for engineering process when utilizing the tools and
files. This is done for protection and control IEDs at a bay level. This bay level is
where logic nodes are configured in large volumes. The system has a concept that
permits IEDs to import and export files. These files can add or delete various signals
in the station and it is required that the tools should support the system. The files are
constructed using the same algorithm but with a different focus depending on the
demands. (Kasztenny et al., 2006).
5.7.2 The principal structure of the SCL XML files for the ABB IED 670 series
It is not necessary or required to know the details of the XML file in order to configure
the ABB 670 IEDs. The important part is to understand and organize the information
provided by the SCL files such as IEDs ICD or station SCD. It is also important to
acknowledge where the engineering additions such as Datasets and Control Blocks
belong to when configuring the SCL file. The SCL XML file is based on specification
in IEC 61850-6 part, clause 9. It is defined in five sections as shown in Figure 5.10
below. These sections are as follow (Engineering Guide IEC61850, 2006):
139
Header
Substation description
Communication description
IED description
Data Type Templates
Figure 5.10: Principle structure of the SCL XML file (Engineering Guide IEC61850, 2006).
The arrows in the Figure 5.10 below show the connection between the different
sections. The header is used to identify SCL configuration file and its version. The
substation description sections are utilized for organizing and establishing the IEDs
communication within the substation. This job is assigned by a protection and control
IED manager tool (PCM600).The PCM600 tool is also used to link the logical nodes
which are part of the IED to the substation section. A communication configuration
tool (CCT600) is used for routing the engineering signals. These signals then are
configured and imported to PCM600 tool where the communication section is
organized and completed (Engineering Guide IEC61850, 2006).
The IED description section is where Datasets and Control Blocks are situated as part
of the Logical nodes. CCT600 software tool is used to configure these logical nodes
and it requires a communication section where Generic Object Oriented Substation
Event (GOOSE) engineering is developed. Data type template in Figure 5.10 is used
to supply correct message description and information of each Logical node type to
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the client. When it comes to these logical node types are define differently depending
on the vendors of the IEDs. (Engineering Guide IEC61850, 2006)
Figure 5.11: The components of the signal identification as defined in IEC 61850–7–2
(Engineering Guide IEC61850, 2006).
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Part one and two in the above Figure can be defined using two options namely
Function with which the SCL header is identified as FuncName and Product with
which the SCL header is identified as IEDName when it comes to related naming.
When IED is configured, the part one is used to describe the name of the physical
object of the substation section and this is where the LNs are attached. In the parts
two and three combined the LN name is created and the different LN representatives
within the same LD of the IED are described. Part four in the Figure is used for
DataName and Data Attribute Name which are configurable.
5.7.5 The substation section for the ABB IED 670 series
The substation section is used to explain the functional structure of the substation
and this is where the primary equipment is found. At the substation section the LNs
are attached to the primary elements on the basis of their functionalities
5.7.7 The communication section for the ABB IED 670 series
The communication network of the physical IEDs is dependent on the organization of
the substation structure as is shown in Figure 5.12 below. According to the IEC
61850 standard the communication system is defined without any existence relation
to the protocols and media. The mapping of the existing media and protocols use
Ethernet as its medium Manufacturing Message Specification (MMS). For more
communication ABB IED 670 series such as Abstract Communication Service
Interface (ACSI) is described in the IEC 61850-7-2 part. The specification of mapping
the ACSI into the existing MMS is described in the IEC 61850-8-1part (Engineering
Guide IEC61850, 2006).
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Figure 5.12: Communication network used by the IEC61850 standard (Engineering
Guide IEC61850, 2006).
The communication section in the SCL file must consist of components that need to
be identified in order to send information between the IEDs used in the project as
shown in the Figure 5.12 above. These components are as follows: (Engineering
Guide IEC61850, 2006):
Used sub networks
IEDs connected to the different sub networks
Access points per IED to the sub networks
the IP address of the LAN network
The link to the GOOSE Control Block (GoCB) message in transmission
direction.
When using the ABB IED 670 series the communication link to the IEDs are
developed by using PCM600 software tool. This process is implemented when the
IED is linked and established to the sub-network. There are various algorithms that
can be used to structure the communication network. The most typical set-up is
shown in Figure 5.13a and Figure 5.13b below.
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Figure 5.13a: Communication sections: Possible network configuration (Engineering
Guide IEC61850, 2006).
The Figure 5.13a above shows a network configuration that uses one Sub network
that links all IEDs for line voltages, one and two. Figure 5.13b as shown below makes
use of two Sub networks where sub network one connects IED one, two and three
together and sub network two connects IED four, five and six together.
Both network configurations satisfy the requirements for performance. The advantage
of the network configuration shown in Figure 5.13b is that when one of the sub
networks fails only one voltage level in the station will be lost.
5.7.8 Organization of the Logical Devices, Logical Nodes, Data Objects and Data
Attributes in an IED
In a basic substation automation there is a server that represents communication
interface to the sub network via an Ethernet or fiber optic cable. A one or more logical
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devices are connected to a server as shown in Figure 5.14 below. A logical device is
linked into a server that contains a group of logical nodes. The logical device contains
a special logical node known as logical node zero (LLN0). It contains the Datasets
which can be used for various control block inputs. In each logical device there is also
another special logical node known as physical logical device (LPHD) and it contains
data objects that are used to describe the status of the physical device. The logical
nodes contain a number of data objects that represent the data attributes
(Engineering Guide IEC61850, 2006).
Figure 5.14: Organization of Logic Devices, Logic Nodes, Data Objects and Data
Attributes in an IED (Engineering Guide IEC61850, 2006).
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5.7.10 DataSets
Report control blocks and data sets for transporting and monitoring signal are
determined by IEC 61850 standard. These are for GOOSE messages. When it comes
to horizontal path communication datasets also utilizes GOOSE messages. The
datasets contain data attributes and data objects with no specified functions. Figure
5.15 below shows the information were Dataset are all positioned
Figure 5.15: IEC 61850–7–2 part: Example of Datasets (Engineering Guide IEC61850,
2006).
The ABB 670 IED features datasets which are predefined by defaults. They are
always available for the users. The only thing that needs to be done is to be able to
link the datasets to the client IEDs. The ABB 670 IED has capability to state when
datasets need to be modified according to the needs of the project.
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Data-change (dchg) - This trigger option is active when the process value
changes and the transmission is done.
Quality change (qchg) - This trigger option looks at quality type of data
attributes and if anyone changes in the quality description, it will be
transmitted.
Data value update (dupd) - This trigger option is used to define if transmission
should be done based on a state which can be contained by the application.
Integrity - This trigger option is used to force the transmission of all process
values that are defined in the Dataset when a timer value expires
General interrogation- This trigger option is requested when the IEDs (client
and server) need to start or restart a session.
5.7.13 Connection of the Buffered Report Control Block to a Client Logical Node
The first requirement is for the buffered report control block to find out where the
events must be send to. In the IEC 61850-6 part the standard specifies that signal
routing engineering steps, is when the logical node of the client IED is linked into the
Report Block Enabled option as shown in Figure 5.16. The chosen IED will be the
client with its matching logical nodes. The logical nodes will become the part of the
SCL structure that will show a report control description of the IED. When using
ABB670 IEDs a CCT600 software tool links the client logical node to the field of
buffered report control block by utilizing the drag and drop algorithm (Engineering
Guide IEC61850, 2006).
Figure 5.16: Mapping of the BRCB to the client LN (Engineering Guide IEC61850, 2006).
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5.7.14 Principle operation of the Generic Object Oriented Substation Event (GOOSE)
messages
The GOOSE class model is utilized to transfer data values between IEDs by means
of multicast services. This function is used on the bay level. The GOOSE message is
capable transporting data from a publisher to subscribers bypassing the server.
GOOSE messages are only allowed to be sent in one direction. This means that
subscriber of the GOOSE message can also send GOOSE messages back to the
publisher in order to close communication loop. This method is depended on the
application. A GOOSE concept example is shown in Figure 5.17 where three IEDs
are utilized for exchanging GOOSE messages among each other (Engineering Guide
IEC61850, 2006).
Figure 5.17: IEC 61850 Principle operation of GOOSE messages (Engineering Guide
IEC61850, 2006).
5.8 Conclusion
This chapter describes the basics of how the IEC 61850 standard is implemented in
the ABB IED 670 series. It also describes that IEC 61850 standard is straightforward
at a user’s level and it is the best solution for communication following today and
future requirements. The IEC 61850 standard also guarantees the economical
maintenance in substation automation. The chapter also explains in detail how the
SCL describes the model utilized in the substations. The ABB 670 series IEDs
functions and how the IEC 61850 standard is implemented. A basic description of
how the IEC 61850 standard works and the different standard components utilized is
shown. The Engineering process between the publisher and the subscriber is
discussed in detail. Based on the literature review it can be concluded that using the
GOOSE messages between the IEDs can improve the speed of data transmission.
The next chapter describes the performance between hard-wiring and GOOSE
communication by development of laboratory test bench that is build using the ABB
IEDs 670 series protection device. The next chapter also presents a proof of the
above statement for the speed of the GOOSE messages on the basic of performance
evaluation of the implementation and operation of the two case studies simulated in
Chapter four. A laboratory test bench is built for this purpose using the ABB IED 670
series devices.
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CHAPTER SIX
DISTRIBUTION BUSBAR PROTECTION IMPLEMENTATION AND
EXPERIMENTATION
6.1 Introduction
Traditionally protection and control devices used hardwire as a path to distribute
signals between each other. This method of communication creates time delay in
transmitting the signal from the sending device to the receiving devices. The delay
came from the time taken by the auxiliary relays from switching on and off when the
signal had to be sent from the binary output of the sending device to the binary input
of the receiving device. Utilization of the new digital technology allows the traditional
reverse blocking schemes to be considerably improved in terms of operational speed.
The new digital protection also offers an increase of flexibility and operational
reliability. This chapter focuses on improving the operational speed and stability of the
reverse blocking scheme used in distribution busbar protection. This is achieved by
introducing Ethernet communication network using GOOSE messages between the
IEDs. This method allows the blocking signals to be sent directly from one IED to
another IED without any additional delay created by the auxiliary relays. A laboratory
test bench is developed to investigate and compare conventional hard-wired blocking
signal and the GOOSE communication. This test bench is utilized to improve the
performance and reliability of the busbar reverse interlocking scheme. The same
power network and its data used in Chapter four are used in this chapter to
implement the practical studies.
The parts that are covered in this chapter are as follows: Part 6.2 introduces the IEC
61850 standard based operation of the protection scheme. The phases in the process
of development of the laboratory test bench are described in part 6.3. The
implementation of the technical experiment in the test bench is explained in part 6.4.
Part 6.5 describes establishment of the communication between the IEDs and the PC
with PCM600 engineering Pro software. The development configuration for the
IED_C as used for protection of the incoming feeder is explained in part 6.6. Part 6.7
describes the operation of the hardwired protection scheme. The GOOSE
engineering is done in part 6.8. Part 6.9 explains the operation of the GOOSE based
protection scheme. The obtained results from the experiments are given in part 6.10
and their discussion is given in part 6.11. Part 6.12 concludes the chapter.
6.2 IEC 61850 standard based operation of the busbar protection scheme
For this protection system the incoming feeder IED and the outgoing feeder IEDs
communicate using IEC 61850 GOOSE messages. When a fault occurs at one of the
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outgoing feeders a multifunctional IED will trip the feeder breaker and send a GOOSE
message to block at once all the incoming IEDs that are not involved. The operational
reliability of the protection scheme is based on GOOSE messaging. For this
application, the ABB IED’s and their software are used for protection. A laboratory
test bench had to be developed as a platform where the practical experiments are
exercised. The main aim of the experiments is to test and compare the
communication performance between the IED’s using both hard-wire systems for
transfer of data signals as shown in Figure 6.1a and GOOSE messages based on the
IEC61850 principles, as shown in Figure 6.1b.
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Figure 6.1b: A busbar reverse blocking scheme using IEC61850 standard-based
communication
Figure 6.2 shows a distribution network that is used for building the lab test bench as
simulated in DigSILENT in Chapter four.
Figure 6.2: The main DigSILENT distribution network used for building of the lab test
bench
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6.3 The development of the laboratory test bench
A laboratory test bench is developed in order to be able to implement the designed
busbar protection scheme known as a reverse blocking scheme. The IEC 61850
standard is implemented on the scheme and it is investigated how it influences the
busbar protection scheme performance. All experiments in this chapter are developed
using this test bench. The experiments repeat the investigations from Chapter four
but in the hard-wired and in the software environment of the ABB IED 670 IEC 61850
standard compliant protection devices. The build test bench is shown in Figure 6.3
Figure 6.3: The lab test bench that is developed for case studies
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6.3.1 ABB 670 Series IEDs internal structure
The ABB 670 series IEDs are used for protection, control and monitoring and are all
compliant to IEC 61850 standard. These IEDs consist of various modules namely:
Combined Backplane Module (CBM) - This module is used to transport all
internal signals between other modules in an IED. Transformer Input Module
(TRM) is the only module that is not connected to CBM.
Universal Backplane Module (UBM) - This module forms part of the IED
backplane with connectors for TRM
Power Supply Module (PSM) - This module is a regulated DC power that
supplies auxiliary voltage to all static circuits.
Numerical module (NUM) - This module is utilized for controlling all application
information such as configuration, setting and communication. Local Human
Machine Interface (LHMI) - This module is used to connect a Personal
Computer (PC) to the IED by means of an Ethernet connector and consist of a
push button keyboard, Light Emitting Diodes (LEDs) and Liquid Crystal
Display (LCD) screen.
Transformer input module (TRM) - This module is utilized to divide the internal
circuits from the VT and CT circuits and it has twelve analog inputs.
Analog Digital Conversion Module (ADM) - This module is used to convert
analog inputs to digital ones. It also has Binary Input Module (BIM), Binary
Output Module (BOM) and Binary I/O Module (IOM).
Line Data Communication Modules (LDCM) - This module is utilized for digital
communication to a remote terminal.
Serial SPA/LON/IEC 60870-5-103 communication module (SLM) - This
module is utilized for SPA/LON/IEC 60870–5–103 communication.
Optical Ethernet Module (OEM)-This module is used for IEC 61850 based
communication.
GPS Time Synchronization Module (GSM)- This module is utilized to supply
the IED with the GPS time to synchronize the IED operation with this time
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6.3.3 Moxa PowerTrans PT-7728 Switch
The PowerTrans PT-7728 is a switch certified to be utilized in substation automation
systems (IEC 61850-3, IEEE 1613).It can be utilized for Fast Ethernet backbones and
it is also capable to subscribe to redundant ring topologies. It has dual power inputs
with a range of 24 VDC to 48 VDC or 110/220 VDC/VAC to gain the communication
reliability. The front panel layout consists of system status LEDs, interface module
LEDs, a push button switch for interface module selection, Ethernet interface module,
Gigabit and Ethernet interface module. The rear panel has a serial console port and a
ten pin terminal block. The PT-7728 accommodates a modular design that permits
easy network planning allowing larger flexibility.
6.3.4 DELL Personal computer with PCM 600 and CCT600 on board
The personal computer accommodates the operating set up and other related
software needed for local area network operations.
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6.4 Implementation of the practical experiment
Figure 6.4 shows a modified compact flow chart that is used as a guide for the
practical. The IED configuring is done using PCM600 software. As explained in the
Appendix A PCM600 software is the innovation tool for the operation and
configuration of all the ABB 670 series protection devices (IED’s). This software can
be used to parameterize the device, view process data and evaluate fault that is
recorded. With this type of service the information for different events can be speedily
transmitted between IEDs
Figure 6.4 shows that communication of IEDs needs to be first configured. The next
step is to configure the IED application using various function blocks. This application
is done into two ways namely: the busbar protection scheme using hard-wires
between the IEDs and the busbar protection scheme using GOOSE messages
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between the IEDs. The results are recorded and compared. The abbreviations for the
function blocks included ing Figure 6.4 is described in the thesis glossary.
In the lab test bench both variants are implemented separately. When it comes to the
physical connection for both variants the IP address of the IED needed to be
configured in order to enable these communications. The procedures to set up the
communication for both variants are as follow:
IP addresses need to be set on the physical IEDs.
Set up the PC for a direct link or LAN/WAN network connection.
The IEDs IP addresses need to be configured using PCM600 software and it
is done for all IEDs.
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algorithm developed to change the default IP address of the IEDs using their front
panel HMIs.
Figure 6.5: Block diagram for IED IP Configuration using the local HMI panel
The text in red in Figure 6.5 shows the navigation of the selections. When the IED is
energized its front panel HMI displays a home page with a main menu. From this
menu the setting function is required to be selected and then the algorithm navigates
as follows: General settings>>Communication>>Ethernet configuration>>Front
port>>IP address>>IP mask>>Values. The user can select the rear port that uses
fiber optic cable or the front port which uses the Ethernet cable. For this project only
the front port is utilized.
It is required that the front IP address must not be in the same subnet with the rear IP
address to avoid communication failure.. For the first development of the lab test
bench a direct point to point connection between the IED Ethernet interface port and
PCM600 from the PC is implemented. The IED Ethernet interface port in front panel
was used as a service port.
6.5.2 Setting up the PC for point to point communication using the front port of the
IED
This method utilizes an algorithm that does not require a hub, router, bridge or switch
to connect two physical Ethernet interfaces together. In order to apply this method a
special cable is requested. This algorithm requires RJ-45 cable for connection as
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showed in Figure 6.6. It is recommended that the cable should be longer than two
meters.
Figure 6.6: Point to point Ethernet link between the IED and the PC with PCM600
software
Once the physical connection between the IED and PC (with PCM600) using the null-
modem cable is completed the network connection from the PC has to be configured
and the procedure is as follows:
Select start on the PC screen and navigate to Network connection in the PC as
shown in Figure 6.7
At the network connection menu a Local Area Connection the Properties are selected
and a window is shown in Figure 6.8
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Figure 6.8: The local area connection
The properties of the local area connections are selected. There are various options
of networks that can be chosen. The next step was to select internet protocol
(TCP/IP) as shown in Figure 6.9.
In order to achieve the connection between the PC and the IED_C the properties of
the internet protocol (TCP/IP) had to be completed as shown below in the Figure
6.10a.Figure 6.10a shows slots for the PC IP address and Subnet mask that needed
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to be defined. It is required that the IP address must not be the same as the IED IP
address. In this case the PC IP address is 10.1.150.4 and the IED_C IP address is
left as the factory default. The Subnet mask was selected as 255.255.255.0 as shown
in Figure 6.10b.
When the selection Figure 6.10b is completed the next step is to use a ping
command in order to verify connectivity with the IED_C. The results as shown in
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Figure 6.11 are that the connection between the IED_C and the PC with PCM600
software is achieved.
Figure 6.11: Ping command for checking of the connection between the IED_C and the
PC with PCM600 software
6.5.3 Setting up the PC to access more than one IED via a switch
This setting algorithm is also implemented as a second possibility when developing
the lab test bench. It makes use of an indirect connection through a station LAN.
Once the physical connection between the IEDs and the switch is completed, a
physical link via a switch and the PC has to be added as well. When all the physical
links between IEDs and a PC via a switch are done, the network connection from the
PC had to be configured using the same procedure for the direct point to point
connection. Since the three IEDs are now linked to the PC via a MOXA switch as
shown in Figure 6.12 their IP addresses are changed and the corresponding sub
network mask is not necessary to be changed.
Figure 6.12: Setting up the PC to access more than one IED via a MOXA switch
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The IP address for the IED_C is left as 10.1.150.1 which is by default, for IED_B is
changed to 10.1.150.2 and for the IED_A is changed to 10.1.150.3 while the
corresponding sub network mask is kept as 255.255.255.0. Once this step was
completed a ping command is utilized to verify connectivity between the PC and the
three IEDs via a MOXA switch. The results are shown in Figure 6.13.
Figure 6.13: Ping command results for the connection between the IED_C, IED_B,
IED_A, and the PC with PCM600 via a MOXA switch
From the results shown in Figure 6.13 can be seen that connection between the PC
and the three IEDs via switch is achieved. This means that the IEDs can now be seen
by the PCM600 software installed on the PC. This tool is used for engineering and
managing the IEDs. The next step is to set up the project utilizing PCM600 software
tool.
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version of a tool package or protocol. The connectivity packages consist of the
following:
Generic IEC 61850 IED connectivity Package
IEC 61850 Connectivity Package
LON Connectivity Package
IED 670 Connectivity Package
SPA Connectivity Package
This connectivity packages have a connectivity package manager used for managing
all the different packages for the different IED types. Once these connectivity
packages are installed, the PCM600 software recognizes it during its start-up and the
corresponding IED types are available in the PCM600 software.
6.5.5 Engineering configuration of the IEDs using PCM600 engineering Pro software
The project is created and structured using the PCM600 engineering Pro software
tool. At the PCM600 menu there is a window known as a plant structure. This is
where the project is created and at the same time the project name is defined. In this
case the project is named “Distribution Network” as shown in Figure 6.14 below
The plant structure is used to recognize each IED and where it is situated at the
substation. A geographical image of all the primary equipment that creates a bay is
viewed in the plant structure window. The plant structure of the IEDs differs based on
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primary equipment within substation. The building of the plant for the considered case
study is organized by a hierarchical structure that consists of five levels, namely:
Project - Center
Substation
Voltage Level
Bay level
IED
The ABB devices are added to the plant structure topology by right clicking the bay
folder and following the instructions shown in Figure 6.15 below. From the device
catalog, the IED’s can then be inserted by selecting the IED that is going to be used.
When it comes to inserting IEDs there are two types of options that can be chosen
from namely:
Online mode
Offline mode.
Online mode is when IED is already connected to the PC with PCM600 software and
the communication is established. This allows the PCM600 software tool to read the
data straight from the IED. Offline mode is when PC with the PCM600 software is not
physically connected to the IED. In this case the engineering procedures are done
without the IED.
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Working in offline mode is much more beneficial compared to online mode.
Configuration preparation can be done even though IED is not available. Configuring
an IED in an offline mode is similar to that of an online mode. The difference is that
with offline mode it is not required to type the correct IP addresses in the
Communication port because there is no physical connection between the PC and
the IED.
Once all the three IEDs are inserted in their bays under the voltage levels as shown
in Figure 6.16 the next step that needs to be completed is the application
configuration for the IEDs. The application configuration of the IEDs consists of
protection and control engineering.
.
Figure 6.17: The object type window that shows different function blocks
6.5.7 The function blocks for analog data used in the IEDs for the outgoing feeders
Figure 6.18 below shows the pre-processing function known as Signal Matrix Analog
Input (SMAI) for IEDs. It delivers processed analog data to all functions in ACT as
discussed in Appendix A. It represents the Root Mean Square (RMS), Discrete
Fourier Transform (DFT) and sampled data values. The data are accessible through
the group signal output AI3P on the SMAI blocks. All other signals from A1 to AN
produce only sampled values and they can be connected to a disturbance recorder.
The parameter setting for this SMAI is shown in Appendix B. The current signals from
the CTs of the outgoing feeder IEDs are shown in Figure 6.18. They are connected at
the input TRM_6I_6U_3I channel 1 for the line 1; TRM_6I_6U_3I channel 2 for the
line 2 and TRM_6I_6U_3I channel 3 for the line 3 of the SMAI1 .The same input
signals are connected to SMAI7 block for measurements.
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Figure 6.18: Signal Matrix Analog Input for currents and voltages
6.5.8 Function blocks for overcurrent protection used in the IEDs for the outgoing
feeders
The principal operation for this overcurrent protection function block shown in Figure
6.19 is explained in Appendix A. The output AI3P of SMAI1 (currents) in Figure 6.18
is connected to the input I3P of the protection function block shown in Figure 6.19.
The same method is implemented for the output AI3P of SMAI1 (voltages). It is
connected to the input U3P.
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Figure 6.19: The overcurrent protection function blocks for the IED_A
6.5.9 Function blocks for the signal matrix of binary outputs used in the IEDs for
outgoing feeders
The basic principal operation of this function block is discussed in Appendix A.The
outputs of protection functions in Figure 6.19 are all connected to the inputs function
block for binary outputs shown in Figure 6.20.This function block outputs link the
signal with the physical binary output modules of the IEDs for the outgoing feeders
Figure 6.20: The function blocks of the signal matrix for the binary outputs
6.5.10. Function blocks for logic signals used in the IEDs for the outgoing feeders
The logic signals are divided into two groups. One group is for current protection for
all three phases and the other group is for per phase protection as shown in Figure
6.21.This gives the user an option to see what type of fault has occured.
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Figure 6.21: The function blocks for the logic signals
6.5.11. Function blocks for measurement of power, current and voltage used in the
IEDs for the outgoing feeders
The basic principal operation of these function blocks are discussed in Appendix
A.The outputs SMAI are all fed to the inputs of the meaurements blocks shown in
Figure 6.22.This is done in order to be able to measure power,current and voltage for
a future analysis.
Figure 6.22: The function blocks for measurements of power, current and voltage
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6.5.12. Function blocks for disturbance report of analog and binary signals used in the
IEDs for the outgoing feeders
The basic principal operation of these function block is discussed in Appendix A. Two
types of disturbance reports are recorded for the IED_A, namely A1RADR and
A2RADR. These are for the analog currents and voltages recieved from the SMAI
The binary disturbance recording function block B1RBDR is used for all the binary
signals as shown in Figure 6.23 below.
Figure 6.23: The function blocks for a disturbance report of analog and binary signals
6.6 Application Configuration for the IED_C used for protection in the incoming
feeder
The IED_C is the most important IED to be configured. Both IED_A and IED_B have
to communicate with IED_C. Detail of the IED_C configuration is explained further.
The system is divided into sections so that it is easy to be understood.
6.6.1 Function blocks for analog input data in IED_C for protection in the incoming
feeder
The use of this block shown in Figure 6.24 is the same as for the SMAI in Figure 6.18.
The only difference is that’s its input signals for the SMAI are fed from the CT on the
incomer feeder.
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Figure 6.24: The signal matrix of the analog inputs for currents of the IED_C
Figure 6.25a: The protection function blocks for instantaneous tripping for internal fault
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Figure 6.25b: The protection function blocks used for back-up protection
6.6.3 Function blocks for the signal matrix of the binary outputs in the IED_C
The outputs of protection functions in Figure 6.25a are all connected to the inputs
BO2 and BO3 of the function block SMBO respectively as shown in Figure 6.26
below.This function block outputs link the signal with the physical binary output
modules of the IED_C and also to the the LEDs that are displayed at the front panel
of the IED.This is the basic operation when the fault is at the busbar.
Figure 6.26: The function block for the signal matrix of the binary outputs
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6.6.4 Function blocks for logic signals in the IED_C
For the considered busbar protection scheme developed for the laboratory test bench
IED_C plays a most important role.It is where all the decissions are constructed and
made.This critical part is done by the logic function blocks. Figure 6.27 shown two
sets of logic gates and they are both OR type.The first OR gate is used for linking the
hardwire connection from the IED_A and the IED_B.The binary output module
(BOM_4.BO1) of the IED_A in Figure 6.20 is connected to the binary input module (
BIM_3.BI3) of the IED_C via a copper cable.This also is done for IED_B and this is to
transport signals for reverse blocking. When a signal from the IED_A or IED_B is sent
to this logic block it will then become active and will send its output to blocks ether
PHPIOC or EFPIOC for tripping depending on the type of the fault.
Figure 6.27: The logic block of OR gates utilized for sending the tripping signals to the
physical circuit breaker
The second OR gate in Figure 6.27 is used for sending the tripping signal to the
phisical circuit breaker.Three different inputs are connected to this OR gate.Input one
represents the PHPIOC-TRIP signal displayed by the red led two,the input two
represents EFPIOC-TRIP signal displayed by the red led three, and the input three
represents GOOSE-TRIP signal displayed by the red led five.
Figure 6.28: The GOOSEBINRCV function block for the IED_A and IED_B installed in the
IED_C
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6.6.7 A logic OR gate function blocks in IED_C
The outputs of the AND gate function blocks in Figure 6.29 are connected into the
inputs of the OR gates in Figure 6.30a. The output of the OR gates in Figure 6.30a
are connected into the inputs of the OR gate in Figure 6.30b
Figure 6.30b: GOOSE logical OR gates for the IED_A and IED_B
176
based operation of the reverse blocking scheme. This algorithms are implemented in
laboratory test bench to run the experiements.
177
6.7 Operation of the busbar protection scheme using hard wire system
The basic operation of this scheme is discussed in Chapter two. A CMC 356 is used
to inject the simulated fault currents. This hardware is controlled by software called
OMICRON Test universe that is installed in a PC. This software features all the
necessary components that are used for testing protection devices. In this case
overcurrent features are used. The overcurrent test module and the hardware
configuration are done for the distribution network with three protection devices. The
overcurrent module that is configured for the practical and non-directional overcurrent
protection functions with IDMT for low currents and DMT for high currents tripping
characteristics is shown in Figure 6.31 below. Two types of faults are simulated in this
network namely the external fault when the fault is at feeder and the internal fault
when the fault is at the busbar. Three IEDs used namely: the ABB REL670 and the
REB670 on the two outgoing feeders and the RED670 for the incoming feeder.
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6.7.1 Fault on the two outgoing feeders making use of hard wires for communication
Figure 6.32: The busbar reverse blocking scheme when the fault 1 is on the line that
feeds load 2
When fault 1 is in the line that feeds load 2 shown in Figure 6.32, the protection
function block OC4PTOC in the IED_A and IED_C become active at the same
time.The time delays for both protection functions are set differently as shown in
Chapter four under Table 6.16 for IED_A and Table 4.25 for the IED_C. The
combined output signals LINE_CT_B_I3P of SMAI1 in Figure 6.18 are sent to the
input signal I3P of four step phase overcurrent protection (OC4PTOC) function block
in Figure 6.19. Then the output signal ST1 of OC4PTOC is active and at the same
time activating the protection function of the IED_C shown in Figure 6.25b A signal
TOC 1-START is then sent to block the protection block of the IED_C via signal
matrix for binary output one (BO1) that is linked to the physical binary output module
(BOM_4.BO1) of the IED_A as shown in Figure 6.20. After some time delay based on
DMT characteristics the output TR1 in Figure 6.19 is active and sends the signal
TOC1-TRIP via the signal matrix for the binary output two (BO2) of Figure 6.20 to
physical binary output module (BOM_4.BO2) of the IED_A tripping the breaker
open.The next step is to inject the fault 2 on the line that feeds load1 as shown in
Figure 6.32 and the same technique as for the fault 1 in load 2 is folowed.
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6.7.2 Fault occurs on the busbar B2 making use of hardwires for communication
Figure 6.33: The busbar reverse blocking scheme when the fault 2 is in the busbar B2
Figure 6.34: The flow chart algorithm for GOOSE engineering of the laboratory test
bench
181
Figure 6.35: The identification of IEDs in the CCT600 software tool
Once all IEDs are identified the next step is to create the data sets under the
IEC61850 Data Engineering window that are going to be sent as GOOSE messages
by the IEDs. The IED section window as shown in Figure 6.36 is used for housing all
the devices that are going to be used.
183
Figure 6.37: The IEC61850 Data sets Engineering for the IED_B
Once the data sets are configured the next step is to do GOOSE control engineering.
In order to be able to send GOOSE messages from the IED_A and IED_B to the
IED_C, the GOOSE Control Block (GoCB) is defined for the IED_A and IED_B as
shown in Figure 6.38 below. This GoCB contains Datasets that carry data objects of
data attributes shown in the Figure 6.37 above. When the data attribute triggers
changes as a result of a fault, GOOSE messages will be published and IED_C at the
incoming feeder is subscribed to them. Therefore all the data sets that are configured
for the IED_A will be replicated into the buffer that is going to be sent. The buffer will
also contain the actual value and will then be sent as a message. The subscriber
which is IED_C will then receive the GOOSE messages including their sequence
numbers. Once this configuration of the GOOSE control engineering is completed
routing of Information between the IEDs and the GoCB is done.
184
Figure 6.38: The mapping of GOOSE control engineering
The IED_C which should receive the GOOSE message is recognized. This IED has
to be described in the engineering state as one that will receive GOOSE messages. It
is defined at the LN0 under the structure of the LD in the receiving IED which in this
case it is IED_B. This IED is identified as the input. This link is done by drag-and-drop
method of the IED icon to the GoCB shown in Figure 6.38.
When the linking of GoCB to an IED is completed the next step is to update the
dataflow and the output results are shown in Figure 6.39 above. The recorded result
shows that the IED_A and IED_B are linked to the IED_C. The next procedure is to
export the SCD file from the CCT600 software as shown in Figure 6.40 and then to
185
import it back to the PCM600 software so that the signal matrix for the GOOSE
communication is completed.
Figure 6.40: The exporting of the SCD file from the CCT600 software tool
6.8.2 Signal Matrix Tool (SMT) in PCM600 software used for making GOOSE
connection
The SCD file from the CCT600 software is imported to the PCM600 software tool in
order to make GOOSE connection. This configuration is done using SMT. When the
SCD file is imported to the PCM600 software under SMT a new page is automatically
created and it is called GOOSE receive. In this case the page shown in Figure 6.41
represents the GOOSE connection between the IED_C and the IED_B. The output of
EF4PTOC function block (START and TRIP) and also OC4PTOC function block
(START and TRIP) are sent via GOOSE messages to the IED_C. The same method
is used for connection between the IED_C and the IED_A. The configuration is
completed and the next step is to send the data to the IEDs.
The two configurations: IED configuration using PCM600 software tool and IED
GOOSE engineering using CCT600 software tool are now implemented. The next
step is to run the reverse busbar blocking scheme using the laboratory test bench
and to record the results.
186
Figure 6.41: The representation of the signal matrix tool in PCM600 software
Figure 6.42: The simulated faults in one of the two outgoing feeders
187
In a case where a three phase fault occures on the line that feeds load 2 in Figure
6.42 the protection function blocks OC4PTOC at the IED_C and IED_A become
active at the same time. The time delays for both protection functions are set
differently.The parameters for the time setting are shown in Chapter four under Table
6.16 for IED_A and Table 4.25 for the IED_C. A TOC1-START signal of the IED_A
from Figure 6.19 is sent to the input of the GOOSEBINRCV function block in Figure
6.28. Then this fuction block generates an output signals TOC1-START-IED_A and
OUTIVAL1-IED_A that is sent to a logic AND gate as shown in Figure 6.29.This logic
block then generates an output signal TOC-GOOSE-START-IED_A and sends it to
the logic OR gate shown in Figure 6.30a for reverse blocking.This logic gate then
generates an output signal called GOOSE-BLOCK and sends it to the input of the
logic gate for OC4PTOC as shown if Figure 6.30b.This logic OR gates generates
OC4PTOC-BLOCK signal sending it to the input of the protection function OC4PTOC
shown in Figure 6.25b in order to stop it from operating. After the chosen delayed
time from the OC4PTOC in Figure 6.19 a signal TOC-TRIP is genetated via the signal
matrix for the binary output two (BO2) to the physical binary output module
(BOM_4.BO2) of the IED_A tripping the breaker open. When the single phase to the
ground fault occurs the same algorthims as for the three phase fault is used. The only
difference is that the EF4PTOC is used for protection. If the OC4PTOC block in
Figure 6.19 does not operate or clear the fault at the given time the OC4PTOC block
in Figure 6.25b will sent a trip signal to open the breaker at the incoming feeder
shown in Figure 6.42.The same algorithm is implemented when the fault occurs on
line that feeds load 1 where the IED_B is installed. The results shown later are only
focusing on the IED_B.
6.9.2 Fault at the busbar B2 where the IED_C is used for protection
When a three phase fault is issued at the busbar a selectivity scheme configured for
the IED_C in the incoming bay provides high-speed protection making use of the fast
instantaneous tripping element. In this case none of the IEDs on the outgoing feeder
picks up or sees this fault. Therefore no blocking signal will be issued as shown in
Figure 6.43. The results are recorded and analyzed for this experiment
188
Figure 6.43: The simulated fault on the main intake busbar
189
Figure 6.44: The three phase fault at the outgoing feeder where the IED_B is installed
190
Figure 6.45: The results for Ethernet cable using GOOSE messages and hardwired
connection between IEDs
The results recorded when both blocking signals were already sent to IED_C are
shown in Figure 6.46. In this case the GOOSE BLOCK represented in blue shows the
binary signal measured to see how long it took before the TRIP signal is issued by
IED_B at the outgoing feeder. It can be seen that the GOOSE message took 216 ms
delay from time when IED_B was triggered which is correct base on the DMT
characteristic that was selected for the IED_B.
Figure 6.46: The results for the time measurement taken by the GOOSE BLOCKING
binary signal.
191
In Figure 6.47 the HW BLOCK represented in red shows the binary signal measured
to see how long it took before the trip signal is issued by the IED_B at the outgoing
feeder. The result shows that the HW BLOCK signal took 240.8 ms time delay and
based on the DMT characteristic set for the IED_B the time delay is increased by 40
ms. In a case where the fault is at the feeder where the IED_A is installed the same
procedure is implemented. Therefore the practical results are not documented.
Figure 6.47: The results for the time measurement taken by the the WH BLOCKING
binary signal
6.10.3 Performances of the hardwired and GOOSE solution for a fault in the outgoing
feeder
There are three main issues that create time delay when the hardwired protection
communication is performed, namely:
The output circuitry delay
The input handling and filtering time
The application cycle time
GOOSE has more advantages when it comes to signal time delay. It also simplifies
the wiring of the system. By mean of horizontal communication the response time
from a device to a device is improved. These factors shown above were taken into
consideration when hardwire was implemented and the details of the results are
discussed later in the chapter.
192
The Figure 6.48 shows the behavior of a three phase analog currents when a fault is
applied at the busbar B2. The fault current of 17194.22 A is injected into the busbar
and the instantaneous tripping element configured in the IED_C took 24 ms to trip. In
this case the IED_C is only used for tripping for the fault on the busbar B2 also known
as internal fault.
Figure 6.48: The results obtained for three phase fault on the busbar B2
193
needed and this creates another time delay. When the GOOSE messages are used
for horizontal communication all these problems are solved. For a signal to be sent
from one protection device to another one through the binary modules of the IEDs
there is no need of auxiliary power supply and therefore no delay is created. This way
of communication also simplifies the wiring and signalling of the system. The lab test
bench developed for thesis is able to improve the speed and reliability of the
protection scheme making use of GOOSE messages for communication.
6.2 Conclusion
The GOOSE services that are used reverse blocking in the busbar protection scheme
are implemented. The effectiveness of using the IEC61850 standard for protection is
discussed and analyzed. The IEDs configuration is successfully achieved with an
assistance of the PCM600 software tool. The GOOSE engineering for the IEDs was
also achieved successfully. The new approach of replacing the traditional
conventional hard-wired blocking signals between the protection devices with an
Ethernet LAN for GOOSE communication was proven to be successful. The
operational speed was improved by using the GOOSE messages, when compared to
the operational speed of the hardwired blocking signal for the busbar protection
scheme. The reliability of the busbar protection system is also improved. The new
method furthermore creates flexibility for future improvement of the protection
schemes. It means that it provides the system to be easily extended and also
reconfigurable for different network topologies. The test bench will be utilized for
training of students and employees from utility companies that are in the protection
field. It can be used as the platform to perform different schemes and to test the
performance of GOOSE communication between the IEDs.
The next chapter focuses on conclusions, deliverables, and recommendations for the
future work on busbar protection schemes at distribution levels.
194
CHAPTER SEVEN
CONCLUSION AND RECOMMENDATION
7.1 Introduction
Busbars are the most important components in the distribution networks. Faults on
the busbar are uncommon, however an occurrence of a busbar fault can lead to a
major loss of power. Busbars are the areas in a substation where the levels of current
are high and therefore the protective relay application is very critical. Most circuits in
the power system are connected to the busbars and therefore a sufficient protective
system is required to protect their protection. In order for the protection scheme to be
successful it is important to carry out the following specifications: Selectivity, Stability,
Sensitivity, and Speed. To meet all of the above requirements protection must be
reliable, meaning that the protection scheme must trip when called up to do so
(dependability) and it must not trip when it’s not supposed to (security).
The thesis focuses on the reverse blocking busbar protection scheme with aim to
improve the speed of its operation and at the same time to increase operational
reliability, flexibility and stability of the protection during external and internal faults by
implementation of the extended functionality provided by the IEC61850 standard-
based protective IEDs. The practical implementation of the scheme by the use of IEC
61850 standard communication protocol is investigated
The research analyzes in detail the reverse blocking busbar protection scheme that is
used at the moment in the power systems and it develops an improved IEC 61850
based reverse blocking busbar protection scheme for distribution networks. The
proposed scheme is modeled, set up as well as simulated using PCM600 and
CCT600 softwares and implemented in a protection laboratory test bench
environment.
This Chapter summarizes the results obtained the key findings and the thesis
deliverables. The deliverables of the thesis are presented in part 7.2. Part 7.3
describes the possible academic, research and industry applications of the thesis
deliverables. The future research work in the field of busbar protection for distribution
systems is proposed part 7.4. Part 7.5 gives reference of the paper sent for
publication.
195
7.2 Deliverables
In power systems the digital protection for the busbars in a distribution level has been
neglected for a long time when compared to other protection. The need for digital
protection for busbar has been discussed and solved by the implementation of the
principles of the IEC 61850 standard in the thesis chapters. The deliverables of the
thesis are as follows:
7.2.4 Calculation of the short circuit impedance for all relevant components of the
considered distribution network
Each component in the network was calculated for short circuit impedances using the
collected parameters. The elements in the network were later represented by
equivalent impedance for a balanced system
196
7.2.5 Reference of all impedances to the reference voltage
Since the network had the multiple voltage levels the impedances of the components
that were calculated earlier were converted to a reference voltage. In Chapter four
this was done in order for them to be implemented in a single equivalent circuit in the
software environment of DigSILENT.
7.2.7 Design of the parameters and settings of the protection devices and the
protection scheme investigation by simulation
The obtained short circuit currents were used to design the settings of three ABB
conventional and three IEC 61850 standard compatible relays to be used for building
of two study cases of the reverse blocking protection scheme in Chapter four.
Operation performance of these schemes was investigated by simulation in
DigSILENT for various types of faults. The results from simulation were analysed and
compared. Conclusion was that the design and performance of the scheme is
according to the requirements and the expectations.
7.2.8 Analysis of the application of the IEC 61850 standard to the process
engineering of the ABB IED 670 series
ABB IED 670 series were selected for the implementation of the reverse blocking
protection scheme Implementation of the various parts of the IEC 61850 standard in
the ABB IED 670 series is described and analysed in Chapter five in order to be used
further for the implementation of the reverse blocking protection scheme
7.2.11 Implementation of the reverse blocking protection scheme using hard wires for
transfer of the blocking signals between the IEDs
The three used ABB IEDs were connected according to the scheme using copper
wires for transfer of the blocking signals between the relays. The CMC 356 Omicron
device was used to inject currents for the following faults:
Single phase to ground fault on line (B2 to B4) for relay A
Three phase fault in line (B2 to B4) for the relay A
Single phase to ground fault in line (B2 to B3) for the relay B
Three phase fault type at line (B2 to B3) for relay B
Single phase to ground fault at the busbar B2 for the relay C
Three phase fault on the busbar B2 for the relay C
The carried out activities for these faults were divided into two part namely internal
fault where the fault is at the busbar and external fault where the fault is at the
outgoing feeders. The fault response values were described in Chapter six. This
method of communication created time delay in transmitting the signal from the
sending device to the receiving devices. The delay came from the time taken by the
auxiliary relays from picking up and dropping off when the signal had to be sent from
the binary output of the sending device to the binary input of the receiving device.
199
7.2.13 Comparison of the operation of the hardwired and Ethernet communication
based reverse blocking protection schemes
Speed operation of the two protection schemes were compared for the applied faults.
The new approach of replacing the traditional conventional hard-wired blocking
signals between the protection devices with an Ethernet LAN for GOOSE
communication was proven to be successful. The operational speed was improved by
using the GOOSE messages, when compared to the operational speed of the
hardwired blocking for busbar protection scheme. When it came to flexibility the
relays had major disadvantages when compared to the IEDs.
Utilization of the new digital technology allowed the traditional reverse blocking
schemes to be considerably improved in terms of operational speed. The new digital
protection also offers an increase of flexibility and operational reliability. This is
achieved by introducing Ethernet communication network using GOOSE messages
between the IEDs. This method allowed the blocking signals to be sent directly from
one IED to another IED without any additional delay created by the auxiliary relays.
The test bench was used for demonstrations at the national seminar on the IEC
61850 standard developments and applications organized by the Centre for
Substation Automation and Energy Management systems of the Department of
Electrical Engineering. The test bench will be used in future for providing of hands-on
courses for the engineers and technicians. Another application will be for testing and
development of protection schemes for different industrial projects.
The protection scheme developed in this project focussed only on ABB IEDs vendor
and therefore interoperability is not implemented. Utilization of different vendors of
IEDs for the scheme implementation would benefit the students to understand
interoperability problems between the joint work of the different vendors IEDs.
7.5 Publication
Mnguni M, R. Tzoneva (2013) Comparison of the operational speed between
conventional hard-wired and IEC 61850 standard-based implementation of the
reverse blocking protection scheme for distribution networks, Sent to Journal of
Electrical Engineering and Technology ( JEET), December 2013.
201
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210
APPENDIX A
IED FUNCTIONS AND CONFIGURATION SOFTWARE TOOLS PCM600
AND CCT600
A.1 Introduction
The major concern for protection in the power systems is to assure continuous
stability and reliability of the system operation. The ideal approach to understand
protection in the power systems is by creating a lab test bench where simulation and
emulation studies are implemented. In this Appendix A a detailed application
description of the protection software tools and a list of function blocks, input and
output signals as used in the test bench is done. The software tool package used for
the IED configuration and all ABB 670 series function blocks that are used for the
project are described. The blocks are presented grouped in different categories
according to their functions.
Figure A.1: A PCM600 viewer (Protection and control IED manager guide, 2012)
211
PCM600 tool is designed to communicate with IEDs via TCP/IP protocol that is
incorporated with LAN or WAN. This fast and reliable connection is achieved through
the communication port in front of the IED. The tool is capable of using a single
command to write and read configuration, and setting data for the IED. PCM600 tool
has the intelligence that assures the projects and data produced with earlier versions
of the tool, to be edited which enables full backwards compatibility.PCM600 tool has
the following functions / tools (Protection and control IED manager guide, 2012):
Signal matrix
Parameter setting
Communication management
Disturbance handling
Signal monitoring
Event viewer
Creating/Handling projects
IED user management
XRIO parameter export/import
Graphical display editor
Hardware configuration
User management
Graphical application viewing
Graphical application configuration
IEC 61850 communication configuration
Figure A.2: A signal matrix tool viewer (Protection and control IED manager guide,
2012)
212
A.2.2 Parameter setting
PCM600 has a parameter setting tool where IEDs parameters are viewed as shown
in Figure A. 3 below. This is where the setting of the IED is changed according to the
requirements. This tool allows the parameters to be read from IED to PCM600 and
vice versa. This tool can be utilized in two different modes namely normal mode and
advance mode. The normal mode is used for viewing and changing the commonly
utilized parameters. The advance mode is used to show all parameters that can be
set (Protection and control IED manager guide, 2012).
Figure A.3: The Parameter setting viewer (Protection and control IED manager guide,
2012)
213
A.2.5 Event viewer
The event viewer window is used for viewing the sequence of events of the IEDs’
information including timestamps. The event viewer assists with logging the
information and facilitates detailed post-fault analyses of faults and disturbances
(Protection and control IED manager guide, 2012).
Figure A.4: The Graphical display editor (Protection and control IED manager guide,
2012)
214
used in the tool to the actual one in the IED (Protection and control IED manager
guide, 2012).
Figure A.5: Application configuration and viewer (Protection and control IED manager
guide, 2012)
215
is utilized for IEC 61850 substation configurations including the inter-bay
communication (Protection and control IED manager guide, 2012).
Table A.1: Supported functions per tool variant (Protection and control IED manager
guide, 2012)
216
A.3 Analog input function block
Analog inputs channels are used as the path for measurements and protection
signals. When power is measured it is important that the directions of all differential
functions are properly defined. It is also required that a correct configuration is
achieved by selecting and calculating correct quantities used in power systems.
Therefore connection of CTs and VTs to the IED is important that is done properly. In
ABB IED 670 series the measurement algorithms for protection are done at the
primary side of the system, including set values. (ABB 670 series technical reference
manual, 2012).
Figure A.6: Signal matrix for the analog inputs (SMAI) function block(ABB 670 series
technical reference manual, 2012).
Table A.2: Input signals for the SMAI function block (ABB 670 series technical
reference manual, 2012).
Signal Description
BLOCK Block group 1
DFTSPFC Number of samples per fundamental cycle used for DFT calculation.
217
Table A.3: Output signals for the SMAI function block (ABB 670 series technical
reference manual, 2012).
Signal Description
Figure A.7: Signal matrix for binary inputs (SMBI) (ABB 670 series technical reference
manual, 2012)
Table A.4: Input signals for the SMBI function block (ABB 670 series technical
reference manual, 2012)
Signal Description
BI1NAME Signal name for Binary Input 1 in SMT.
BI2NAME Signal name for Binary Input 2 in SMT.
BI3NAME Signal name for Binary Input 3 in SMT.
BI4NAME Signal name for Binary Input 4 in SMT.
BI5NAME Signal name for Binary Input 5 in SMT.
BI6NAME Signal name for Binary Input 6 in SMT.
BI7NAME Signal name for Binary Input 7 in SMT.
BI8NAME Signal name for Binary Input 8 in SMT.
BI9NAME Signal name for Binary Input 9 in SMT.
BI10NAME Signal name for Binary Input 10 in SMT.
218
Table A.5: Output signals for the SMBI function block (ABB 670 series technical
reference manual, 2012).
Signal Description
BI1. Binary input 1.
BI2. Binary input 2.
BI3. Binary input 3.
BI4. Binary input 4.
BI5. Binary input 5.
BI6. Binary input 6.
BI7 Binary input 7.
BI8 Binary input 8.
BI9 Binary input 9.
BI10 Binary input 10.
Figure A.8: The SMBO function block (ABB 670 series technical reference manual,
2012).
Table A.6: Input signals for the SMBO function block (ABB 670 series technical
reference manual, 2012).
Signal Description
BO1 Signal name for Binary Output 1 in SMT.
BO2 Signal name for Binary Output 2 in SMT.
BO3 Signal name for Binary Output 3 in SMT.
BO4 Signal name for Binary Output 4 in SMT.
BO5 Signal name for Binary Output 5 in SMT.
BO6 Signal name for Binary Output 6 in SMT.
BO7 Signal name for Binary Output 7 in SMT.
BO8 Signal name for Binary Output 8 in SMT.
BO9 Signal name for Binary Output 9 in SMT.
BO10 Signal name for Binary Output 10 in SMT.
219
Table A. 7: The output signals for the SMBO function block (ABB 670 series technical
reference manual, 2012).
Signal Description
BO1NAME Signal name for Binary Output 1 in SMT.
BO2NAME Signal name for Binary Output 2 in SMT.
BO3NAME Signal name for Binary Output 3 in SMT.
BO4NAME Signal name for Binary Output 4 in SMT.
BO5NAME Signal name for Binary Output 5 in SMT.
BO6NAME Signal name for Binary Output 6 in SMT.
BO7NAME Signal name for Binary Output 7 in SMT.
BO8NAME Signal name for Binary Output 8 in SMT.
BO9NAME Signal name for Binary Output 9 in SMT.
BO10NAME Signal name for Binary Output 10 in SMT.
The overcurrent function block consists of low transient overreach elements operating
with short tripping time is used when high set short-circuits protection function is
required. The short tripping time is trigged when eighty percent of the rated current of
the power line at minimum source impedance is obtained. This function block has
I3P, BLOCK and ENMULT inputs. It has TRIP, TRL1, TRL2, TRL3 outputs as shown
in Figure 5.8. The names and description of the signal matrix for analog inputs are
shown in Tables A.8 and A.9. (ABB 670 series technical reference manual, 2012).
Figure A.9: Instantaneous phase overcurrent function block (ABB 670 series technical
reference manual, 2012).
220
Table A.8: Input signals for the PHPIOC function block (ABB 670 series technical
reference manual, 2012)
Signal Description
I3P. Group signal for current input.
BLOCK Block of functions.
ENMULT. Enable current start value multiplier.
Table A.9: Output signals for the PHPIOC function block (ABB 670 series technical
reference manual, 2012).
Signal Description
The overcurrent function block consists of low transient overreach elements operating
with short tripping time is used when high set short-circuits protection function is
required. The short tripping time is trigged when eighty percent of the rated current of
the power line at minimum source impedance is obtained. This function block has
I3P, BLOCK and ENMULT inputs. It also consists of TRIP, output as shown in Figure
A.10 below. The names and description of the signal matrix for analog inputs and are
shown in Table A.10 and A.11 (ABB 670 series technical reference manual, 2012).
221
Figure A.10: EFPIOC function block (ABB 670 series technical reference manual, 2012)
Table A.10: Input signals for the EFPIOC function block (ABB 670 series technical
reference manual, 2012).
Table A.11: Input signals for the EFPIOC function block (ABB 670 series technical
reference manual, 2012).
Signal type Description
TRIP. Boolean. Trips signal
A.4.3 Four step phase overcurrent protection (OC4PTOC, 51_67) function block
This protection block has four protection sub-functions with the same algorithm but
working with different time and current values according to the measured current
signal. These sub-functions are called steps and each of them can operate with
inverse or definite time delay elements. The function element is either set as non-
directional or directional depending on the protection scheme. This block has I3P,
U3P, BLOCK, BLKTR, BLKST1,2,3,4 ,ENMULT1,2,3,4 inputs and TRIP, TRI-4,
TRL1-3, TRL1 L1-3, TRL2 L1-3, TRL3 L1-3, TR4 L1-3, START, ST1-4, ST1 L1-3,
222
ST2 L1-3, ST3 L1-3, ST4 L1-3, 2NDHARM,DIRL1-3 outputs as shown in Figure A.11.
This function block consists of four different sub-divisions when it comes to protection.
These sub-divisions shown in Figure A.12 consist of the following (ABB 670 series
technical reference manual, 2012):
direction element
harmonic restraint blocking function
over current function
mode selection
The names and description of the signal matrix for analog inputs are shown also in
Table A.12 and A.13.
Figure A.11: The OC4PIOC function block (ABB 670 series technical reference manual,
2012).
223
Figure A.12: The Functional overview of 0C4PTOC block (ABB 670 series technical
reference manual, 2012)
Table A.12: The input signals for the OC4PTOC function block (ABB 670 series
technical reference manual, 2012).
Signal Description
I3P. Group signal for current input.
U3P. Group signal for voltage input.
BLOCK. Block of function.
BLKTR. Block of trip.
BLKST1. Block of step 1.
BLKST2. Block of step 2.
BLKST3. Block of step 3.
BLKST4. Block of step 4.
ENMULT1. When activated the current amplifier is in use for step 1.
ENMULT2. When activated the current amplifier is in use for step 2.
ENMULT3. When activated the current amplifier is in use for step 3.
ENMULT4. When activated the current amplifier is in use for step 4.
Table A.13: The Output signals for the OC4PTOC function block (ABB 670 series
technical reference manual, 2012)
Signal Description
TRIP TRIP
TR1 Common trip signal from step 1
TR2 Common trip signal from step 2
TR3 Common trip signal from step 3
TR4 Common trip signal from step 4
TRL1 Trip signal from phase L1
TRL2 Trip signal from phase L2
TRL3 Trip signal from phase L3
TR1L1 Trip signal from step 1 phase L1
TR1L2 Trip signal from step 1 phase L2
TR1L3 Trip signal from step 1 phase L3
224
TR2L1 Trip signal from step 2 phase L1
TR2L2 Trip signal from step 2 phase L2
TR2L3 Trip signal from step 2 phase L3
TR3L1 Trip signal from step 3 phase L1
TR3L2 Trip signal from step 3 phase L2
TR3L3 Trip signal from step 3 phase L3
TR4L1 Trip signal from step 4 phase L1
TR4L2 Trip signal from step 4 phase L2
TR4L3 Trip signal from step 4 phase L3
START General start signal
ST1 Common start signal from step 1
ST2 Common start signal from step 2
ST3 Common start signal from step 3
ST4 Common start signal from step 4
STL1 Start signal from phase L1
STL2 Start signal from phase L2
STL3 Start signal from phase L3
ST1L1 Start signal from step 1 phase L1
ST1L2 Start signal from step 1 phase L2
ST1L3 Start signal from step 1 phase L3
ST2L1 Start signal from step 2 phase L1
ST2L2 Start signal from step 2 phase L2
ST2L3 Start signal from step 2 phase L3
ST3L1 Start signal from step 3 phase L1
ST3L2 Start signal from step 3 phase L2
ST3L3 Start signal from step 3 phase L3
ST4L1 Start signal from step 4 phase L1
ST4L2 Start signal from step 4 phase L2
ST4L3 Start signal from step 4 phase L3
2NDHARM Block from second harmonic detection
DIRL1 Direction for phase 1
DIRL2 Direction for phase 2
DIRL3 Direction for phase 3
The OCPTOC function block used phase currents that are preprocessed in a DFT
block This DFT block creates RMS values by using fundamental frequency of the
phase currents. This process suppresses the influence of high harmonic and DC
current components. Then the current components derived by the RMS values are
fed to the OC4PTOC where there is a comparator circuits that compares the each
phase current. If it happens that one of the phases current is greater than the set
operation current value a signal will be sent to active the output START without a
delay. All four steps have a common output named START. If there are no blocking
signals sent to the output START a signal will be sent to activate the timers in all
steps. The timers have characteristic functions such as definite or inverse time delay.
It will then send a signal to activate the output TRIP of the OC4PTOC after certain
time (ABB 670 series technical reference manual, 2012).
225
A.4.4 Four step residual overcurrent protection (EF4PTOC) function block
EF4PTOC consists of four steps each with various protection characteristics It is used
for phase-to-earth faults. It has I3P, U3P, I3PPOL, BLOCK, BLKTR, BLKST1,2,3,4,
ENMULT1,2,3,4, CBPOS, CLOSECB, OPENCB inputs and TRIP, TRINI-4, TRSTOF,
START, STIN1-4, STSOTF, STFW, STRV, 2NDHARM outputs as shown in Figure
A.13. EF4PTOC consists of four different sub-divisions when it comes to protection.
These subdivisions are as follows (ABB 670 series technical reference manual,
2012):
direction element
harmonic restraint element
blocking function
over current function
mode selection
switch on to fault
An overview of the EF4PTOC block with the different parts is shown in Figure A.14.
The names and description of the signal matrix for analog boolean inputs and
boolean outputs are shown in Tables A.14 and A.15 (ABB 670 series technical
reference manual, 2012).
Figure A.13: The EF4PTOC function block (ABB 670 series technical reference manual,
2012)
226
Figure A.14: The functional overview of the EF4PTOC block (ABB 670 series technical
reference manual, 2012)
Table A.14: The input signals for the EF4PTOC function block (ABB 670 series technical
reference manual, 2012)
BLKST1 BOOLEAN. 0 Block of step 1. ( Start and trip )
BLKST2 BOOLEAN. 0 Block of step 2. ( Start and trip )
BLKST3 BOOLEAN. 0 Block of step 3. ( Start and trip )
BLKST4 BOOLEAN. 0 Block of step 4. ( Start and trip )
ENMULT1 BOOLEAN. 0 When activated, the current multiplier is in use for
step1.
ENMULT2 BOOLEAN. 0 When activated, the current multiplier is in use for
step1.
ENMULT3 BOOLEAN. 0 When activated, the current multiplier is in use for
step1.
ENMULT4 BOOLEAN. 0 When activated, the current multiplier is in use for
step1.
CBPOS BOOLEAN. 0 Breaker position.
CLOSECB BOOLEAN. 0 Breaker close command.
OPENCB BOOLEAN. 0 Breaker open command.
Table A.15: The Output signals for the EF4PTOC protection function block (ABB 670
series technical reference manual, 2012)
227
TRIN4. BOOLEAN. Trip signal from step 4.
TRSOTF. BOOLEAN. Trip signal from earth switch onto fault function.
START. BOOLEAN. General start signal.
STIN1. BOOLEAN. Start signal step 1.
STIN2. BOOLEAN. Start signal step 2.
STIN3. BOOLEAN. Start signal step 3.
STIN4. BOOLEAN. Start signal step 4.
STSOTF. BOOLEAN. Start signal from earth fault switch onto fault function.
STFW. BOOLEAN. Forward directional signal.
STRV. BOOLEAN. Reverse directional start signal.
nd
2NDHARMD. BOOLEAN. 2 harmonic block signal.
The EF4PTOC function block used residual currents that are preprocessed in a DFT
block. It then creates the RMS values from the fundamental frequency per residual
current. These current components are fed to EF4PTOC function where there is a
comparator circuits that compares the each phase current. If it happens that the
residual current is greater than the set operation current value a signal will be sent to
active the output STINx ( x = step1-4) without a delay. All four steps have a common
output named START. If there is no blocking signals sent to the output START a
signal will be sent to activate the timers in all steps. If there is blocking signal send to
the output START a signal will be sent to activate the timers in all steps. The timers
have characteristics functions such as definite or inverse time delay It will then send a
signal to activate the output TRIP in EF4PTOC function block (ABB 670 series
technical reference manual, 2012).
228
A.5.1.1 Measurement function (CVMMXU) function block
Function IEC IEC 60617 ANSI/IEEE C37.2 device
description 61850 identification number
measurements CVMMXU
The measurement function (CVMMXU) has I3P and U3P input and has the following
as output quantities shown in Figure A.15 below. The names and description of the
signal matrix for analog inputs is shown in Table A.16 and for the outputs in Table
A.17 below where , and are three phase active, reactive and apparent power,
represents power factor, represents phase-to-phase voltage amplitude,
represents phase current amplitude, and F represents power system frequency
Figure A.15: The Measurement function block (CVMMXU) (ABB 670 series technical
reference manual, 2012).
Table A.16: The Measurement function block (CVMMXU) input signals (ABB 670 series
technical reference manual, 2012)
Table A.17: The Measurement function block (CVMMXU) output signals (ABB 670 series
technical reference manual, 2012)
Name type Description
S REAL Apparent power magnitude of dead band value
S_RANGE INTEGER Apparent power range
P_INST REAL Active Power
P REAL Active Power magnitude of dead band value
P_RANGE INTEGER Active power range
Q_INST REAL Reactive power
Q REAL Active power magnitude of dead band value
Q_RANGE INTEGER Reactive Power range
PF REAL Power Factor magnitude of dead band value
PF_RANGE INTEGER Power Factor range
ILAG BOOLEAN Current is lagging voltage
ILEAD BOOLEAN Current is leading voltage
U REAL Calculate voltage magnitude of dead band value
229
U_RANGE INTEGER Calculated voltage range
I REAL Calculated current magnitude of dead band value
I_RANGE INTEGER Calculated current range
F REAL System frequency magnitude of dead band value
F_RANGE INTEGER System frequency range
̅̅̅ (5.1)
̅̅̅ (5.2)
|̅| √ (5.3)
(5.4)
230
Table A.18: The Different methods for calculation of three phase power systems (ABB 670 series technical reference manual, 2012)
Set value for Formula used for complex, three Formula used for voltage and current comment
parameter “Mode “ phase power calculation magnitude calculation
240
A.5.2 Phase current measurement (CMMXU) function block
Function IEC 61850 IEC 60617 ANSI/IEEE
description identification C37.2 device
number
Phase current CMMXU -
measurements
The phase current measurement function (CMMXU) has I3P input and has the
following output quantities as shown in Figure A.16. The names and description of
the signal matrix for analog inputs are shown in Table A.19 and the outputs are
shown in Table A.20 (ABB 670 series technical reference manual, 2012):
Figure A.16: The Phase current measurement function block (CMMXU) (ABB 670 series
technical reference manual, 2012)
Table A.19: The phase current measurement function block (CMMXU) inputs (ABB 670
series technical reference manual, 2012)
Table A.20: The phase current measurement function block (CMMXU) outputs (ABB
670 series technical reference manual, 2012)
241
When three phase current is connected into the input I3P of the phase current
measurement function block ( CMMXU) a configuration tool handles the currents and
calibrates them into measuring accuracy of better then class 0,5. This is managed by
compensating amplitude and angle at five, thirty and hundred percent of the rated
current. The currents that are compensated between five and hundred percent are
constant as shown in Figure A.17 (ABB 670 series technical reference manual, 2007)
Figure A17: Calibration curves (ABB 670 series technical reference manual, 2012)
The phase-phase voltage measurement function (VMMXU) has U3P input and has
the following output quantities as shown in Figure A.18. The names and description
of the signal matrix for analog inputs and outputs of this block are shown in Table
A.21 and A.22 (ABB 670 series technical reference manual, 2012):
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Figure A.18: The Phase-phase voltage measurement function (VMMXU) (ABB 670
series technical reference manual, 2012)
Table A.21: The Input signals for the voltage measurement function (VMMXU) (ABB 670
series technical reference manual, 2012)
Signal Description
U3P Group connection abstract block 2
Table A.22: The output signal for the voltage measurement function (VMMXU) (ABB 670
series technical reference manual, 2012)
Name Description
When three phase voltage is connected into the input U3P of the phase-phase
voltage measurement function block ( VMMXU) a configuration tool handles the
voltages and calibrates them into measuring accuracy of better then class 0,5. This is
managed by compensating amplitude and angle at five, thirty and hundred percent of
the rated voltage. The voltages compensated between five and hundred percent are
constant (ABB 670 series technical reference manual, 2012).
The Current sequence component measurement (CMSQI) has I3P input and has the
following output quantities as shown in Figure A.19. The names and description of
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the signal matrix for analog inputs are shown in Table A.23 and for the outputs are
shown in Table A.24 (ABB 670 series technical reference manual, 2012).
Figure A.19: The current sequence component measurements (CMSQI) function block
(ABB 670 series technical reference manual, 2012)
Table A.23: The Input signals for the current sequence component measurement
(CMSQI) (ABB 670 series technical reference manual, 2012)
Signal Description
I3P Group connection abstract block 3
Table A.24: The Output signals for the current sequence component measurement
(CMSQI) block (ABB 670 series technical reference manual, 2012)
Name Description
3I0 3I0 Amplitude, magnitude of reported value
3I0 RANG 3I0 Amplitude range
I1 I1 Amplitude, magnitude of reported value
I1RANG I1 Amplitude range
I2 I2 Amplitude, magnitude of reported value
I2RANG I2 Amplitude range
When three phase currents are connected into the input I3P of the current sequence
component measurement function block (CMSQI), instant power quantities are
produced. These quantities are calculated and transferred to their responding outputs
which are positive, negative and zero sequence. Calculation of the quantities is done
by means of utilizing the fundamental frequency phasors.
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The voltage sequence measurement (VMSQI) block has U3P input and has the
following as output quantities as shown in Figure 5.19. The names and description of
the signal matrices for analog inputs and the outputs are shown in Table A.25 and
A.26 respectively (ABB 670 series technical reference manual, 2012).
Figure A.20: The voltage sequence measurement (VMSQI) block (ABB 670 series
technical reference manual, 2012)
Table A.25: The Input signals for the Voltage sequence measurement (VMSQI) (ABB
670 series technical reference manual, 2012)
Signal Description
U3P Group connection abstract block 4
Table A.26: The output signals for the Voltage sequence measurement (VMSQI) block
(ABB 670 series technical reference manual, 2012)
Name Description
3U0 3U0 Amplitude, magnitude of reported value
3U0 3U0 Amplitude range
RANG
U1 U1 Amplitude, magnitude of reported value
U1RANG U1 Amplitude range
U2 U2 Amplitude, magnitude of reported value
U2RANG U2 Amplitude range
When three phase voltages are connected into the input UI3P of the voltage
sequence component measurement function block (VMSQI), instant power quantities
are produced. These quantities are calculated and transferred to their responding
outputs which are positive, negative and zero sequence. Calculation of the quantities
is done by means of utilizing the fundamental frequency phasors.
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Event recorder ( ER )
Event list ( EL )
Trip values ( phase values ) ( TVR )
Disturbance recorder ( DR )
Fault locator ( FL)
Figure A.21: The disturbance report structure (ABB 670 series technical reference
manual, 2012).
A.7 Conclusion
This Appendix A has covered the protection functions of distribution network based
on the ABB 670 series IEDs. It also explained the PCM600 software package and it
different tools. The function blocks described in Appendix A are used to design the
busbar reverse blocking scheme.
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APPENDIX B
THE PARAMETER SETTING FOR THE IED_B
B.1 Introduction
The IEDs that are used in the thesis has been configured and certain parameters had
to be completed. Some of the parameters in the configuration are left in their default
values. PCM600 has a parameter setting tool where IEDs parameters are viewed.
Appendix B contains all the IEDs parameters that are completed and viewed. This is
where the setting of the IED is changed according to the requirements. This tool
allows the parameters to be read from IED to PCM600 and vice versa. This tool can
be utilized in two different modes namely normal mode and advance mode. The
normal mode is used for viewing and changing the commonly utilized parameters.
The advance mode is used to show all parameters that can be set. Appendix B
covers all the parameter settings of the IEDs that are used in the reverse busbar
protection scheme. Since the setting for IED_A is similar to IED_B therefore IED_A
setting is not covered (Protection and control IED manager guide, 2012).
247
B.1.2 The settings of binary input modules (BIM) used by IED_B
Table B.1 represents the BIM_3 and BIM_5 which are the hardware configuration of
the input of IED_B .This is where all the income BIM signals are connected.
Table B.1: The settings of the binary input modules (BIM_3 and BIM_5) for IED_B
248
B.1.3 The setting of the binary output module (BOM) for IED_B
The setting of the binary output signals (BOM_4) of IED_B are represented in Table
B.2 below.
Table B.2: The setting of the binary output module (BOM_4) for IED_B.
249
B.1.4 The setting of the transformer module unit (TRM) for IED_B
The setting for the TRM_6I_6U_31 where the line CTs and VTs signals are
connected are represented in Table B.3a and Table B.3b below
Table B.3a: The setting of the transformer module unit (TRM) for IED_B
250
Table B.3b: The setting of the transformer module unit (TRM) for IED_B
251
B.1.4 The communication setting for IED_B
IED_B use the IEC61850-8-1:1 for GOOSE messages. A front port is used for
Ethernet communication with as IP Address 10.1.150.2. Activating the disturbance
recording (DRPRDRE) for IED_B is also shown. SMAI9 is used for measurements.
All the settings are represented in Table B4.
Table B.4: The communication / recording and measurement setting for IED_B
252
B.1.5 The setting of four step phase overcurrent protection (OC4PTOC) for IED_B
The setting of the OC4PTOC:1 for IED_B are represented in Table B.5 below
Table B.5: The setting of four step phase overcurrent protection (OC4PTOC) for IED_B
253
254
B.1.6 The measurement function (CVMMXN) function block for IED_B
The settings of CVMMXN function block for IED_B are represented in Table B.6
below.
Table B.6: The setting of measurement function (CVMMXN) function block for IED_B
255
B.1.7 The measurement function (CMMXU) function block for IED_B
The settings of CMMXU function block for IED_B are represented in Table B.7 below.
Table B.7: The setting of measurement function (CMMXU) function block for IED_B
256
B.1.8 The measurement function (VMMXU) function block for IED_B
The settings of VMMXU function block for IED_B are represented in Table B.8 below.
Table B.8: The setting of measurement function (VMMXU) function block for IED_B
257
B.1.9 The measurement function (VMSQ1) function block for IED_B
The settings of VMSQI function block for IED_B are represented in Table B.9 below.
Table B.9: The setting of measurement function (VMSQI) function block for IED_B
258
B.1.10 The disturbance recording for IED_B
The disturbance recording (DR) function is utilized for recording analog and binary
data during and after the fault. .Table B.10a represents the settings for binary data
(B1RBDR:1). Tables B.10b and B10c represents the settings for analong data
A1RADR:1 and A2RADR:2 respectively.
259
Table B.10b: The settings for analog data (A1RADR:1) of IED_B.
260
Table B.10c: The settings for analog data (A2RADR:2) of IED_B.
261
APPENDIX B
THE PARAMETER SETTING FOR THE IED_C
Table B.11: The settings of the binary input module (BIM_3) for IED_C
262
B.2.2 The settings of binary output module (BOM) used by IED_C
Tables B.12 represents the BOM_4 which are the hardware configuration of the
output of IED_C .This is the path used for all the outgoing signals
Table B.12: The settings of the binary output module (BOM_4) for IED_C
263
B.2.3 The setting of the transformer module unit (TRM) for IED_C
The setting for the TRM_6I_6U_31 where the line CTs and VTs signals are
connected are represented in Table B.13 below
Table B.13: The setting of the transformer module unit (TRM) for IED_C
264
B.2.4 The communication and Instantaneous phase overcurrent protection (PHPIOC,
50) setting for IED_C
IED_B use the IEC61850-8-1:1 for GOOSE messages. A front port is used for
Ethernet communication with as IP Address 10.1.150.1. SMAI9 is used for current
measurements. All the setting including the PHPIOC function block is represented in
Table B14.
Table B.14: The communication / recording and measurement setting for IED_C
265
B.2.5 The setting of four step phase overcurrent protection (OC4PTOC) for IED_C
The setting of the OC4PTOC:1 for IED_C are represented in Table B.15 below
Table B.15: The setting of four step phase overcurrent protection (OC4PTOC) for IED_C
266
267
B.2.6 The disturbance recording for IED_C
Table B.15a represents the settings for binary data (B1RBDR:1). Tables B.15b
represents the settings for analong data A1RADR:1
268
Table B.15b: The settings for analog data (A1RADR:1) of IED_C.
269
B.2.7 Goose binary receive function block (GOOSEBINRCV)
The GOOSEBINRCV functions for IED_A and IED_B are installed in IED_C.These
function block are to receive signals to and from other IEDs via the interbay bus.
Table B.16 represents the settings for GOOSE_IED_A: GOOSEBINRCV: 1 and
GOOSE_IED_A: GOOSEBINRCV: 2 respectively.
. Table B.16: The settings for Goose binary receive function block (GOOSEBINRCV)
270