Unit 2 - Es
Unit 2 - Es
Introduction to PIC16F877
PIC16F877 is one of the advanced and commonly used Peripheral Interface
Microcontroller from Microchip. Simplicity, quality, ease of availability and low price makes
them ideal for different applications. Also, this PIC features all components that modern
microcontrollers have.
Some of the remarkable features of this PIC microcontroller are listed below.
General Features
• 35 instructions are only there.
• Single-cycle instructions are used here. While, two-cycle instructions are used for
program branches.
• 20 MHz clock input – 200 ns instruction cycle is the operating speed.
• 8K x 14 words of Flash Program Memory, Data Memory RAM of 368 x 8 bytes,
EEPROM Data Memory of 256 x 8 bytes.
• Pin out compatible to other 28-pin or 40/44-pin.
• Voltage range of 2 to 5.5 V.
• Low-power, high-speed Flash/EEPROM technology.
• Low-power consumption.
• Static design.
Peripheral Features
• 3 timers are present: Timer0, Timer1, and Timer2.
• Two Compare and Capture PWM modules.
• Synchronous Serial Port (SSP).
• Universal Synchronous Asynchronous Receiver Transmitter with the capability of 9-
bit address detection.
• Parallel Slave Port.
• Brown-out detection circuitry.
Analog Features
• Analog Comparator module present.
• 10-bit, upto 8-channel Analog-to-Digital Converter (A/D).
Other Features
• Selectable oscillator options.
• Data EEPROM Retention > 40 years.
• In-Circuit Debug (ICD) via two pins.
• 100,000 erase/write cycle Enhanced Flash program memory.
• 1,000,000 erase/write cycle Data EEPROM memory.
• Self-reprogrammable.
• In-Circuit Serial Programming via two pins.
• Programmable code protection.
• Power saving Sleep mode.
• Watchdog Timer with RC oscillator.
• PIN 1: MCLR: The first pin is the master clear pin of this IC. It resets the microcontroller
and is active low, meaning that it should constantly be given a voltage of 5V and if 0 V are
given then the controller is reset. Resetting the controller will bring it back to the first line of
the program that has been burned into the IC.
A push button and a resistor is connected to the pin. The pin is already being supplied
by constant 5V. When we want to reset the IC we just have to push the button which will bring
the MCLR pin to 0 potential thereby resetting the controller.
• PIN 2: RA0/AN0: PORT A consists of 6 pins, from pin 2 to pin 7, all of these are bidirectional
input/output pins. Pin 2 is the first pin of this port. This pin can also be used as an analog pin
AN0. It is built in analog to digital converter.
• PIN 3: RA1/AN1: This can be the analog input 1.
• PIN 4: RA2/AN2/Vref- : It can also act as the analog input2. Or negative analog reference
voltage can be given to it.
• PIN 5: RA3/AN3/Vref+: It can act as the analog input 3. Or can act as the analog positive
reference voltage.1
• PIN 6: RA4/T0CKI: To timer0 this pin can act as the clock input pin, the type of output is
open drain.
• PIN 7: RA5/SS/AN4: This can be the analog input 4. There is synchronous serial port in the
controller also and this pin can be used as the slave select for that port.
• PIN 8: RE0/RD/AN5: PORT E starts from pin 8 to pin 10 and this is also a bidirectional input
output port. It can be the analog input 5 or for parallel slave port it can act as a ‘read control’
pin which will be active low.
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EE1672 Embedded Systems (Integrated Lab) Unit II – Introduction to Embedded Processors
• PIN 9: RE1/WR/AN6: It can be the analog input 6. And for the parallel slave port it can act
as the ‘write control’ which will be active low.
• PIN 10: RE2/CS/AN7: It can be the analog input 7, or for the parallel slave port it can act as
the ‘control select’ which will also be active low just like read and write control pins.
• PIN 11 and 32: VDD: These two pins are the positive supply for the input/output and logic
pins. Both of them should be connected to 5V.
• PIN 12 and 31: VSS: These pins are the ground reference for input/output and logic pins.
They should be connected to 0 potential.
• PIN 13: OSC1/CLKIN: This is the oscillator input or the external clock input pin.
• PIN 14: OSC2/CLKOUT: This is the oscillator output pin. A crystal resonator is connected
between pin 13 and 14 to provide external clock to the microcontroller. ¼ of the frequency of
OSC1 is outputted by OSC2 in case of RC mode. This indicates the instruction cycle rate.
2. MEMORY ORGANIZATION:
PIC microcontroller memory module consists of mainly 3 types of memories:
PROGRAM MEMORY: It contains the written program after we burned it in
microcontroller. Program Counter executes commands stored in the program memory,
one after the other. Pic microcontroller can have 8K words x 14 bits of Flash program
memory that can be electrically erased and reprogrammed. Whenever we burn program
into the micro, we erase an old program and write a new one.
DATA MEMORY: It is a RAM type which is used to store the data temporarily in its
registers. The RAM memory is classified into banks. Each bank extends up to 7Fh (128
bytes). Number of banks may vary depending on the microcontroller. PIC16F84 has only
two banks. Banks contain Special Function Registers (SFR) and General Purpose
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Registers (GPR). The lower locations of each bank are reserved for the Special Function
Registers and upper locations are for General Purpose Registers.
Memory Organization
3. BUS:
BUS is used to transfer and receive the data from one peripheral to another. It is classified
into two types such as data bus and address.
Data Bus: It is used for only transfer or receive the data.
Address Bus: Address bus is used to transmit the memory address from the peripherals
to the CPU. I/O pins are used to interface the external peripherals; UART and USART
both are serial communication protocols which are used for interfacing serial devices like
GSM, GPS, Bluetooth, IR etc.
BUS
4. SERIAL COMMUNICATION:
The transfer of one bit of data at time consecutively over a communication channel is called
Serial Communication. There are three protocols of serial communication:
USART: It stands for Universal synchronous and Asynchronous Receiver and
Transmitter which provides a serial communication in two devices. In this protocol data
is transmitted and received bit by bit through a single wire according to the clock pulses.
To send and receive data serially the PIC microcontroller has two pins TXD and RXD.
SPI Protocol: SPI stands for Serial Peripheral Interface. It is used to send data between
PIC microcontrollers and other peripherals like sensors, shift registers and SD cards.
Three wire SPI communications is supported in PIC microcontroller between two devices
on a common clock source. SPI protocol has greater data handling capability than that of
the USART.
I2C Protocol: I2C stands for Inter Integrated Circuit, and this protocol is used to connect
low speed devices like microcontrollers, EEPROMS and A/D converters.
PIC microcontroller support two wire Interface or I2C communication between two
devices which can work as both Master and Slave device.
Serial Communication
5. INTERRUPTS:
There are 20 internal interrupts and three external interrupt sources in PIC microcontrollers
which are related with different peripherals like ADC, USART, Timers, and CCP etc.
6. I/O PORTS:
PIC16 series, it consists of five ports, such as Port A, Port B, Port C, Port D and Port E.
Port A: This port is 16-bit wide and can be used for both input and output. The status of
TRISA (Tradoc Intelligence Support Activity) register decided whether it is used as input
or output port.
Port B: It is an 8-bit port. This port also can be used as input and output. Moreover in
input mode four of its bits are variable according to the interrupt signals.
Port C: It is also an 8-bit port and can be used as both input and output port which is
determined by the status of the TRISC register.
Port D: This 8-bit port, unlike Port A, B and C is not an input/output port, but is used as
acts as a slave port for the connection to the microprocessor When in I/O mode Port D
all pins should have Schmitt Trigger buffers.
Port E: It is a 3-bit port which is used as the additional feature of the control signals to
the A/D converter.
7. CCP MODULE:
A CCP module works in the following three modes:
Capture Mode: In this mode time is captured when a signal is arrived, or we can say that,
when the CCP pin goes high it captures the value of the Timer1.
Compare Mode: It works same as an analog comparator, which means that when timer
1’s value reaches some reference value it will give an output signal.
PWM Mode: This mode provides a 10 bit resolution pulse and duty cycle that is
programmable.
8. TIMERS:
PIC 16F877A has three Timer Modules; Timer0, Timer1 and Timer2. These are registers
whose value increases up to 255 and then starts again from 0. Timers 0 and 1 are 8-bit timers
while Timer2 is a 16-bit timer. We can set when the timer will increment with the help of
Prescaler. It divides the oscillator clock before it will reach logic that increases timer status. For
example, a value of the Prescaler id of 32 will mean that the Timer will increment by one after
32 pulses. The timer increments till it reaches a value of 255 after which it triggers an interrupt
and initializes itself to zero again. This interrupt is called Timer Interrupt.
9. D/A CONVERTER:
There are no analog outputs in PIC Microcontroller. To get analog output we have to use
external Digital-to-Analog Converter (DAC). It can convert 8 bits of digital number from the
eight digital outputs of PIC microcontroller.
the lower 8 bits in ADRESL register and the upper bits in the ADRESH register. Reference
voltage of 5V is required for the operation of the converter.
addwf PORTD ; // Add content of PORTD to content of the W and store the result back
into PORTD
addwf PORTD, 0 ; // Add content of PORTD to content of the W and store the result into W
The instruction sets in PIC is developed by the basis of RISC structure. The instruction
sets can be classified into 5 separate categories (depends on the basis of type of operation). They
are
Data Transfer Group
Arithmetic and Logic Operations Group
Bit Operation Group Instructions
ii. MOVWF
MOVWF instruction is used to move the data (bits) from W register to flag register F (copy/move
the value from W register to F register).
Syntax: Label MOVWF f
Description: Content of W is copied into f register (flag register).
Operation: W to (f) (W register to Flag register)
Operand: 0 < f < 127
No. of words: 1
No. cycles: 1
Flags: Nil
iii. MOVF
MOVF command is used for copy/move the contents (bits) in the flag register to D register (Copy
f to d register).
D register (destination register) is a special register which can be switchable in its destination
according to its status. If the status of D register is ‘0’, the destination is W register and if the
status is ‘1’, the destination of D register became F register (flag)
Syntax: Label MOVF f, d
Description: Content of f is copied into destination.
If d = 0, the destination is W register
If d = 1, the destination is f register
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Operation: F to (D)
Operand: 0 < k < 127
No. of words: 1
No. cycles: 1
Flags: Z
iv. CLRW
CLRW is a clearing instruction that helps to reset the values of W register to ‘0’ (write ‘0’ in W
register).
Syntax: Label CLRW
Description: Zero is copied into W register. Z flag in status register is set to one.
Operation: 0 to (W)
Operand: nil
No. of words: 1
No. cycles: 1
Flags: Z
v. CLRF f
CLRF f Write ‘0’ in F register that helps to reset the current status to ‘0’
Syntax: Label CLRF f
Description: Zero is copied into f register
Z flag in status register is set to one
Operation: 0 to (f)
Operand: nil
No. of words: 1
No. cycles: 1
Flags: Z
vi. SWAPF
SWAPF used for swap (interchanging functions) functions which Swap the nibbles (4bits).The
destination of this function depends on the destination register status.
Syntax: Label SWAPF f, d
Description: Upper, Lower nibbles are exchanged
If d = 0, the destination is W register
If d = 1, the destination is f register
Operation: f (0:3) to d(4:7) and f(4:7) to d(0:3)
Operand: 0 < f < 127
i. ADDLW
“ADDLW” instruction is used for performing addition operation (adding a constant with
W register). By using this instruction, we can add two bits easily and the result value can be stored
in another register or memory location.
Syntax: Label ADDLW k
Description: Given constant is added with W reg.
Operation: (w) + k to w
Operand: 0 < k < 255
No. of words: 1
No. cycles: 1
Flags: C, DC, Z
ii. ADDWF
“ADDWF” is also used for performing the addition operation. This ADDWF instruction
adds the constant with W register.
Syntax: Label ADDWF f, d
Description: Add W reg. content with f register
Operation: (w) + (f) to w if d = 0 and (w) + (f) to f if d = 1
Operand: 0 < f < 127
No. of words: 1
No. cycles: 1
Flags: C, DC, Z
iii. SUBLW
“SUBLW” used for performing subtraction function which can be subtracting two values
and can be stored to another memory location. This instruction helps to Subtract W content from
given constant.
Syntax: Label SUBLW k
Description: W reg. content is subtracted from k
Operation: k – (w) to w
Operand: 0 < k < 255
No. of words: 1
No. cycles: 1
Flags: C, DC, Z
iv. SUBWF
SUBWF is used for performing subtraction operation. In SUBLW, this instruction Subtracts
W content from f register.
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v. ANDLW
ANDLW is a logical instruction which used for performing Logic AND. By using this
instruction helps AND the constant with W.
Syntax: Label ANDLW k
Description: Given constant is .and. with W reg.
Operation: (w) .and. k to w
Operand: 0 < k < 255
No. of words: 1
No. cycles: 1
Flags: Z
vi. IORLW
This command is used for performing logical OR operation. By using this instruction, it
will perform Logical OR operation with W register.
Syntax: Label IORLW k
Description: Given constant is .or. with W reg.
Operation: (w) .or. k to w
Operand: 0 < k < 255
No. of words: 1
No. cycles: 1
Flags: Z
vii. IORWF
Logic OR the W reg. with f
Syntax: Label IORWF f, d
Description: W reg. is .or. with f reg.
Operation: (w) .and. f to w, if d = 0 and (w) .and. f to f, if d = 1
Operand: 0 < f < 127
No. of words: 1
No. cycles: 1
Flags: Z
viii. XORLW
This command is used for performing logical XOR operation. By using this command, it
will perform logical XOR with Logic constant and W register.
Syntax: Label XORLW k
Description: Given constant is .XOR. with W reg.
Operation: (w) .xor. k to w
Operand: 0 < k < 255
No. of words: 1
No. cycles: 1
Flags: Z
ix. XORWF
This command used to perform Logic XOR the W reg. with f
Syntax: Label XORWF f, d
Description: W reg. is .xor. with f reg.
Operation: (w) .and. f to w, if d = 0 and (w) .and. f to f, if d = 1
Operand: 0 < f < 127
No. of words: 1
No. cycles: 1
Flags: Z
x. INCF
INCF command used for performing increment operations.(Increment f registers content)
Syntax: Label INCF f, d
Description: Increment the content of f register
Operation: (f) + 1 to w, if d = 0 and (f) + 1 to f, if d = 1
Operand: 0 < f < 127
No. of words: 1
No. cycles: 1
Flags: Z
xi. DECF
DECF command used for performing Decrement f register content
Syntax: Label DECF f, d
Description: Decrement the content of f register
Operation: (f) – 1 to w, if d = 0 and (f) – 1 to f, if d = 1
Operand: 0 < f < 127
No. of words: 1
No. cycles: 1
Flags: Z
xii. RLF
RLF command is used for performing rotate register content left through Carry
Syntax: Label RLF f, d
Description: Rotate f content left through Carry
Operation: Result to w, if d = 0 and Result to f, if d = 1
Operand: 0 < f < 127
No. of words: 1
No. cycles: 1
Flags: C
xiii. RRF
RRF command used for perform Rotate register content right through Carry
Syntax: Label RRF f, d
Description: Rotate f content right through Carry
Operation: Result to w, if d = 0 and Result to f, if d = 1
Operand: 0 < f < 127
No. of words: 1
No. cycles: 1
Flags: C
xiv. COMF
COMF command for perform Complement f registers content
Syntax: Label COMF f, d
Description: Complement the register content
Operation: Result to w, if d = 0 and Result to f, if d = 1
Operand: 0 < f < 127
No. of words: 1
No. cycles: 1
Flags: Z
i. BCF
BCF is a resetting command instruction used for performing reset operations for a specified
bit or specified register (simply called bit clearing flag or bit clearing command). Normally BCF
resets the specified bit in f registers content.
Syntax: Label BCF f, b
Description: Reset the specified bit of register f
Operation: Result to f
Operand: 0 < f < 127 and 0 < b < 7
No. of words: 1
No. cycles: 1
Flags: nil
ii. BSF
BSF is the inversing operation of BCF. This is also a bitwise operation. The BSF instruction
will set the specified bit in the f register (simply called Bit Set Flag or Bit Set command).
Syntax: Label BSF f, b
Description: Set the specified bit of register f
Operation: Result to f
Operand: 0 < f < 127 and 0 < b < 7
No. of words: 1
No. cycles: 1
Flags: nil
ii. BTFSS
BTFSS also program flow control instruction. This instruction Test the bit in f, skip if it is
one
Syntax: Label BTFSS f, b
Description: Test the specified bit of register f, skip the next instruction if it is one
Operation: Skip the next instruction if f (b) = 1
Operand: 0 < f < 127 and 0 < b < 7
No. of words: 1
No. cycles: 1 or 2 depends on bit value
Flags: nil
iii. INCFSZ
INCFSZ is a content increment command which Increment f content, skip if it is zero
Syntax: Label INCFSZ f, d
Description: Increment the f content, skip the next instruction if f is zero
Operation: Skip the next instruction if f = zero
Operand: (f) + 1 = w if d = 0 and (f) + 1 = f if d = 1
No. of words: 1
No. cycles: 1 or 2 depends on bit value
Flags: nil
iv. DECFSZ
DECFSZ command Decrement f content, skip if it is zero
Syntax: Label DECFSZ f, d
Description: Decrement the f content, skip the next instruction if f is zero
Operation: Skip the next instruction if f = zero
Operand: (f) – 1 = w if d = 0 and (f) – 1 = f if d = 1
No. of words: 1
No. cycles: 1 or 2 depends on bit value
Flags: nil
v. GOTO
GOTO instruction is used for Jump to specified address locations.
Syntax: Label GOTO Label
Description: Unconditional jump to specified label
Operation: k to PC(10:0), PCLATH(4:3) to PC(12:11)
Operand: 0 < k < 2048
No. of words: 1
No. cycles: 2
Flags: nil
vi. CALL
CALL command is used for Call the required sub-program or other values.
Syntax: Label CALL Label
Description: Unconditional call the label
Operation: (PC) + 1 to Top of stack, k to PC(10:0), PCLATH(4:3) to PC(12:11)
Operand: 0 < k < 2048
No. of words: 1
No. cycles: 2
Flags: nil
vii. RETURN
RETURN command is used for Return to main program from any other sub programs
Syntax: Label RETURN
Description: Unconditional return from subroutine
Operation: Top of stack to (PC)
Operand: nil
No. of words: 1
No. cycles: 2
Flags: nil
viii. RETLW
RETLW is also a return command. By using this command, Return to main program with
k in w reg.
Syntax: Label RETLW k
Description: Unconditional return from subroutine
Operation: Top of stack to (PC) and k loaded in w register
Operand: 0 < k < 255
No. of words: 1
No. cycles: 2
Flags: nil
ix. RETFIE
RETFIE used to return from interrupt routine
Syntax: Label RETFIE
Description: Unconditional return from subroutine
Operation: Top of stack to (PC) and Global Interrupt bit is enabled
Operand: nil
No. of words: 1
No. cycles: 2
Flags: nil
ii. CLRWDT
CLRWDT command used for Initialize watchdog time feature.
Syntax: Label CLRWDT
Description: Watchdog timer and pre-scalar is reset and TO and PD are set
Operation: 0 to WDT, 0 to pre-scalar and Status bits TO and PD are set
Operand: TO and PD
No. of words: 1
No. cycles: 1
Flags: nil
iii. SLEEP
SLEEP command used for initialize Standby mode.
Syntax: Label SLEEP
Description: Goes into low consumption, OSC is stopped, Watchdog timer and pre-scalar
is reset and TO and PD bits are set
Operation: 0 to WDT, 0 to pre-scalar and Status bits, TO is set and PD is reset
Operand: TO and PD
No. of words: 1
No. cycles: 1
Flags: nil
DIRECT ADDRESSING:
Direct Addressing is done through a 9-bit address. This address is obtained by connecting
7th bit of direct address. By using an instruction with two bits (RP1, RP0) from STATUS register.
This is shown on bellow Figure. Any access to SFR registers can be an example of direct
addressing.
INDIRECT ADDRESSING:
It does not take an address from an instruction. But it derives from IRP bit of STATUS and
FSR registers. Addressed location is accessed through INDF register. And INDF register in fact
holds the address indicated by the FSR. Indirect addressing is very convenient for manipulating
data arrays located in GPR registers. In this case, it is necessary to initialise FSR register with a
starting address of the array, and the rest of the data can be accessed by increment the FSR
register. Figure shows the indirect addressing concept.
Pin 2 (P0.22/AD1.7/CAP0.0/MAT0.0): It could be for used for four purposes. First one P0.21,
it could be used for input output data pin, second one AD1.7 , it could be used as analog to digital
converter with ADC 1, input 7. Third one CAP0.0, it could be used as a capture input for timer 0
and channel 0. Fourth one MAT 0.0, it could be used as match output for timer 0 and channel 0.
Pin 3 (RTC X1): Pin3 is used as input pin for RTC oscillator circuit.
Pin 4 (P1.19/TRACEPKT3): Pin 4 could be as GPIO pin as well as with 3 bit input output pin
for inner pull up.
Pin 5 (RTCX2): Pin 4 is used as output pin for RTC oscillator circuit.
Pin (6,18,25,42,50): These pins are used as references pins for grounding the microcontroller.
Pin7 (VDDA): This pin is used as voltage source pin with 3.3 Volts. These voltages could be
useful for on chip digital to analog converter and analog to digital converter.
Pin8 (P1.18/TRACEPKT2): This pin is used as GPIO pin and 2 bit input output pin for inner
pull up.
Pin9 (P0.25/AD0.4/AOUT): This pin is used as GPIO pin, as input 4 for AD0 and as output pin
for digital to analog converter.
Pin (10,11): Pin10 is used for D+ line bidirectional USB. Similarly the pin11 is used for D-line
bidirectional USB.
Pin12 (P1.7/TRACEPKT1): This pin is used as a GPIO pin and as a standard input/output port
for inner pull up.
The ARM cortex is a complicated microcontroller within the ARM family that has ARMv7
design. There are 3 subfamilies within the ARM cortex family:
ARM Cortex Ax-series for high-performance applications
ARM-Cortex Rx-series for real-time systems
ARM-Cortex Mx-series for microcontroller applications
The ARM Architecture
Arithmetic Logic Unit
Booth multiplier
Barrel shifter
Control unit
Register file
ARM Architecture
The ARM processor conjointly has other components like the Program status register,
which contains the processor flags (Z, S, V and C). The modes bits conjointly exist within the
program standing register, in addition to the interrupt and quick interrupt disable bits; Some
special registers: Some registers are used like the instruction, memory data read and write
registers and memory address register.
Priority encoder: The encoder is used in the multiple load and store instruction to point which
register within the register file to be loaded or kept.
Multiplexers: several multiplexers are accustomed to the management operation of the processor
buses. Because of the restricted project time, we tend to implement these components in a very
behavioral model. Each component is described with an entity. Every entity has its own
architecture, which can be optimized for certain necessities depending on its application. This
creates the design easier to construct and maintain.
Barrel Shifter
The barrel shifter features a 32-bit input to be shifted. This input is coming back from the
register file or it might be immediate data. The shifter has different control inputs coming back
from the instruction register. The Shift field within the instruction controls the operation of the
barrel shifter. This field indicates the kind of shift to be performed (logical left or right,
arithmetic right or rotate right). The quantity by which the register ought to be shifted is contained
in an immediate field within the instruction or it might be the lower 6 bits of a register within the
register file.
The shift_val input bus is 6-bits, permitting up to 32 bit shift. The shift type indicates the
needed shift sort of 00, 01, 10, 11 are corresponding to shift left, shift right, an arithmetic shift
right and rotate right, respectively. The barrel shifter is especially created with multiplexers.
Control Unit
For any microprocessor, control unit is the heart of the whole process and it is responsible
for the system operation, so the control unit design is the most important part within the whole
design. The control unit is sometimes a pure combinational circuit design. Here, the control unit
is implemented by easy state machine. The processor timing is additionally included within the
control unit. Signals from the control unit are connected to each component within the processor
to supervise its operation.
The ARM core operates in two states 32-bit state or THUMBS state.
ARM-Cortex Microcontroller Programming
Instruction Set
• Data processing
• Data transfer
• Flow control
The Condition Field
In ARM state, all instructions are conditionally executed according to the state of the
CPSR condition codes and the instruction’s condition field. This field (bits 31:28) determines the
circumstances under which an instruction is to be executed. If the state of the C, N, Z and V flags
fulfils the conditions encoded by the field, the instruction is executed, otherwise it is ignored.
There are sixteen possible conditions, each represented by a two-character suffix that can
be appended to the instruction’s mnemonic. For example, a Branch (B in assembly language)
becomes BEQ for "Branch if Equal", which means the Branch will only be taken if the Z flag is
set.
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DATA PROCESSING
The data processing instruction is only executed if the condition is true. The instruction
produces a result by performing a specified arithmetic or logical operation on one or two
operands. The first operand is always a register (Rn). The second operand may be a shifted
register (Rm) or a rotated 8 bit immediate value (Imm) according to the value of the I bit in the
instruction. The condition codes in the CPSR (Current Program Status Registers) may be
preserved or updated as a result of this instruction, according to the value of the S bit in the
instruction.
They are move, arithmetic, logical, comparison
and multiply instructions.
• Most data processing instructions can process one of
their operands using the barrel shifter.
• General rules:
– All operands are 32-bit, coming from registers or
literals.
– The result, if any, is 32-bit and placed in a register
(with the exception for long multiply which produces a
64-bit result).
– 3-address format.
DATA TRANSFER
The instruction is only executed if the condition is true. Block data transfer instructions
are used to load (LDM) or store (STM) any subset of the currently visible registers. They support
all possible stacking modes, maintaining full or empty stacks which can grow up or down
memory, and are very efficient instructions for saving or restoring context, or for moving large
blocks of data around main memory.
Three basic forms to move data between ARM registers and memory.
– Single register load and store instruction
• A byte, a 16-bit half word, a 32-bit word
– Multiple register load and store instruction
• To save or restore workspace registers for procedure entry and exit
• To copy blocks of data
– Single register swap instruction
• A value in a register to be exchanged with a value in memory
• To implement semaphores to ensure mutual exclusion on accesses
Setting up an embedded development environment using the Micro-C compiler and Keil
IDE:
Setting up an embedded development environment using the Micro-C compiler and Keil
IDE involves several steps, including the installation of necessary software components and
configurations. Below is a general guide to help you set up the development environment:
Additional Tips:
Ensure that you have the appropriate device support pack installed for your microcontroller.
Keil provides these packs for various microcontroller families, and you can download and
install them through the Pack Installer.
Refer to the specific documentation for your microcontroller and Keil version for any
platform-specific considerations or configurations.
• Use debugging features like stepping through code, inspecting variables, and monitoring
peripherals.
6. Flash Programming:
• Configure flash programming settings to specify the programming algorithm and
memory regions.
• Connect the debugger to the target hardware.
• Program the microcontroller with the compiled code:
• Click on Flash -> Download or use the appropriate programming command.
7. Verify Operation on Hardware:
• Power up the target hardware with the flashed code.
• Verify the correct execution of the application on the hardware.
• Use debugging features to troubleshoot and fix any issues encountered during runtime.
8. Optimization and Refinement:
• Fine-tune your code for performance and efficiency.
• Optimize critical sections of code.
• Refactor and improve code structure and readability.
9. Documentation:
• Document your code, including comments and explanations of key functions.
• Create a README file detailing the project, hardware setup, and any specific
instructions for other developers or users.
10. Version Control:
• Use a version control system (e.g., Git) to track changes in your project.
• Commit code changes with meaningful messages.
11. Release and Deployment:
• Package your embedded C application for deployment:
• Ensure that all necessary files (binary, configuration files, etc.) are ready.
• Create a release build if necessary, ensuring that optimizations are applied.
12. Testing in Different Environments:
• If applicable, test your embedded C application on various hardware configurations or
environments.
• Ensure compatibility with different microcontroller models and configurations.
13. Documentation and User Guides:
• Provide comprehensive documentation for your embedded C application.
• Include user guides, installation instructions, and troubleshooting tips.
14. Maintenance and Updates:
• Monitor your project for bug reports and user feedback.
• Address issues and release updates as needed.
15. Collaboration and Teamwork:
• If working in a team, collaborate through version control and communicate effectively.
• Share knowledge and best practices among team members.
Note: The specifics of the workflow may vary based on the project requirements, the
microcontroller architecture, and the features provided by the Keil µVision IDE.