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Boolean Logic Assignment

The assignment requires the student to replicate a given Boolean logic circuit diagram using Electronics Workbench and simplify it using a Logic Converter. The original Boolean expression involves five variables and needs to be simplified using Boolean algebra or a Karnaugh Map. The final output includes the simplified expression and a NAND-based gate level diagram, which the student will complete after the simplification process.

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19 views2 pages

Boolean Logic Assignment

The assignment requires the student to replicate a given Boolean logic circuit diagram using Electronics Workbench and simplify it using a Logic Converter. The original Boolean expression involves five variables and needs to be simplified using Boolean algebra or a Karnaugh Map. The final output includes the simplified expression and a NAND-based gate level diagram, which the student will complete after the simplification process.

Uploaded by

muneebahmaducp007
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as DOCX, PDF, TXT or read online on Scribd
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Boolean Logic Circuit

Assignment
Student Name: Ayesha Munir
Student ID: bc240427206

Question:
You are provided a circuit diagram, which is designed from a Boolean Expression having
five (05) variables. Your task is to draw the same circuit in Electronics Workbench and
then, using a Logic Converter, simplify the circuit and share the simplified Boolean
Expression along with NAND-based gate level diagram.

Answer:

 Original Boolean Expression:


F(A,B,C,D,E) = A'B'C'D'E' + A'B'C'DE + A'B'CD'E + A'BC'DE + AB'CDE + ABCD'E +
ABCDE

 Simplification:
Using Boolean algebra or a 5-variable Karnaugh Map (K-map), we simplify the
expression to its minimal form. (Simplification steps can be included here manually or
with screenshots from tools like Logic Friday).

Final Simplified Expression: (To be filled after simplification or conversion)


 NAND-based Logic Diagram:
Below is the NAND-only gate level design representing the simplified expression:

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