Lecture 10 (Memory Interfacing - Addressing Memory in Microcomputer System)
Lecture 10 (Memory Interfacing - Addressing Memory in Microcomputer System)
Microcomputer System
ROM
74138
ROM Decoder
PROBLEM: Let us design a microcomputer
with 32 KB ROM. Available ROM IC is 2732
with 4KB storage. Thus we will require
parallel operation of 8 ROMs.
ROM Decoder
ROM Decoder
RAM Decoder
Problem: Suppose that we want to add eight
2K x 8 RAMs to our previous design. We want
the first RAM to start at 8000 H (ROMs
occupied up-to 7FFF H)
RAM Decoding
A A A A A A A A A A A A A A A A
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Blo Start 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
ck
1 End 1 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1
Blo Start 1 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0
ck
2 End 1 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1
Blo Start 1 0 1 1 1 0 0 0 0 0 0 0 0 0 0 0
ck
8 End 1 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1
Problem
Two 2K x 8 RAM : 1C800 H - 1CFFF H
1D000 H – 1DFFF H
One 1K x 8 RAM: 1D000 H – 1D3FF H
Two 2K x 8 ROM: 0F800 H – 107FFH
Thank You