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Microprocessor(22415) S.Y.Diploma:Sem 4

Questio Marks Question Marks Question Mark

n
1(a) 2
1(e) 2 1 (a) 2 1(a) 2
2(b) 4
1(f) 2 1(g) 2
3(a) 4
2(c) 4 2(b) 4 4.(a) 4
1 8086 16-Bit 2(d) 4 3(a) 4 5.(a) 6
Microprocessor 3(a) 4 4.(a) 4
5.(a) 6 5.(a) 6
6.(a) 6
Total 30 Total 22 Total 20
1 (c) 2
The Art of Assembly 1(b) 2 2(C) 4 2(c) 4
2 Language 4.(c) 4 5.(b) 6 5.(b) 6
Programming
Total 6 Total 12 Total 10
1(b) 2 1(b) 2
1(c) 2 1(f) 2 1(g) 2
3 Instruction Set of 1(d) 2 2(d) 4 2(d) 4
8086 Microprocessor 2(a) 4 5.(c) 6 5.(c) 6
3(d) 4 6.(a) 6 6.(a) 6
4.(e) 4 6.(b) 6 6.(b) 6

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 5.(b) 6
6.(b) 6

Total 28 Total 26 Total 26

1(e) 2
3 (b) 4 3(b) 4 3(b) 4
3(c) 4 3(c) 4 3(d) 4
4 Assembly Language 4.(b) 4 4.(b) 4 1(e) 2
Programming 4.(d) 4 4.(c) 4 4.(b) 4
5.(c) 6 6.(c) 6 4.(c) 4
6.(c) 6
Total 22 Total 24 Total 24

1 (d 2 1© 2
1 (g) 2 2(a) 4 2(a) 4
5 Procedure and Macro 4.(a) 4 3(d) 4 3© 4
6.(c) 6 4.(d) 4 4.(d) 4
4.(e) 4 4.(e) 4
Total 12 Total 18 Total 18

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Exam Unit No Question no as per MSBTE paper Marks
Year and Name

Winter- Unit 1 Q.1 a State the functions of the following pins of 8086 microprocessor: 2
2024 (i) MN/MX (ii) READY 4
Q.2 b Explain concept pipelining in 8086. State the advantages of pipelining. (Any Two)
Q. 2 D Describe memory segmentation in 8086 and list its advantages. (Any Two).
4
Q Draw functional block diagram of 8086 microprocessor 4
Summer- Unit 1 Q.1 a List any four features of 8086 2
2024 Q.1 e Describe the model of assembly language programming. 2
Q.2 b Draw Flag register format of 8086 microprocessor and explain any two flag 4
Q.3a Describe the concept of pipelining in 8086.
Q.4 a Draw functional block diagram of 8086 microprocessor
4
Q.5 a Write the physical address generation process in 8086. 6
Calculate the physical address for given - (i) DS-73A2 Η SI-3216 H (ii) CS-7370 Η IP=561EH

Winter- Unit 1 Q.1 a State the use of MN/ MX and Test signal. 2
2023 Q.1 e Give any two advantages of pipelining in 8086. 2
Q.1 f Draw the format of flag register of 8O86 2
Q.2 C Write the function of following pins of 8086: 4

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 Q.2 d Draw and explain model of Assembly Language Programming 4
Q.3 a. Describe memory segmentation in 8086 and list its advantages 4
Q5 a Define Logical and Effective address. Describe how 20 bit Physical address isgenerated in 8086. 6
If CS = 34SAH and IP = 4214M, calculate the Physical Address.
6
Q6 a Draw the functional block diagram of 8086 with all labels.
Summer- Unit 1 Q.1 a State the functions of the following pins of 8086 Microprocessor : i) ALE ii) M/IO 2
2023 Q.1 g State the use of OF and AF flags in 8086. 2 M Ans Auxiliary Carry Flag (AF) 2
Q.2 b Explain the concept of memory segmentation in 8086 4
Q.3 aExplain the concept of pipelining in 8086 microprocessor with diagram. 4
Q4 a Differentiate between minimum mode and maximum of 8086 microprocessor. 4

Winter- Unit 1 Q.1 a State the function of the following pins of 8086 microprocessor. (i) ALE (ii) DT/𝐑̅ 2
2022 Q.2 b what is memory segmentation? Explain it with reference to 8086 microprocessor 4
Q.3 aDescribe register organization of 8086 microprocessor 4
Q4 a Draw functional block diagram of 8086 microprocessor 4
.
6
Q5 a Define logical and effective address. Describe physical address generation process in 8086
microprocessor. Calculate physical address by taking suitable DS, CS and IP.
Winter- Unit 2 Q. 1c List assembly language programming tools 2
Q. 2C Explain assembly language program development steps..
2024 4
Summer- Unit 2 Q .1 c State the function of assembler. 2
2024 Q.2C Explain any two assembler directives with suitable example 4
Q.5 b Demonstrate in detail the program development steps in assembly language programming
6

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Winter- Unit 2 1(b) List Assembly Language Programming tools. 2
2023 Q4 C Explain following assembler directives : 4
(i) DB
(ii) SEGMENT
(iii) DUP
(iv) EQU

Summer- Unit 2 1 c.List the program development steps for assembly language programming 2
2 c State the Assembler Directives used in 8086 and describe the function of any two
2023 4
Assembler directives: 1) DW 2) EQU 3) ASSUME 4) OFFSET 5) SEGMENT 6) EVEN
Winter- Unit 2 4
2022 2(c) Describe following assembler directives: (i) DB (i) EQU (ii) Segment (iv) Assume 6
Q5 b State the function of following assembly language programing tools
i) Assembler (ii) Linker (iii) Debugger
Winter- Unit 3 Q.1b What is role of XCHG instruction in assembly language program? 2
Q.1e Write algorithm to add two 8 bit BCD number
2024 Q1 g State the use of REP in string related instruction. W-24
2
Q. 2d What are the functions of CALL and RET instruction? Write syntax of CALL and RET 2
4
Summer- Unit 3 Q1 f List four machine control instruction 2
Q.1 g State use of DAA instruction in BCD addition.
2024 Q.2 d Indentify the addressing mode of the following instruction
2
i) MUL AL,BL ii) MOV DX,0040h iii) MOV BX,[SI] iv) MOV AX,[BX][SI] 4
Q.5C Write assembly language instructions of 8086 microprocessor to - (i) Add 100 H to contents of AX register. 4
(ii) Rotate the contents of AX towards left by 2 bits. (iii) Signed division of AX by BL.
Q.6 a Write the content of register BX after execution of instructions, MOV BX, 2050 H MOV CL, 05 Η SHL BX,
CL
Q.6 b Illustrate the use of any three branching instructions
Winter- Unit 3 Q.1 C Write any four-bit manipulation instructions of 8086. 2
2023 Q 1 d What is the use of AAM instruction with suitable example? 2
Q.2 a Describe the function of the following instructions: (i) DAA (ii) CMP (iii) ADC (iv) JNC
Q 3d Describe CALL and RET instructions with example.
4
Q4 e Explain any four addressing modes of 8086 4
4
6

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 Q5 b Select the instructions for each of the following :
(i) Multiply AL by 05H
(ii) Move 1234H in DS register
(iii) Add AX with BX
(iv) Signed Division of AX by BL
(v) Rotate the contents of AX towards left by 4 bits through carry
(vi) Load SP register with FF00H.
Q6 b Explain with example any three Shift and any three Rotate instructions.

Summer- Unit 3 Q1 b State the function of STC and CMC Instruction of 8086 2
2023 Q1 f State two examples of each, Immediate and based indexed Addressing modes. 2

Q2d Identify the Addressing Modes for the following instructions:

I. MOV CL, 34H 4
II. MOV BX, [4100H]
III. MOV DS, AX
IV. MOV AX, [SI+BX+04]
Q.5 CExplain with suitable example the Instruction given below : 6

Q6 a 6
Write an appropriate 8086 instruction to perform following operation :
(i) Rotate thc contents of BX Register towards right by 4 bits.
(ii) Rotate the contents of AX towards left by 2 bits.
(iii) Add 100 H to the contents of AX Register.
(iv) Transfer 1234 H to DX Register.
(v) Multiply AL by 08 H.
(vi) Signed division of BL and AL.
Q6 b Explain Addressing modes of 8086 with süitable example.

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Winter- Unit 3 Q 1b Write an assembly language instruction of 8086 microprocessor to 2
2022 i) Divide the content of AX register by 50H.
ii) Rotate the content of BX register by 4-bit towards left.
1g Differentiate between ROL and RCL 2
2d. What are the functions of CALL and RET instructions? Describe in brief.
Q5 c Describe different addressing modes of 8086 with one suitable example each. 4
Q6 a Describe different branching instructions used in 8086 microprocessor in brief. 6
Q6 b Explain the following instructions of 8086 : 6
(i) DAA (ii) ADC (iii) XCHG 6
Winter- Unit 4 3 b Write an ALP to count positive and negative numbers in array. 4
3 c Write an ALP to find length of string.
2024 4
Summer- Unit 4 Q 3b Write an ALP for 8086 to multiply two 16 bit signed numbers.
2024 Q 3C Write an ALP for 8086 to find largest number from an array of 10 numbers.
Q. 3D Using Macro write an ALP to solve P = X2 + Y2 , where X and Y are 8 bit Numbers.
Q . 4 b Write an ALP to sort 10 numbers in an array in descending order.
Q. 4C Write an ALP to check given 16 bit number is odd or even.
Q. 4D Write an ALP using procedure for performing the operation Z =(A + B) * (C + D)
Q .6 C Write an ALP to add the series of 5 numbers.
Winter- Unit 4 Q 3b Write an ALP to perform addition of two 16 bit BCD numbers, 4
2023 Q4 b Write an ALP to find length of string 4
Q4 d Write an ALP to count number of ‘1’ in 8 bit number 4
Q5 c Write an ALP for concatenation of two strings. Draw flow chart and assume suitable data. 6
Q4 b Write an ALP for sum of series of 05 number's. 4
Q3 c Write an ALP to find Largest number from array of 10 number's. 4
Summer- Unit 4
2023 Q.1 e Write an ALP to Add two 16-bit numbers. 2
3 b Write an alp to perform block transfer operation of 10 numbers 4
3C. Write an ALP to subtract two BCD number’s
4
Q6 c Write an ALP to transfer 10 bytes of data from one memory location to another, also draw the
6
flow chart of the same.
Winter- Unit 4
2022 Q 1e Write algorithm to find sum of a series of numbers. 2

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 Q.3b Write an assembly language program to add BCD numbers in an array of 10 numbers. Assume suitable 4
array. Store the result at the end of the array.
Q.3d Write an assembly language program for conversion of BCD to Hexe number 4
Q4 b Write an assembly language program to arrange the numbers in ascending order (assume
suitable data) 4
Q4 c Write an assembly language program to Count No. of I 's in a 16-bit number. 6
6 a Describe different branching instructions used in 8086 microprocessor in brief 6
Q.6 bExplain the following instructions of 8086: i) DAA (ii) ADC (ii) XCHG
Q6 c Draw flow chart and write assembly language program to reverse the word in string.
6
Winter- Unit 5 1 d State any two differences between FAR and NEAR procedure 2
2 .a Compare procedure and Macro based on (i) Length of code (ii) Calling method (iii) Generation of object code
2024 (iv) Passing parameter
4
3 d Write an ALP to solve p=x²+y² using macro. (x and y are 8 bit nos.)
Summer- Unit 5 Q.1 d Define Macro with Syntax 2
Q .4 e Explain re-entrant and recursive procedure with schematic diagram.
2024 Q.2 a Differentiate between Near and FAR procedure call (any four points).
4
Winter- Unit 5 Q.1 g Define procedure and write its syntax 2
2023 Q.2 b Explain Re-Entrant and Recursive Procedure with diagram. 4
Q4 a Differentiate between Procedure and Macro 4
Q6 c Write an ALP for Z = (P + Q) * (R + S) using MACRO. Draw flow chart of the same. 6
Summer- Unit 5 Q.1d Define MACRO with its syntax. 2
2023 Q 2 a Differentiate between NEAR and FAR CALLS 4
Q.3 d Compare procedure and macros (4 points)
4
Q4 d Describe re-entrant and Recursive procedure with diagram.
4
Q4 e Explain MACRO with suitable example. List four advantages of it.
4
Winter- Unit 5 Q.1 C List directives used for procedure 2
2022 Q.2a What do you mean by procedure? Explain re-centrant and re-entrant procedure. 4
Q.3C Write a procedure to find factorial of given number.
4
Q4 e Describe with suitable example how parameter is passed on the stack in 8086 4
assembly language procedure.

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Q State the functions of the following pins of 8086 microprocessor: W-24

(i) MN/MX
(ii) READ
i) MN/MX:
When MN/MX pin is high, it operates in MIN mode and when low, 8086 operates in MAX
mode. For a small system in which only one 8086 microprocessor is employed as a CPU,
the system operates in MIN mode (Uniprocessor). While if more than one 8086 operate in
a system then it is said to operate in MAX mode (Multiprocessor).
ii) Ready: UNIT 1 8086 16-BIT MICROPROCESSOR

Q. List any four features of 8086 (S-24) ) 2 Marks

1) It has a 16 bit data bus
2) 8086 has a 20 bit address lines can access up to.(220=1MBmemory locations).
3) It provides 14 16-bit registers.
AX,BX,CX,DX,CS,SS,DS,ES,BP,SP,SI,DI,IP & FLAG REGISTER.
4) It has multiplexed address and data bus AD0-AD15 and A16 –A19.

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5) It can prefetches up to 6 instruction bytes from memory and queues them in order to
speed up instruction execution.
6) Interrupts:-8086 has 256 vectored interrupts.
7) Provides separate instructions for string manipulation.
8) Operating clock frequencies 5MHz, 8MHz, 10MHz.
9) It requires +5V power supply.
Q Describe the model of assembly language programming. 2 Marks

In the programming model there are – 4 General Purpose registers(Data Registers)

4 Segment registers
2 Pointer registers
2 Index registers
1 Instruction Pointer register
1 Flag register
Q. State the use of MN/ MX and Test signal. (W-23) 2 Marks
MN/MX: - Minimum/Maximum: - This pin signal indicates what mode the processor will operate in. MN/MX = 1 = 8086 operates in minimum
mode. In this mode the 8086 is configured to support small single processor system using a few devices that the system bus. MN/MX = 0 =
8086 is configured to support multiprocessor system.
Test: - It is an input pin and is only used by the wait instruction. The 8086 enter a wait state after execution of the wait instruction until a low is
seen on the test pin. If the TEST pin is Low, execution continues otherwise the processor waits in an "idle" state. This input is synchronized
internally during each clock cycle on the leading edge of CLK

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Q. Give any two advantages of pipelining in 8086. (W-23) 2 Marks
1. Increased Instruction Throughput:
2. Improved Efficiency of the Execution Unit (EU)

Q. Draw the format of flag register of 8O86. . (W-23) 2 Marks , (S-24) 4M

C-Carry Flag : It is set when carry/borrow is generated out of MSB of result. (i.e D7 bit
for 8- bit operation, D15 bit for a 16 bit operation).
P-Parity Flag This flag is set to 1 if the result contains even number of 1’s otherwise it is
reset.
AC-Auxiliary Carry Flag This is set if a carry is generated out of the lower nibble, (i.e.
From D3 to D4 bit)to the higher nibble
Z-Zero Flag This flag is set if the result is zero after performing ALU operations.

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Otherwise it is reset.
S-Sign Flag This flag is set if the MSB of the result is equal to 1 after performing ALU
operation, otherwise it is reset.
O-Overflow Flag This flag is set if an overflow occurs, i.e. if the result of a signed
operation is large enough to be accommodated in destination register.
Control Flags T-Trap Flag If this flag is set, the processor enters the single step execution
mode
I-Interrupt Flag it is used to mask (disable) or unmask(enable)the INTR interrupt.
D-Direction flag is used to auto increment or auto decrement string
When set ,string will be auto decremented
When reset, string will be auto incremented
Q Write the function of following pins of 8086: (W-23) 4 Marks

(i) Ready: - This is an acknowledgment signal from the slower I/O devices or memory. When high, it indicates that the device is ready
to transfer data, else the microprocessor is in the wait state.
(ii) ALE:- Address Latch Enable. ALE is provided by the microprocessor to latch the address into the 8282 or 8283 address latch. It is an
active high (1) pulse during T1 of any bus cycle. ALE signal is never floated, is always integer. –
(iii) TEST’ :This is an acknowledgment signal from the slower I/O devices or memory. When high, it indicates that the device is ready to
transfer data, else the microprocessor is in the wait state.
(iv) DEN : Data enable. This pin is provided as an output enable for the 8286/8287 in a minimum system which uses transceiver. DEN is
active low (0) during each memory and input-output access and for INTA cycles.
Q. Draw and explain model of Assembly Language Programming : (W-23) 4 Marks

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In the programming model there are
- 4 General Purpose registers(Data Registers)
- 4 Segment registers
- 2 Pointer registers
- 2 Index registers
- 1 Instruction Pointer register
- 1 Flag register
General purpose registers:
AX Register (Accumulator): This is accumulator register. It gets used in arithmetic, logic
and data transfer instructions. In manipulation and division, one of the numbers involved
must be in AX or AL.
BX Register (Base Register): This is base register. BX register is an address register. It
usually contain a data pointer used for based, based indexed or register indirect
addressing.
CX Register (Counter register): This is Count register. This serves as a loop counter.
Program loop constructions are facilitated by it. Count register can also be used as a
counter in string manipulation and shift/rotate instruction.
DX Register (Data Register): This is data register. Data register can be used as a port
number in I/O operations. It is also used in multiplication and division
Segment Registers:
There are four segment registers in Intel 8086:
1. Code Segment Register (CS),
2. Data Segment Register (DS),
3. Stack Segment Register (SS),
4. Extra Segment Register (ES).
A segment register points to the starting address of a memory segment. Maximum
capacity of a segment may be up to 64 KB.
Code segment Register (CS):- It is a 16-bit register containing the starting address of 64
KB segment. The processor uses CS segment for all accesses to instructions referenced
by instruction pointer (IP) register.

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Stack segment Register (SS):- It is a 16-bit register containing address of 64KB
segment with program stack. By default, the processor assumes that all data referenced
by the stack pointer (SP) and base pointer (BP) registers is located in the stack segment.
SS register can be changed directly using POP instruction.
Data segment Register (DS):- It is a 16-bit register containing address of 64KB segment
with program data. By default, the processor assumes that all data referenced by general
registers (AX, BX, CX, DX) and index register (SI, DI) is located in the data segment.
Extra segment Register (ES):- It is a 16-bit register containing address of 64KB
segment, usually with program data. By default, the processor assumes that the DI
register references the ES segment in string manipulation instructions. It is possible to
change default segments used by general and index registers by prefixing instructions
with a CS, SS,DS or ES prefix.
Pointer Registers:
SP Register (Stack Pointer): This is stack pointer register pointing to program stack. It
is used in conjunction with SS for accessing the stack segment.
BP Register (Base Pointer): This is base pointer register pointing to data in stack
segment. Unlike SP, we can use BP to access data in the other segments.
Index Registers:
SI Register (Source Index): This is used to point to memory locations in the data
segment addressed by DS. By incrementing the contents of SI one can easily access
consecutive memory locations.

Q. Describe memory segmentation in 8086 and list its advantages W-23 ,S-23,W-22 W-24
Segmentation is the process in which the main memory of the computer is logically
divided into different segments and each segment has its own base address. It is basically
used to enhance the speed of execution of the computer system, so that the processor is
able to fetch and execute the data from the memory easily and fast.
Need for Segmentation –
The Bus Interface Unit (BIU) contains four 16 bit special purpose registers (mentioned
below) called as Segment Registers.

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• Code segment register (CS): is used for addressing memory location in the
code segment of the memory, where the executable program is stored.
• Data segment register (DS): points to the data segment of the memory
where the data is stored.
• Extra Segment Register (ES): also refers to a segment in the memory
which is another data segment in the memory.
• Stack Segment Register (SS): is used for addressing stack segment of the
memory. The stack segment is that segment of memory which is used to
store stack data.
Advantages of the Segmentation The main advantages of segmentation are as follows:
• It provides a powerful memory management mechanism.
• Data related or stack related operations can be performed in different
segments.
• Code related operation can be done in separate code segments.
• It allows to processes to easily share data.
• It allows to extend the address ability of the processor, i.e. segmentation
allows the use of 16 bit registers to give an addressing capability of 1
Megabytes. Without segmentation, it would require 20 bit registers.
• It is possible to enhance the memory size of code data or stack segments
beyond 64 KB by allotting more than one segment for each area

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Q. Define Logical and Effective address. Describe how 20 bit Physical address isgenerated in 8086. If CS = 345AH and IP = 4214M, calculate
the Physical Address. [W’23] [S’23] [W’22] 9(S-24) 4 Marks
Ans.
Logical Address: A logical address is the address at which an item (memory cell, storage element) appears to reside from the perspective of an
executing application program. A logical address may be different from the physical address due to the operation of an address translator or
mapping function.

Effective Address or Offset Address: The offset for a memory operand is called the operand's effective address or EA. It is an unassigned 16 bit
number that expresses the operand's distance in bytes from the beginning of the segment in which it resides. In 8086 we have base registers
and index registers.
Generation of 20 bit physical address in 8086:-
1. Segment registers carry 16 bit data, which is also known as base address.
2. BIU appends four 0 bits to LSB of the base address. This address becomes 20-bit address.
3. Any base/pointer or index register carries 16 bit offset.
4. Offset address is added into 20-bit base address which finally forms 20 bit physical address of memory location

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DS=345AH and SI=13DCH
Physical adress = DS*10H + SI
= 345AH * 10H + 13DCH
= 345A0+13DC
= 3597CH
CS=2135H and IP=3478H
Physical adress = CS *10H + IP
= 2135H * 10H + 3478H
= 21350+3478
= 24828H
1. DS = 73A2 H and SI = 3216 H
Appending 4 zeros to the DS register
Physical Address = 73A20 + 3216 = 76C36 H
2. CS = 7370 H and IP = 561E H
Appending 4 zeros to the CS register
Physical Address = 73700 + 561E = 78D1E H
Q. Draw the functional block diagram of 8086 with all labels. [W’23] [W’22] [S-22] 6M (s-24) (W-24 ) 4M
Ans.

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Q Explain the concept of pipelining in 8086 microprocessor with diagram. State the advantages of pipelining. (s-23) 4 marks (S-24) W-24 4M
• In 8086, pipelining is the technique of overlapping instruction fetch and execution mechanism.
• To speed up program execution, the BIU fetches as many as six instruction bytes ahead of time from memory. The size of instruction prefetching
queue in 8086 is 6 bytes.
• While executing one instruction other instruction can be fetched. Thus it avoids the waiting time for execution unit to receive other instruction.
• BIU stores the fetched instructions in a 6 level deep FIFO. The BIU can be fetching instructions bytes while the EU is decoding an instruction or
executing an instruction which does not require use of the buses
• When the EU is ready for its next instruction, it simply reads the instruction from
the queue in the BIU
• This is much faster than sending out an address to the system memory and waiting
for memory to send back the next instruction byte or bytes.

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• This improves overall speed of the processor
Advantages of Pipelining
• Instruction throughput increases.
• Increase in the number of pipeline stages increases the number of instructions
executed simultaneously.
• Faster ALU can be designed when pipelining is used.
• Pipelined CPU’s works at higher clock frequencies than the RAM.
• Pipelining increases the overall performance of the CPU.
Q. Differentiate between minimum mode and maximum of 8086 microprocessor. [S’23] 4Marks
Ans.
Feature Maximum Mode Minimum Mode
Bus Control 8086 acts as bus controller and manages the gadget bus. 8086 does not act as a bus controller and relies on an
external bus controller.
Bus Controller Requires an external bus controller (e.G.8288) for bus arbitration Requires an external bus controller (e.G., 8284) for bus
and manipulate sign generation. manage signal era and coordination.
Address Lines Utilizes all 20 address traces for extended reminiscence Utilizes handiest sixteen cope with traces for limited
addressing. reminiscence addressing.
Data Lines Uses all 16 records strains for statistics switch. Uses the handiest 16 data traces for facts switch.
uProcessor Supports a couple of processors for multiprocessor structures. Designed for unmarried-processor systems.
System Control Full control over the device bus and gadgets linked to it. Share management of the device bus with other
gadgets.
System Complexity More complicated device design because of bus manipulation Simple gadget layout as bus manager is treated by
obligations and support chips. means of an external bus controller.
Memory and I/O Can get right of entry to a larger memory space and Limited reminiscence addressing and I/O options.
accommodate extra good sized I/O abilities.
System Cost Generally higher gadget value because of extra support chips. Lower machine fee due to reduced complexity and less
aid chips.
Typical Use Suitable for larger systems with more than one processor and Preferred for simpler systems with an unmarried
sizable memory/I/O requirements. processor and restricted resource desires.

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Q. State the functions of the following pins of 8086 Microprocessor : i) ALE ii) M/IO S-23 2 Marks
ALE - It stands for address enable latch and is available at pin 25. A positive pulse is generated each time the processor begins any operation.
This signal indicates the availability of a valid address on the address/data lines.
M/IO - This signal is used to distinguish between memory and I/O operations. When it is high, it indicates I/O operation and when it is low
indicating the memory operation. It is available at pin 28.

QState the use of OF and AF flags in 8086 S-23 2M

.
Auxiliary Carry Flag (AF): This flag is used in BCD (Binary-coded Decimal) operations.This flag is set to 1 if there is a CARRY from the lower nibble
or BORROW for the lower nibble in binary representation; else it is set to zero.
Overflow Flag (OF): This flag will be set (1) if the result of a signed operation is too large to fit in the number of bits available to represent it,
otherwise reset (0)
Q. Describe register organization of 8086 microprocessor.

Register Organization of 8086

1. AX (Accumulator) - Accumulator register consists of two 8-bit registers AL and AH, whichcan be combined together and used as a 16- bit
register AX. AL in this case contains thelow-order byte of the word, and AH contains the high-order byte. Accumulator can beused for I/O
operations, rotate and string manipulation.
2. BX –This register is mainly used as a base register. It holds the starting baselocation of a memory region within a data segment. It is used offset
storage forforming physical address in case of certain addressing mode.
3. CX – It is used as default counter or count register in case of string and loop instructions..
4. DX – Data register can be used as a port number in I/O operations and implicit operand or destination in case of few instructions. In integer
32-bit multiply and divid instruction the DX register contains high-order word of the initial or resulting number.
5. CS – Code Segment – holds base address for all executable instructions in a program
Segment registers

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To complete 1Mbyte memory is divided into 16 logical segments. The complete1Mbyte memory segmentation is as shown in above figure. Each
segment contains 64Kbyte of memory. There are four segment registers.Code segment (CS) is a 16-bit register containing address of 64 KB
segment withprocessor instructions. The processor uses CS segment for all accesses to instructions
referenced by instruction pointer (IP) register.
Stack segment (SS) is a 16-bit register containing address of 64KB segment withprogram stack. By default, the processor assumes that all data
referenced by the stack
pointer (SP) and base pointer (BP) registers is located in the stack segment.
Data segment (DS) is a 16-bit register containing address of 64KB segment with
program data. By default, the processor assumes that all data referenced by general
registers (AX, BX, CX, DX) and index register (SI, DI) is located in the data segment.
DS register can be changed directly using POP and LDS instructions. It points to the data
segment memory where the data is resided.
Extra segment (ES) is a 16-bit register containing address of 64KB segment, usually
with program data.

UNIT 2 ART OF ASSEMBLY LANGUAGE PROGRAMMING

Q List Assembly Language Programming tools. W-23 W-24 2Marks
1. Editors 2. Assembler 3. Linker 4. Debugger.
Q. Explain following assembler directives :
(i) DB
(ii) SEGMENT
(iii) DUP
(iv) EQU
[W’23] [W-22]

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Ans: 1. DB (Defined Byte) – The DB directive is used to declare a BYTE -2-BYTE variable. A BYTE is made up of 8 bits.
Declaration example: Byte1 DB 10H
Byte2 DB FFH
DW(Defined Word) – The DW directive is used to declare a WORD type variable – A WORD occupies 16 bits or (2 BYTE).
Declaration examples: Word DW 1234h

SEGMENT - The SEGMENT directive is used to indicate the start of a logical segment. Preceding the SEGMENT directive is the name you
want to give the segment.
Declaration example: The statement CODE SEGMENT indicates to the assembler the start of a logical segment called CODE. The SEGMENT
and ENDS directive are used to “bracket” a logical segment containing code of data
DUP (Duplicate) - The DUP directive tells the assembler to duplicate an expression a given number of times.
Declaration example: 4 DUP(2) is equivalent to 2, 2, 2, 2.
EQU (EQUATE) - EQU is used to give a name to some value or symbol. Each time the assembler finds the given name in the program, it
replaces the name with the value or symbol you equated with that name.
Declaration example: Data SEGMENT
Num1 EQU 50H
Num2 EQU 66H
Data ENDS
Numeric value 50H and 66H are assigned to Num1 and Num2

END (End of Program) - The END directive marks the end of an ALP. The statement after the directive END will be ignored by the
assembler.

Q. State the function of following assembly language programing tools

i) Assembler (ii) Linker (iii) Debugger
Ans.

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(i) Assembler - An assembler is a program that converts source code program written in assembly language into object files in machine
language
Example - MASM, TASM, NASM, GNU Assembler

(ii) Linker - A linker is a program that combines object file created by the assembler with other object files and link libraries and
produces a single executable program
Example - TLINK for TASM, LINK.EXE and LINK32.EXE for MASM

(iii) Debugger - A debugger is a program that allows you to trace the execution of a program and examine the content of registers and
memory
Example - Turbo Debugger for TASM, CodeView for MASM
Q.List the program development steps for assembly language programming. S-23 2 Marks S-24 4M
1. Defining the problem
2. Algorithm
3. Flowchart
4. Initialization checklist
5. Choosing instructions
6. Converting algorithms to assembly language program

Q Explain assembly language program development steps. W-24 4M

Program Development steps:

Define the Problem: Understand the task you want to accomplish.
o Plan the Solution: Develop an algorithm and determine how to use the processor’s
resources.
o Write the Source Code: Implement the solution using assembly language instructions.

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o Assemble the Code: Convert assembly source code into object code using an assembler.
o Link the Object File: Combine object files into an executable using a linker.
o Debug the Program: Test and fix errors using a debugger.
o Optimize the Code: Improve efficiency by reducing instructions and memory usage.
o Final Testing: Ensure the program works for all input scenarios.
o Documentation: Comment the code and provide user documentation.
Q. State the Assembler Directives used in 8086 and describe the function of any two S-23 4 Marks S-24 4M

Assembler directives:
1) DW
2) EQU
3) ASSUME
4) OFFSET
5) SEGMENT
6) EVEN
Function of any two:
1) DW (DEFINE WORD):
The DW directive is used to tell the assembler to define a variable of type word or to
reserve storage locations of type word in memory. The statement MULTIPLIER DW
437AH, for example, declares a variable of type word named MULTIPLIER, and
initialized with the value 437AH when the program is loaded into memory to be run.
2) EQU (EQUATE):
EQU is used to give a name to some value or symbol. Each time the assembler finds the
given name in the program, it replaces the name with the value or symbol you equated
with that name.
Example:
Data SEGMENT
Num1 EQU 50H
Num2 EQU 66H

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 Data ENDS
Numeric value 50H and 66H are assigned to Num1 and Num

Q State the function of assembler.

Assembler: The assembler is used to convert assembly language written by a user or a program into a machine recognizable format Example - MASM,
TASM, NASM, GNU Assembler

Q Explain any two assembler directives with suitable example S-24

DB (Defined Byte) – The DB directive is used to declare a BYTE -2-BYTE variable. A
BYTE is made up of 8 bits.
Declaration example:
Byte1 DB 10H
Byte2 DB FFH
DW(Defined Word) – The DW directive is used to declare a WORD type variable – A
WORD occupies 16 bits or (2 BYTE).
Declaration examples: Word DW 1234h
SEGMENT - The SEGMENT directive is used to indicate the start of a logical segment.
Preceding the SEGMENT directive is the name you want to give the segment.
Declaration example: The statement CODE SEGMENT indicates to the assembler the
start of a logical segment called CODE. The SEGMENT and ENDS directive are used to
“bracket” a logical segment containing code or data
DUP (Duplicate) - This directive can be used to generate multiple bytes or words with
known as well as un-initialized values.
eg TABLE DW 100 DUP(0) ; Create array of 100 words all contains data 0
EQU (EQUATE) - EQU is used to give a name to some value or symbol. Each time the
assembler finds the given name in the program, it replaces the name with the value or
symbol you equated with that name.
Declaration example:

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 Data SEGMENT
Num1 EQU 50H
Num2 EQU 66H
Data ENDS
Numeric value 50H and 66H are assigned to Num1 and Num2
ASSUME: Assume directive is used to tell Assembler the name of the logical segment it
should use for the specified segment.

UNIT 3 Instruction Set of 8086 Microprocessor

Q.1 e Write algorithm to add two 8 bit BCD number. W-24
Algorithm:
1. Load the two BCD numbers into registers (e.g., AL and BL).
2. Add the numbers.
3. Check for a BCD correction (if the sum exceeds the range of a valid BCD digit).
4. If a correction is needed, adjust the result using the DAA (Decimal Adjust AL)
instruction.
5. Store the result.
Q.1b What is role of XCHG instruction in assembly language program? W-24
The XCHG instruction exchanges the content of a register with the content of another
register or with the content of memory location(s). It cannot directly exchange the content
of two memory locations. The source and destination must both be of the same type (bytes
or words). The segment registers cannot be used in this instruction. This instruction does
not affect any flag.
➢ XCHG AX, DX Exchange word in AX with word in DX
➢ XCHG BL, CH Exchange byte in BL with byte in CH
QState the use of REP in string related instruction. W-24
Use the rep (repeat while equal), repnz (repeat while nonzero) or repz (repeat while zero)

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prefixes in conjunction with string operations. Each prefix causes the associated string
instruction to repeat until the count register (CX) or the zero flag (ZF) matches a tested
condition.
Example
Repeat while equal: Copy the 8-bit byte from the DS:[(E)SI] to the ES:[(E)DI]
register.
rep; movsb
Q List four machine control instruction S-24 2M
STC − Used to set carry flag CF to 1.
CLC − Used to clear/reset carry flag CF to 0.
CMC − Used to put complement at the state of carry flag CF.
STD − Used to set the direction flag DF to 1.

CLD − Used to clear/reset the direction flag DF to 0

Q Identify the addressing mode of the following instruction (S-24)
i) MUL AL,BL ii) MOV DX,0040h
iii) MOV BX,[SI] iv) MOV AX,[BX][SI]
Ans i. MUL AL,BL - register addressing mode
ii. MOV DX,0040h- Immediate addressing mode
iii. MOV BX,[SI]-index addressing mode
iv. MOV AX,[BX][SI]- Base index addressing mode
QWrite assembly language instructions of 8086 microprocessor to - (S-24)
(i) Add 100 H to contents of AX register.
(ii) Rotate the contents of AX towards left by 2 bits.
(iii) Signed division of AX by BL.

1. MOV AX, 100H moves the value 100H into the AX register. ADD AX, 100H adds the value 100H to the contents of the AX register
After executing these instructions, the AX register will contain the result of the
addition.
2. MOV CL, 2 moves the value 2 into the CL register, specifying that we want to

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rotate the contents of AX by 2 bits.
ROL AX, CL rotates the contents of the AX register leftwards by the number of
bits specified in CL.
After executing these instructions, the contents of the AX register will be rotated
leftwards by 2 bits.
3. MOV BL, divisor ; Load the divisor value into the BL register.
IDIV BL ; Perform signed division of AX by BL
QWrite the content of register BX after execution of instructions, (s-24)
MOV BX, 2050 H
MOV CL, 05 Η
SHL BX, CL

Let's break down the instructions and determine the content of register BX after executing
them:
1. `MOV BX, 2050H`: This instruction moves the value 2050H (which is 0000 0010 0000
0100 in binary) into the BX register.
2. `MOV CL, 05H`: This instruction moves the value 05H (which is 0000 0101 in binary)
into the CL register.
3. `SHL BX, CL`: This instruction shifts the contents of the BX register to the left by the
number of bits specified in the CL register. In this case, CL contains 5, so the contents of
BX will be shifted left by 5 bits.
After shifting left by 5 bits:
- The two leftmost bits (which are 00) will be shifted out and discarded.
- The rightmost 16 - 5 = 11 bits will be filled with zeros.
So, after executing these instructions, the content of register BX will be: 0000 0000 0000
0000, which is equivalent to 0H in hexadecimal
Q. Write any four-bit manipulation instructions of 8086 w-23 2 Marks

NOT − Used to invert each bit of a byte or word.

AND − Used for adding each bit in a byte/word with the corresponding bit in another
byte/word.

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OR − Used to multiply each bit in a byte/word with the corresponding bit in another
byte/word.
XOR − Used to perform Exclusive-OR operation over each bit in a byte/word with the
corresponding bit in another byte/word.
Q What is the use of AAM instruction with suitable example [w-23] 2Marks
The AAM instruction, short for "ASCII Adjust AX After Multiply," is an assembly language instruction in the x86 architecture used for converting
the binary result of multiplying two unpacked Binary-Coded Decimal (BCD) values back into a valid unpacked BCD format.
Q Describe the function of the following instructions: (i) DAA (ii) CMP (iii) ADC (iv) JNC w-23 4 Marks S-24 2M
1) DAA: Decimal adjust after addition S-24 2M

This instruction is used to make sure the result of adding two packed BCD numbers is adjusted to be a legal BCD number. The result of the
addition must be in AL for DAA to work correctly. If the lower nibble in AL after an addition is greater than 9 or AF was set by the addition, then
the DAA instruction will add 6 to the lower nibble in AL. If the result in the upper nibble of AL in now greater than 9 or if the carry flag was set
by the addition or correction, then the DAA instruction will add 60H to AL.Let AL = 59 BCD, and BL = 35 BCD
ADD AL, BL AL = 8EH; lower nibble > 9, add 06H to AL
DAA AL = 94 BCD, CF = 0
Let AL = 88 BCD, and BL = 49 BCD
ADD AL, BL AL = D1H; AF = 1, add 06H to AL
DAA AL = D7H; upper nibble > 9, add 60H to AL
AL = 37 BCD, CF = 1
2) CMP: Compare
This instruction compares the source operand, which may be a register or an immediate
data or a memory location, with a destination operand that may be a register or a memory
location.
Example: -
CMP BX, 0100H
CMP AX, 0100H
CMP [5000H], 0100H
CMP BX, [SI]

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CMP BX, CX
3) ADC: Add with Carry
ADC Destination, Source
This instruction performs the same operation as ADD instruction, but adds the carry flag
to the result.
Example: -
ADC 0100H
ADC AX, BX
ADC AX, [SI]
ADC AX, [5000]
ADC [5000], 0100H
4) JNC: - Stands for 'Jump if Not Carry
Q. Describe CALL and RET instructions with example. W-22,W-23 W-24b4M
1. CALL : Unconditional Call
The CALL instruction is used to transfer execution to a subprogram or procedure bystoring return address on stack There are two types of calls-
NEAR (Inter-segment) andFAR(Intra-segment call). Near call refers to a procedure call which is in the same codesegment as the call instruction
and far call refers to a procedure call which is in differentcode segment from that ofthe call instruction.Syntax: CALL procedure_name
2. RET: Return from the Procedure.At the end of the procedure, the RET instruction must be executed. When it is executed,the previously stored
content of IP and CS along with Flags are retrieved into the CS, IPand Flag registers from the stack and execution of the main program
continuesfurther.Syntax :RET
Q. Explain any four addressing modes of 8086 [W’23] [S’23] [W’22] 4 marks
Ans.
1. Immediate addressing mode:
An instruction in which 8-bit or 16-bit operand (data) is specified in the
instruction, then the addressing mode of such instruction is known as
Immediate addressing mode.
Example:
MOV AX,67D3H

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2. Register addressing mode
An instruction in which an operand (data) is specified in general purpose
registers, then the addressing mode is known as register addressing mode.
Example:
MOV AX,CX
3. Direct addressing mode
An instruction in which 16 bit effective address of an operand is specified in
the instruction, then the addressing mode of such instruction is known as
direct addressing mode.
Example:
MOV CL,[2000H]

4. Register Indirect addressing mode

An instruction in which address of an operand is specified in pointer register
or in index register or in BX, then the addressing mode is known as register
indirect addressing mode.
Example:
MOV AX, [BX]

Q. Select the instructions for each of the following :

(i) Multiply AL by 05H
(ii) Move 1234H in DS register
(iii) Add AX with BX
(iv) Signed Division of AX by BL

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 (v) Rotate the contents of AX towards left by 4 bits through carry
(vi) Load SP register with FF00H.
[W’23] 6marks

Ans.
(i) MUL AL, 05H
(ii) MOV DS, 1234H
(iii) ADD AX, BX
(iv) IDIV BL
(v) ROL AX, 4
(vi) MOV SP, FF00H

Q. Explain with example any three Shift and any three Rotate instructions. [W’23] 6marks
Ans.
Shift instructions are SHL, SHR, and SAR
SHL – SHL stands for shift logic left.
This instruction LEFT-Shifts the bits of destination.
MSB shifted into the CARRY. LSB gets a 0.
Bits are shifted 'count' number of times.
If count = 1, it is directly specified in the instruction.
If count > 1. it has to be given in CL Register.
Destination: Register, Memory Location.
Example : SHL BL, 1
It suggests that left-shift BL bits once
Assume that,
Before operation,
BL = 00110011 and CF = 1

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After Operation,

SHR – SHR stands for shift logic right.

This instruction RIGHT-Shifts the bits of destination.
LSB shifted into the CARRY. MSB gets a 0. Therefor sign bit is zero
Bits are shifted 'count' number of times.
If count = 1, it is directly specified in the instruction.
If count > 1. it has to be given in CL Register.
Destination: Register, Memory Location.
Example : SHR BL, 1
It suggests that right-shift BL bits once
Assume that,
Before operation,
BL = 00110011 and CF = 1

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After Operation,

SAR – SAR stands for shift arithmetic right.

It does the same operation as SHR except it fills the bit portion shifted right from the MSB with a copy of old MSB
Example : SAR BL, 1
It suggests that right-shift BL bits once
Assume that,
Before operation,
BL = 10110011 and CF = 1

After Operation,

Rotate instructions are ROL, ROR, RCL, RCR

ROL- This instruction stands for Rotate Left without carry flag. The contents of the operand (register or memory location) are rotated left bit-
wise by some number of positions depending on the count value.

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During this rotation, the most significant bit (MSB) is moved into the carry flag (CF) as well as into the least significant bit (LSB) position.

The below shows the operation ROL instruction with count value 2.

ROR- This instruction stands for Rotate Right without carry flag. The contents of the operand are rotated right bit-wise by some number of
positions depending on the count value.

The ROR instruction rotates the bits towards the right side. Since this instruction rotates the bits right, the least significant bit (LSB) is moved
into the carry flag (CF) as well as into the most significant bit (MSB) position.

The below shows the operation ROR instruction with count value 2.

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RCR- This instruction stands for Rotate Right Through Carry. In this instruction, the contents of the operand (register or memory location) are
rotated right bit-wise by some number of positions along with the carry flag.

During the rotation the least significant bit (LSB) is moved to carry flag, and the carry flag is moved into the most significant bit (MSB).

The below shows the operation RCR instruction with count value 2.

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Q. Explain with suitable example the Instruction given below : S-23 6 Marks
(i) DAA (ii) AAM
Ans.
DAA – (Decimal Adjust AL after BCD Addition)
Syntax- DAA
Explanation:
This instruction is used to make sure the result of adding two packed BCD numbers is adjusted to be
a correct BCD number.
The result of the addition must be in AL for DAA instruction to work correctly.
If the lower nibble in AL after addition is > 9 or Auxiliary Carry Flag is set, then add 6 to lower
nibble of AL.
If the upper nibble in AL is > 9H or Carry Flag is set, and then add 6 to upper nibble of AL.
Example: -
if AL=99 BCD and BL=99 BCD
Then ADD AL, BL
1001 1001 = AL= 99 BCD
+ 1001 1001 = BL = 99 BCD
0011 0010 = AL =32 H and CF=1, AF=1
After the execution of DAA instruction, the result is CF = 1

0011 0010 =AL =32 H AF =1

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+ 0110 0110
1001 1000 =AL =98 in BCD

AAM Instruction: (BCD Adjust After Multiply).

After the two unpacked BCD digits are multiplied, the AAM instruction is used to adjust the product to two
unpacked BCD digits in AX.
Examples:
MUL CL
; AL = 0000 0100 = Unpacked BCD 4
; CL = 0000 0110 = Unpacked BCD 6
; AX = 0000 0000 0001 1000 = 0018H ; AL x CL Result in AX.
AAM ; AX = 0000 0010 0000 0100 = 02 04H
Which is unpacked BCD for 24.
Q. Write an appropriate 8086 instruction to perform following operation : S-23 6 Marks
(i) Rotate thc contents of BX Register towards right by 4 bits.
(ii) Rotate the contents of AX towards left by 2 bits.
(iii) Add 100 H to the contents of AX Register.
(iv) Transfer 1234 H to DX Register.
(v) Multiply AL by 08 H.
(vi) Signed division of BL and AL.
Ans.

(i) ROR BX, 4

(ii) ROL AX, 2
(iii) ADD AX, 100H
(iv) MOV DX, 1234H

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 (v) IMUL AL, 08H
(vi) IDIV BL

Q. Describe different branching instructions used in 8086 microprocessor in brief.

Ans. W-22 6 M
BRANCH INSTRUCTIONS
Branch instruction transfers the flow of execution of the program to a new address specified in the instruction directly or indirectly. When this
type of instruction is executed, the CS and IP registers get loaded with new values of CS and IP corresponding to the location to be transferred.
Unconditional Branch Instructions :
1. CALL : Unconditional Call
The CALL instruction is used to transfer execution to a subprogram or procedure by storing return address on stack There are two types of calls
NEAR (Inter-segment) and FAR(Intra-segment call). Near call refers to a procedure call which is in the same code segment as the call instruction
and far call refers to a procedure call which is in different code segment from that of
the call instruction.
Syntax: CALL procedure_name
2. RET: Return from the Procedure.
At the end of the procedure, the RET instruction must be executed. When it is executed, the previously stored content of IP and CS along with
Flags are retrieved into the CS, IP and Flag registers from the stack and execution of the main program continues further.
Syntax :RET

3. JMP: Unconditional Jump

This instruction unconditionally transfers the control of execution to the specified address using an 8-bit or 16-bit displacement. No Flags are
affected by this instruction.
Syntax : JMP Label

4. IRET: Return from ISR

When it is executed, the values of IP, CS and Flags are retrieved from the stack to continue the execution of the main program.
Syntax: IRET

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Conditional Branch Instructions
When this instruction is executed, execution control is transferred to the address specified relatively in the instruction

1. JZ/JE Label
Transfer execution control to address ‘Label’, if ZF=1.

2. JNZ/JNE Label
Transfer execution control to address ‘Label’, if ZF=0

3. JS Label
Transfer execution control to address ‘Label’, if SF=1.
4. JNS Label
Transfer execution control to address ‘Label’, if SF=0.
5. JO Label
Transfer execution control to address ‘Label’, if OF=1.

6. JNO Label
Transfer execution control to address ‘Label’, if OF=0.

7. JNP Label
Transfer execution control to address ‘Label’, if PF=0.

8. JP Label
Transfer execution control to address ‘Label’, if PF=1.
9. JB Label
Transfer execution control to address ‘Label’, if CF=1.

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10. JNB Label
Transfer execution control to address ‘Label’, if CF=0.

11. JCXZ Label

Transfer execution control to address ‘Label’, if CX=0

Conditional LOOP Instructions.

12. LOOP Label :

Decrease CX, jump to label if CX not zero.
13. LOOPE label
Decrease CX, jump to label if CX not zero and
Equal (ZF = 1).
14. LOOPZ label
Decrease CX, jump to label if CX not zero and ZF= 1.

15. LOOPNE label

Decrease CX, jump to label if CX not zero and Not Equal (ZF = 0).

16. LOOPNZ label

Decrease CX, jump to label if CX not zero and ZF=0

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Q. Explain the following instructions of 8086 : W-22 6 marks
i) DAA (ii) ADC (iii) XCHG
Ans.

(i) DAA (Decimal Adjust Accumulator)

Decimal adjusts after addition. It works only on AL register. AL register is known as Accumulator. It is used when we want
to perform addition of two decimal numbers (BCD addition).
We first enter the two decimal numbers.We add them using a normal ADD instruction.
Then we perform DAA instruction. DAA will adjust the addition to appear as a decimal addition.
The logic of DAA is as follows :
1. If the lower nibble of Al. is > 9 or Auxiliary carry flag is "l" then Add 06 to AL.
2. If the higher nibble of Al. is > 9 or Carry flag is 1 then Add 60 to AL.
Assume
AL = 29H and BL = 29H
Then ADD AL, BL gives
AL = 5DH
Now DAA gives
AL = 76 (06 is added to AL as lower nibble is > 9)

(ii) ADC (Add With Carry)

This instruction performs the same operation as ADD instruction, but adds the carry flag to the result.

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 Eg. ADC 0100H
ADC AX, BX
ADC AX, [SI]
ADC AX, [5000]
ADC [5000], 0100H

(iii) XCHG (EXCHANGE)

This instruction exchanges the contents of a register with the contents of
another register or memory location.
Example:
XCHG AX, BX ; Exchange the word in AX with word in BX.

Q.State the function of STC and CMC Instruction of 8086 S-23 2M

STC – This instruction is used to Set Carry Flag. CF 1
CMC – This instruction is used to Complement Carry Flag. CF ~ CF

Q.State two examples of each, Immediate and based indexed Addressing modes. S-23 2M

Immediate Addressing mode:

1. MOV AX, 2000H
2. MOV CL, 0AH
3. ADD AL, 45H
4. AND AX, 0000H
Based indexed Addressing mode:
1. ADD CX, [AX+SI]

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 2. MOV AX, [AX+DI]
3. MOV AL, [SI+BP+2000]

Q. Identify the Addressing Modes for the following instructions: S-23 4M

I. MOV CL, 34H
II. MOV BX, [4100H]
III. MOV DS, AX
IV. MOV AX, [SI+BX+04]
I. MOV CL, 34H: Immediate addressing mode.
II. II. MOV BX, [4100H]: Direct addressing mode.
III. III. MOV DS, AX: Resister addressing mode.
IV. IV. MOV AX, [SI+BX+04]: Relative Base Index addressing mode.

Q Write an assembly language instruction of 8086 microprocessor to i) Divide the content of AX register by 50H. ii) Rotate the
content of BX register by 4-bit towards left W-22 2M

(i) Divide the content of AX register by 50H:

MOV BL,50H
DIV BL
(ii) Rotate the content of BX register by 4 bits towards left:
MOV CL,04H
ROL BX, CL

QDifferentiate between ROL and RCL. W-22 2M

ROL − Used to rotate bits of byte/word towards the left, i.e. MSB to LSB and to Carry Flag [CF].

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 RCL − Used to rotate bits of byte/word towards the left, i.e. MSB to CF and CF to LSB

UNIT 4 Assembly Language Programming

Q Write an ALP for 8086 to multiply two 16 bit signed numbers S-24 4M
.Data
NUM1 DB -12H
NUM2 DB -31H
.Code
START:
MOV AX, @DATA
MOV DS,AX
MOV AL, NUM1
MOV BL, NUM2
IMUL NUM2
MOV AH, 4CH
INT 21H
ENDS

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END
QWrite an ALP for 8086 to find largest number from an array of 10 numbers. S-24 4M

DATA SEGMENT
ARRAY DB 01H, 02H, 03H, 04H, 05H, 06H, 07H, 08H, 09H, 10H
LARGEST DB 00H
DATA ENDS
CODE SEGMENT
START:
ASSUME CS:CODE,DS:DATA
MOV DX,DATA
MOV DS,DX
MOV CX,09H
MOV SI ,OFFSET
ARRAY MOV AL,[SI]
UP: INC SI
CMP AL,[SI]
JNC NEXT
MOV AL,[SI]
NEXT: DEC CX
JNZ UP
MOV LARGEST,AL
MOV AX,4CH
INT 21H
CODE ENDS
END START
Q Using Macro write an ALP to solve P = X2 + Y2 , where X and Y are 8 bit Numbers. S-24 4M
.MODEL SMALL
PROG MACRO a,b
MOV al,a

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MUL al
MOV bl,al
MOV al,b
MUL al
ADD al,bl
ENDM
.DATA
x DB 02H
y DB 03H
p DB DUP()
.CODE
START:
MOV ax,data
MOV ds,ax
PROG x, y
MOV p,al
MOV ah,4Ch
Int 21H
END
QWrite an ALP to sort 10 numbers in an array in descending order S-24 4M

DATA SEGMENT
ARRAY DB 15H,05H,08H,78H,56H
DATA ENDS
CODE SEGMENT
START:ASSUME CS:CODE,DS:DATA
MOV DX,DATA
MOV DS,DX
MOV BL,05H
STEP1: MOV SI,OFFSET ARRAY

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MOV CL,04H
STEP: MOV AL,[SI]
CMP AL,[SI+1]
JNC DOWN
XCHG AL,[SI+1]
XCHG AL,[SI]
DOWN:ADD SI,1
LOOP STEP
DEC BL
JNZ STEP1
MOV AH,4CH
INT 21H
CODE ENDS
END START

QWrite an ALP to check given 16 bit number is odd or even. S-24 4M

.model small
.data
num dw 1232H
odd dw 0
even dw 0
.code
entrypoint:
mov ax,@data
mov ds,ax
mov ax,num
ror ax,1
jnc dn
rol ax,1

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mov odd,ax
jmp exit
dn: rol ax,1
mov even,ax
exit:ends
end
Q Write an ALP using procedure for performing the operation Z =(A + B) * (C + D) S-24 4M

Procedure For Addition

SUM PROC NEAR
ADD AL,BL
RET
SUM ENDP
DATA SEGMENT
NUM1 DB 10H
NUM2 DB 20H
NUM3 DB 30H
NUM4 DB 40H
RESULT DB?
DATA ENDS
CODE SEGMENT
ASSUME CS: CODE,DS:DATA
START:MOV AX,DATA
MOV DS,AX
MOV AL,NUM1
MOV BL,NUM2
CALL SUM
MOV CL,AL
MOV AL, NUM3
MOV BL,NUM4

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CALL SUM
MUL CL
MOV RESULT,AX
MOV AH,4CH
INT 21H
CODE ENDS
END
QWrite an ALP to add the series of 5 numbers. S-24 4M
MODEL SMALL
.DATA
NUM1 DB 10H,20H,30H,40H,50H
RESULT DB 00H
CARRY DB 00H
ENDS
.CODE
START: MOV AX,@DATA
MOV DS, AX
MOV CL,05H
MOV SI, OFFSET NUM1
UP:MOV AL,[SI]
ADD RESULT, AL
JNC NEXT
INC CARRY
NEXT: INC SI
LOOP UP
MOV AH,4CH
INT 21H
ENDS
END START
Q. Write an ALP to find length of string [W’23] W-24 4Marks

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Ans.
Data Segment
STRG DB 'GOOD MORNING$'
LEN DB ?
DATA ENDS

CODE SEGMENT
START:
ASSUME CS: CODE, DS : DATA
MOV DX, DATA
MOV DS,DX
LEA SI, STRG
MOV CL,00H
MOV AL,'$'
NEXT: CMP AL,[SI]
JZ EXIT
ADD CL,01H
INC SI
JMP NEXT
EXIT: MOV LEN,CL
MOV AH,4CH
INT 21H
CODE ENDS

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Q. Write an ALP to count number of ‘1’ in 8 bit number [W’23] 4 marks
Ans.

DATA SEGMENT
BYTE DB 9BH
NONE DB?
DATA ENDS

CODE SEGMENT
ASSUME CS:CODE,DS:DATA
START: MOV AX, DATA
MOV DS,AX
MOV AL, BYTE
MOV BL,00H
MOV CL,08H
UP: ROL AL, 1
JNC DN
INC BL

DN: DEC CL
JNZ UP
MOV NONE.BL
INT 3
CODE ENDS
END START

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Q. Write an ALP for sum of series of 05 number's. 4 marks
Ans.
Assume FIVE , 8 bit HEX numbers
CODE SEGMENT
ASSUME CS:CODE,DS:DATA
START: MOV AX,DATA
MOV DS,AX
LEA SI,DATABLOCK
MOV CL,0AH
UP:MOV AL,[SI]
ADD RESULT_LSB,[SI]
JNC DOWN
INC REULT_MSB
DOWN:INC SI
LOOP UP
CODE ENDS
DATA SEGMENT
DATABLOCK DB 45H,02H,88H,29H,05H
RESULT_LSB DB 0
RESULT_MSB DB 0

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DATA ENDS
END

Q. Write an ALP for concatenation of two strings. Draw flow chart and assume suitable data. [W’23] 4Marks
Ans.

ALP –
DATA SEGMENT
STR1 DB "hello$"
STR2 DB "world$"
DATA ENDS
CODE SEGMENT
START: ASSUME CS: CODE, DS:DATA
MOV AX,@ DATA
MOV DS, AX

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MOV SI, OFFSET STR1
NEXT: MOV AL, [SI]
CMP AL,’$’
JE EXIT
INC SI
Jmp next
EXIT: MOV DI, OFFSET STR2
UP: MOV AL, [DI]
CMP AL, "$"
JE EXIT1
MOV [SI], AL
INC SI
INC DI
JMP UP
EXIT1: MOV AL,’$’
MOV [SI], AL
MOV AH, 4CH
INT 21H
CODE ENDS
END STAR
Flowchart-

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Q. Write an ALP to find Largest number from array of 10 number's. w-23 4 Marks
Ans.
DATA SEGMENT
ARRAY DB 01H, 02H, 03H, 04H, 05H, 06H, 07H, 08H, 09H, 0AH ; EXAMPLE ARRAY OF 10 NUMBERS
LARGEST_NUMBER DB ?
DATA ENDS
CODE SEGMENT
ASSUME CS:CODE, DS:DATA
START:
MOV AX, DATA
MOV DS, AX
MOV CX, 09H
LEA SI, ARRAY
MOV BL, [SI]
INC SI
UP:
MOV AL, [SI]
CMP AL, BL
JBE NXT
MOV BL, AL

NXT:
INC SI
LOOP UP

MOV LARGEST_NUMBER, BL

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 INT 20H
CODE ENDS
END START

Q. Write an ALP to transfer 10 bytes of data from one memory location to another, also draw the flow chart of the same.
Ans S-23 6 marks

Flowchart -

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ALP –
DATA SEGMENT
ARRAYI DB 10 DUP(?)
ARRAY2 DB 10 DUP(?)

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DATA ENDS
CODE SEGMENT
ASSUME PS:DATA, CS:CODE

START:MOV AX, DATA

MOV DS, AX
LEA SI, ARRAY1
LEA BX, ARRAY2
Mov CL,0AH

Up: MOV AL, [SI]

MOV [BX], AL
INC SI
INC BX
DEC CL
JNZ UP
INT 3
CODE ENDS
END START

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Q. Write an assembly language program to arrange the numbers in ascending order (Assume suitable data).W-22 4 Marks
Ans.
.model small
.DATA
ARRAY DB
06H,09H,22H,02H,07H,10H,11H,12H,13H,14H
ENDS
.CODE
START: MOV AX,DATA
MOV DS,AX
MOV BL,0AH

STEP1: MOV SI, OFFSET ARRAY

MOV CL,09H

STEP2: MOV AL,[SI

CMP AL,[SI+1]
JC DOWN
XCHG AL, [SI+1]
XCHG AL,[SI]
DOWN: ADD SI, 01
LOOP STEP2
DEC BL
JNZ STEP1
MOV AH,4CH
INT 21H
ENDS

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END START

Q. Write an assembly language program to Count No. of 1 's in a 16-bit number.S-23 4 marks
Ans.
DATA SEGMENT
WORD DW 889BH
NONE DW?
DATA ENDS
CODE SEGMENT
ASSUME CS:CODE, DS:DATA
START: MOV AX, DATA
MOV DS, AX
MOV BX, WORD
MOV DX, 0000H
MOV CL, 10H
UP: ROL BX, 1
JNC DN
INC DX
DN: DEC CL
JNZ UP
MOV CX, DX

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 MOV NONE, DX
INT 3
CODE ENDS
END START

Q. Draw flow chart and write assembly language program to reverse the word in string.
Ans.
Program:
DATA SEGMENT
STRB DB 'GOOD MORNING$'
REV DB 0FH DUP(?)
DATA ENDS

CODE SEGMENT
START:ASSUME CS:CODE,DS:DATA
MOV DX,DATA
MOV DS,DX

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 LEA SI,STRB
MOV CL,0FH
LEA DI,REV
ADD DI,0FH
UP:MOV AL,[SI]
MOV [DI],AL
INC SI
DEC DI
LOOP UP
MOV AH,4CH
INT 21H
CODE ENDS
END START
QWrite an ALP to perform addition of two 16 bit BCD numbers W-23 4M

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Flowchart:

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Q. Write an ALP to subtract two BCD number’s. S-23 4M

MODEL SMALL
.DATA
NUM1 DB 86H

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NUM2 DB 57H
ENDS
.CODE
START:
MOV AX@,DATA
MOV DS,AX
MOV AL,NUM1
SUB AL,NUM2
DAS
MOV BL,AL // STORE FINAL RESULT IN BL REGISTER
MOV AH,4CH
INT 21H
ENDS
END START

QWrite algorithm to find sum of a series of numbers. W-22 2M

1) Load the count in CX and clear AX and BX.
2) Store the starting address in SI.
3) Move data stored at address pointed by SI in DX.
4) Add AX=AX+DX.
5) If carry exists, increment BX.
6) Increment SI twice. Decrement CX.
7) If CX is not zero, return to step 3.
8) Store the sum(AX) and carry(BX) in memory.
9)Terminate the program.

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 UNIT 5 Procedure and Macro

Q. Define procedure and write its syntax W-23

Procedure: A procedure is group of instructions that usually performs one task. It is a reusable section of a software program which is stored in memory once
but can be used as often as necessary. A procedure can be of two types. 1) Near Procedure 2) Far Procedure Syntax :-
Procedure can be defined as
Procedure_name PROC

Procedure_name
ENDP
For Example
Addition PROC near
Addition END
Q. Differentiate between Procedure and Macro [W’23]
Ans.
Procedure Macro
Procedures are used for large group of instructions to be repeated Macros are used for small group of instructions to be repeated.
Object code is generated only once in memory. Object code is generated every time the macro is called.
CALL & RET instructions are used to call procedure and return from Macro can be called just by writing its name.
procedure.
Length of the object file is less Object file becomes lengthy
Directives PROC & ENDP are used for defining procedure. MACRO and ENDM are used for defining MACRO
Directives More time is required for its execution Less time is required for it’s execution
Procedure can be defined as Macro can be defined as

Procedure_name PROC MACRO-name MACRO

---- [ARGUMENT,……….
------ ARGUMENT N]

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Procedure_name ------
ENDP -------
ENDM
For Example For Example

Addition PROC near Display MACRO msg

Addition ENDP ENDM

Q. Write an ALP for Z = (P + Q) * (R + S) using MACRO. Draw flow chart of the same. [W’23]

DATA SEGMENT
P DB 04H
Q DB 02H
R DB 01H
S DB 02H
Z DW ?
DATA ENDS

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CODE SEGMENT
ASSUME CS: CODE, Ds:DATA
START: MOV AX, DATA
MOV DS, AX
MOV AL, P
MOV BL, Q
CALL ADDI
MOV CL,AL
MOV AL,R
MOV BL,S
CALL ADDI
MUL CL
MOV Z, AX
INT 3
ADDI MACRO
ADD AL, BL
RET
ADDI ENDM
CODE ENDS
END START

Flowchart :

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Q. Describe re-entrant and Recursive procedure with diagram. W-23 S-23 S-22 S-24

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Ans.
Reentrant Procedure:
A reentrant procedure is one in which a single copy of the program code can be shared by multiple users during the same period of time.
Re-entrance has two key aspects: The program code cannot modify itself and the local data for each
user must be stored separately.

Recursive procedures:
An active procedure that is invoked from within itself or from within another active procedure is a recursive procedure.
Such an invocation is called recursion. A procedure that is invoked recursively must have the RECURSIVE attribute specified in the PROCEDURE
statement.

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Q. Explain MACRO with suitable example. List four advantages Of it. S-24

MACRO:
Small sequence of the codes of the same pattern are repeated frequently at different places which perform the same operation on the different
data of same data type, such repeated code can be written separately called as Macro.

Syntax:
MACRO_NAME MACRO[ARG1,ARG2,…..ARGN)
…..
ENDM
Example:
MYMACRO MACRO P1, P2, P3 ; Macro definition with arguments
MOV AX, P1
MOV BX, P2
MOV CX, P3
ENDM ; Indicates end of macro.

DATA SEGMENT
DATA ENDS
CODE SEGMENT
START: ASSUME CS:CODE, DS:DATA
MOV AX,DATA
MOV DS,AX
MYMACRO 1, 2, 3 ; macro call
MYMACRO 4, 5, DX
MOV AH,4CH
INT 21H

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CODE ENDS
END START

Q. Write an ALP using MACRO to perform following operation

X = (A + B) * (C + D) [W’23]
DATA SEGMENT
A DB 04H
B DB 02H
C DB 01H
D DB 02H
X DW ?
DATA ENDS
CODE SEGMENT
ASSUME CS: CODE, DS:DATA
START: MOV AX, DATA
MOV DS, AX
MOV AL, A
MOV BL, B
CALL ADDI
MOV CL,AL
MOV AL,C
MOV BL,D

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 CALL ADDI
MUL CL
MOV X, AX
INT 3
ADDI MACRO
ADD AL, BL
RET
ADDI ENDM
CODE ENDS
END START

Q. Write an ALP to Add two 16-bit numbers 2M S-23

data segment
a dw 0202h
b dw 0408h
c dw ?
data ends
code segment
assume cs:code,ds:data
start:
mov ax,data
mov ds,ax
mov ax,a
mov bx,b
add ax,bx
mov c,ax
int 03h
code ends
end start
QDefine MACRO with its syntax S-23 2M S-24
Macro: A MACRO is group of small instructions that usually performs one task. It is a

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reusable section of a software program. A macro can be defined anywhere in a program
using directive MACRO &ENDM.
Syntax: MACRO-name MACRO [ARGUMENT 1,… ...... ARGUMENT N]
ENDM

Q. Differentiate between NEAR and FAR CALLS. S-23 S-24 W-24 4 M

QCompare procedure and Macro based on (i) Length of code (ii) Calling method (iii) Generation of object code (iv) Passing parameter w-24

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Q. Compare procedure and macros (4 points) S-23 4M

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Q. List directives used for procedure. W-22 2M
The assembler directive that are used for defining a procedure in the 8086 microprocessors are: PROC and ENDP

Q. Write a procedure to find factorial of given number W-22 4M

Procedure to find the factorial.
DATA SEGMENT
NUM DB 04H

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DATA ENDS
CODE SEGMENT
START: ASSUME CS:CODE, DS:DATA
MOV AX,DATA
MOV DS,AX
CALL FACTORIAL
MOV AH,4CH
INT 21H
PROC FACTORIAL
MOV BL,NUM ; TAKE NO IN BL REGISTER
MOV CL,BL ;TAKE CL AS COUNTER
DEC CL ;DECREMENT CL BY 1
MOV AL,BL
UP: DEC BL ;DECREMENT BL TO GET N-1
MUL BL ;MULTIPLY CONTENT OF N BY N-1
DEC CL ;DECREMENT COUNTER
JNZ UP ;REPEAT TILL ZERO
RET
FACTORIAL ENDP
CODE ENDS
END START
(OR)
DATA SEGMENT
A DW 0005H
FACT_LSB DW ?
FACT_MSB DW ?
DATA ENDS
CODE SEGMENT
ASSUME DS:DATA,CS:CODE
START:MOV AX,DATA

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MOV DS,AX
CALL FACTORIAL
MOV AH,4CH
INT 21H
FACTORIAL PROC
MOV AX,A
MOV BX,AX
DEC BX
UP: MUL BX ; MULTIPLY AX * BX
MOV FACT_LSB,AX ;ANS DX:AX PAIR
MOV FACT_MSB,DX
DEC BX
CMP BX,0
JNZ UP
RET
FACTORIAL ENDP
CODE ENDS
END START
Q Write an ALP to solve p=x²+y² using macro. (x and y are 8 bit nos.) w-24
.MODEL SMALL
PROG MACRO a,b
MOV al, a
MUL al
MOV bl,al
MOV al,b
MUL al
ADD al,bl
ENDM
.DATA
x DB 02H

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y DB 03H
p DB DUP()
.CODE
START:
MOV ax,data
MOV ds,ax
PROG x, y
MOV p,al
MOV ah,4Ch
Int 21H
END

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