8085 Pin Functions
8085 Pin Functions
Sheena S.
All signals can be classified into SIX groups
1. Address bus
2. Data Bus
3. Control and Status signals
4. Power Supply & frequency signals
5. Externally or peripheral Initiated signals
a. External signal acknowledgement(~INTA & HLDA)
6. Serial I/O ports
1. Address Bus
S1 S0 Operation
1 1 Fetch
1 0 Read
0 1 Write
0 0 Halt
Table Showing IO/~M, S0, S1 and Corresponding Operations
Opcode Fetch 0 0 1 1 1
Memory Read 0 0 1 1 0
Memory Write 0 1 0 0 1
IO Read 1 0 1 1 0
IO Write 1 1 0 0 1
4.Power Supply & Clock Frequency
★ Vcc → +5V power supply
★ Vss → Ground Reference
★ X1, X2 : A crystal (RC, LC network ) is connected to these TWO
pins. The frequency is internally divided by two. Therefore to
operate a system at 3MHz, the crystal should have a frequency of
6MHz
★ CLK (OUT): Clock Output. This signal can be used as the system
clock for other devices
5. Externally/ Peripheral initiated signals
➢ RESET
○ RESET IN
○ RESET OUT
➢ INTERRUPT
○ TRAP
○ RST 7.5
○ RST 6.5
○ RST 5.5
○ INTR
➢ READY
➢ HOLD
RESET: When the Reset pin is activated by an external key, all internal operations are
suspended and the program counter is cleared (0000H)
Interrupt: The microprocessor can be interrupted from the normal execution of
instructions and asked to execute some other instruction called a Service Routine. The
microprocessor resumes its operation after completing the service routine
Ready: If the signal at this READY pin is LOW. The microprocessor enters into a Wait
state. Is used primarily to synchronize slow peripheral with the microprocessor
HOLD: The microprocessor relinquishes control of buses and allows the external
peripheral to use them. Eg: The HOLD signal is used in Direct Memory Access.
Priority of interrupts:
5a.External signal acknowledgement(~INTA & HLDA)
~INTA (Interrupt Acknowledge)Output
This signal is generated by the microprocessor in response to the INTR. When the
microprocessor accepts the INTR, it executes an INTA machine cycle