Unit 3

explain instruction cycle in detail

instruction cycles, also known as machine cycles, are fundamental to how Computer Process es
instruction. They encompass a sequence of events. that occur when a Processor, executes a single
instructions. In Computer organization an instruction cyde also known as ferch-decade execute Cycle, is
the basie operation Performed by Central Processing Unit (CPU) to execule an instructronic

The major step in instruction cycle

1. Fetch in fetch cycle, the (Pu retrives the instruction. From: memory. The instruction is typically stored
at the address specified by Program: Counter (PC).

2. Decode In the decole cycle, the CPU interprets the instructio and determines what Operation needs to
be Performed. This involve Identifying the oplade and any operands that are needed to execute the
instruction

3. Execute In Execute cycle the CPU Performs the operation. specified by the instruction. This may
involve reading or writing data from or to memory, Performing arithmetic or logic. operations an dara. 1
manipulating the contror flow of Programm.c

4. Memory Access There are also some additional Steps that may be Performed whiler needed. 5. Ferch
operands

In some CPus, the operand needed for an instructionare fetched during a separate cycle before the execute
cycle. This is called fetch operand cycle.

6. store resort In some cpus, the result of an instruction cycle - are stored during a separare cycle after the
execute cycle. This is called store result cycle.

7. Interrupt handling In. Some CPUs, interrupt handling may ocrar doring any cycle of the instruction
cycle AD interrupt is a signal that (Pu receives from an external device or software that require immed-
iate attention....

By optimizing these cycles (Pu designers can improve the Performance and efficiency of the CPU,
culowing it to execute instruction faster and more efficiently

The instruction cycle. Each Phase of instruction cycle can be decom- Posed into sequence of elementary
micro operation. There is one example in a sequence each for ferch indirect, execute; interrupt Cycles.

The indirect cycle is always followed by the Execute cycle. The interupt: cycle is always followed by the
feich cycle for both fetch and execute cycles, the next cycle depends on the State of system
.2. Explain step-by-step execution of Complete instrution.

→1. Fetch

The Processor fetches the instruction from memory using the address stored in the Program (ounter (Pc)

The instruction is tranfered from memory to the instruction register (IR) within the Processor

2. Decode

The fetched instruction is decoded to determine the operation to be Performed and operands. involved.

- This Phase involves interpreting the opcode and determining the how the operand addressing mode,
which specifie are accessed..

3. fetch operand (if needed).

If the instruction involves fetching operand from memory or register the Processor retrives. these operand
-for example, if the instruction is an arithmet Operation like addition, the Processor fetches the value from
the specified source registers or memory location.

4. Execute'

The Processor Performs the actual operation specified by the Instruction.

5. memory Access (it needed) If the instruction requires accessing memory (eg loading or storing data)
the Processor Perfoams the memory access.

This Phase invalues reading data from memory if needed or writing data t0 memory It necesacmy.

for example, if the instruction is load/store operation the Processor reads or write data to specified
memory location...

6. Write Back
Finally, the result of the execution Phases are waitten back to the appropriate destination. This could
involve updating a register with the result is stored in the Computating or writing data back to memory if
necessary.

-for example, if the instruction is registar-to- register operation, the result is showed in the designated
destination register...

once the execution of one instruction is comple ted the Processor moves on to fetch the next instruction
and the Cycle Continues...
4. Explain the Instruction format.

→instraction formatin are a sequence bit (os and 1s) that are grouped into fields to Provide information to
CPU about / the operation and location of data.

They are fundamental Part of Computer architecture and: control how Programs are executed on a
Processo४

Instruction Format are made up of several things. operation codes operands register addresses memory
addresses... addressing mode immediate data values,

-The length of instruction is usually a multiple of 8bits and the bits are assigned to the fields when the
length is fixed.

The address fields in vary depending on CPU's register. the instruction format the organization. of the

Instruction formats determine the behaviour and complexity of an instruction, and can have a Significant
imPact on the Processor Performance Power Consumption and complexity.

A well-designed Instruction format can make Processor more efficient by reducing the number of
instruction needed to complete a task.

There are several types of instruction formats, zero address instruction format, one address Instruction
format Two address instruction format, Three address instruction format.
 Unit 4

1. Explain Semiconductor RAM memories in detail?

Data can be stored and read many times to and from this type of memory. Random-access memory can be
easily programmed, erased and reprogrammed by the user therefore is used in immense quantities in
computer applientions as current-day computing and processing technology demands large amounts of
memory to empower them to handle the memory requirenments. Various types of RAM including SRAM,
DRAM, SDRAM with its DDR3, DDRY and DPRS Variants are used in huge quantities.

Types of RAM

RAM is majorly categorised into two categories:

SRAM (static Random Access Memory) DRAM (Dynamic Random Acess Memory)
Static RAM (SRAM)- SRAM full form is Static Random Access Memory. It possesses an array of flip-
flops that are used to Save the data. the memory cells consists of flip flops that hold the information till
the power Supply is on. The word static implies that the memory holds its contents as long as the
electricity is being supplied and the data is damped when the power gets down because of its volatile
nature..

In static RAM, data is stored in FFs like Structure and is implemented by BTT or MOSFET. A flip-flop
for a memory cells uses four or six transistors along with some wiring which does not require
refreshments. this makes Static RAM significantly faster as compared to dynamic RAM. Static RAM is
used to build the cpu's speed-sensitive cache, while dynamic RAM forms the larger System RAM space.

Dynamic RAM CORAM) DRAM (Dynamic Random Access Memory) stores the data in the form of
charges in the capacitor and transistor pair available in the memory cell. DRAM is implemented using
MOSFETs. The Dynamic Random Access Memory needs to be regularly refreshed so that the data should
be maintained.
Few other types of RAM are:

Synchronouse Dynamic RAM (SDRAM): SDRAM is a type of DRAM and works in sync with the CPU
clock which implies it waits for the clock signal before acknowledging the data input. It simply works in
constrast to Dynamic Random Access Memory Cresponds instantly to data input). Mostly applied in
computer Memory, vidio game consoles, etc.

Single Data Rate Synchronous Dynamic RAM (SDR SDRAM): the 'single data rate' symbolise how the
memory processes. It can process one read and ite instruction per one write clock cycle. Popularly used in
computer memory, vidio game consoles, etc.

Double Data Rate Synchronous Dynamic RAM CODR SDRAM): DDR SDRAM Works similar to SDR
SDRAM just twice faster than it. DDR SDRAM can process two reads and two write instructions per
clock cycle.

Graphics Double Data Rate Synchronous Dynamic RAM CGDDR SDRAM): GODR SDRAM is a
variety of DDR SDRAM and is specifically designed for vidio graphis Cards.

Flash Memory: Flash memory'a sort of non-Volatile Storage that holds all data after power off also.
5. what id virtual Virtual Memory Memory is a in detail?

Storage allocation scheme in which secondary memory can be addressed as though it were part of the
main memory. the addresses a program may may use to referance memory are distinguished from the
addresses the memory system uses to identify physical storage sites and program-generated addresses are
translated automatically to the corresponding machine addresses.

A memory hierarchy, consisting of a computer System's memory and a disk, that enables a protess to
operate with only some portions of its address space in memory.

A virtual memory is what its name indicates- it is an illusion of a memory, that is larger than the real
memory, we refer to the Sofware component of virtual memory as a virtual memory manager.

the basis of virtual memory is the noncontiguous memory allocation model. the virtual memory manager
removes some components from memory to make room for other components.

the size of virtual storage is limited by the addressing scheme of the computer system and the
amount of secondary memory available not by the actual number of main storage locations. It is a
technique that is implemented using. both hardware and SoAware.

It maps memory addresses used by a program, called virtual addresses, into physical addresses in
computer memory.

All memory references within a process are logical addresses that are dynamically translated into physical
addresses at run time.

this means that a process can be swapped in and out of the main memory such that it occupies different
places in the main memory at different times. execution "during the cource of execution
Explain Cache memory with neat diagram in detail?

→ Cache Memory is a special very high-speed memory. It is used to speed up and synchrozing with high-
speed CPU. cache memory is costlier than main memory or disk memory but economical than cpu
registers, cache memory is an extremely fast memory type that acts as a buffer between RAM and the
CPU. It holds frequently requested data and instructions so that they are immediately available to the
CPU when needed.

levels of memory:

Level 1 or Register - It is a type of memory in which data is stored and accepted that are immediately
stored in CPU,

Level 2 or cache memory - It is the fastest memory which has faster acess time where data is temporarily
stored for faster access.

Level 3 or Main Memory - It is memory on which computer works currently.

Level 4 or secondary Memory - It is external memory which is not as fast as main memory but data says
permanently in this memory.

Cache Performance:

when the processor needs to read or write a location in main memory, it first checks for La corresponding
entry in the cache.

Cache Mapping:

there are three different types of mapping used for the purpose of cache memory which are as follows:

a.Direct Mapping

b. Associative mapping

c. Set-Associative mapping.

a. Direct Mapping- The simplest technique, known as direct mapping, maps each block of main memory
into only one possible cache line. An address spare is split inte two parts index field and a tag field. the
cache is used to store the tag field whereas the rest is stored in the main memory..
 unit 1
Explain the methods of Bus Arbitration in detail?
Bus Arbitration refers to the process by which the current bus master accesses and then leaves the control
of the bus and passes it to another bus requesting processor unit. the controller that has access to a bus at
an instance is known as a Bus master. A conflict may arise if the number of DMA controllers or other
controllers or processors try to acess the common bus at the same time, but access can be given to only
one of those.
There are two approaches to bus arbitration: . centralized 1 bus arbitration-
A single bus arbiter performs the required arbitration.
2. Distributed bus arbitration-
All devices participating in the selection of the next bus master
Methos of centralized Bus Arbitration-
there are three arbitration methods:
(i) Daisy chaining method: It is a simple and cheaper method where all the bus master use the same lime
for making bus requests. the bus grant signal serially propagates through each master until it encounters
the first one that is requesting access to the bus.
Advantages -
Simplicity and Scalability, the user can add more devices anywhere along the chain, up to a certain
maximum value.
Disadvantages-
the value of priority assigned to a device depends on the position of the master but propagation delay
arises in this method. If one device fails then the entire system will stop working..
ii) Polling or Rotating Priority method: In this, the controller is used to generate the address for the master
Cunique priority), the number of address lines required depends on the number of masters
connected in the System. Advantages-
This method does not favor any particular device and processor.
the method is also quite simple..
If one device fails then the entire system will not stop working.
Disadvantages-
Adding bus master is difficult as increases the number of address lines of the circuit..
(iii) Fixed priority or Independent Request method: In this, each master has a separate pair of bus request
and bus grant line and each pair has a priority assigned to it.
Advantages -
this method generate a fast response.
Disadvantages-
Hardware cost is high as a large no. of control lines is required.
Distributed Bus Arbitration: In this, all devices participate in the selection of the next bus master. each
devices on the bus is assigned a 4 bit identification number. the priority of the device will be determined
by generated ID.
) Explain Functional Unit of digital system?
•A computer organization describes the function and more design of the various units of a digital System.
A int general-purpose computer system is the best- known example of a digital system, other examples
induded telephone switching exchanges, digital Volt- meters, digital counters, electronic calculators and
digital displays.

Functional units are a part of a CPU that performs the operations and calculations called for by the
computer program. A computer consist of a five main components namely; Input unit, central processing
Unit, Memory unit Arithmetic and logical unit, control unit-and output unit.

1.) Input unit Input units are used by the computer to read the data, the most commonly used input
devices are keyboards, mouse, joy Sticks, trackballs, microphones, etc. However, the most well-known
input device is a keyboard.

2.) central processing unit- central processing unit commonly known as cpu can be reffered as an
electronic circuitry within a computer that carries out the instructions given by a computer program by
performing the basic arithmetic, logical, control and input/output (7/0) operations specified by the
instructions.
3.) Memory unit the memory unit can be reffered to as the storage area in which program are kept which
are rumming, and that contains data needed by the running programs.

4.) Arithmetic and Logical unit - Most of all the arithmet and logical operations of a computer are
executed. in the ALU of the processor. It perform azithomeli operations like addition, subtration,
multiplication, division and also the logical operation like AND, OR, NOT operations.

(s.) control unit the control unit is a component of a computer's central processing unit that coordinates
the operation of the processor. It tells the computer memory, arithmetic/logic unit and input and output.
devires how to respond to a program's instructions

6.) output unit the primary function of the outpu unit is to send the processed results to the user. output
devices display information in a way that the user can understand, output devices pieces of are plece
equipment that are used to generate information. or any other response processed by the computer.
 Unit 5
2: What is Interrupt and explain their types.

An Interrupt is a signal to the Processor emitted by hardware or Software indicating an event that needs
immediate attention it temporaly halts the current execution of the Processor, saving its state, and transfer
to designated interrupt handler or interrupt service routine (ISR),
Types of Interrupts
Interrupts can be broadly Categorized into two type Hardware interrupt and software interrupts.
Hardware interrupts
These interrupts are generated by Hardware device to signal that they need Processing by the CPU
Hardware interrupts are synchronous and can occur at any time.
subtypes of Hardware Interrupts
maskable interuppts (IRIS)
These interrupts can be ignored or masked by Setting appropiate bits in an interrupt mask register exa:
keyboard input, mouse movement.
Non-maskable interrupts (FAPINMIS)
These Interupts cannot be ignored or masked by
the (Pu and must be processed immediately.
exa: Hardware failures, Power failure signals.

Software Interrupts.
These interrupts are generated by software, typically through system calls or by executing specific
instruc- tions that generates an Interrupt.
Subtypes of software interrupts.
syn Chornous Interrupts (Traps)
1
These interrupts occur at Predictable Points in Program execution, usually resulting from specific
instruction.
exa: system calls, invalid memory access.
Asynchoronous software interrupts
These are rare and generally used in specific real-time operating systems..
exa: signals from other software Processes.
explain i/o interface with neat labelled diagram.
An Input/output interface is Crucial Component of ComPuter systems that faciliates Communication.
between centrou Processing Unit (CPU). and Peripheral devices such as keyboards, monitor, Printer and
storage devices. This interface ensures that data can be transfered efficiently. and accurately berween the
(PU and these devices, encibling. the system to perform a wide range of tasks.
①functions of I/O Interface.
* Data transter: manages the transfer of data between the cpu and Peripheral devices.
Communication : Provides Standarized way for devices to communicate with the (PU. e Control:
manages the operation and Control signal needed to Co-ordinate data transfer.
* Status monitoring: monitors the status of the clevice to ensure Proper operation and handle errors.
②Types of i/O Interfaces.
* Parallel Interface : Transters multiple bits of lata simultaneously, commonly used for device like
Printers.
* serial Interface: Transter data one bit at a time over a single wire, used in devices like modern and mice.
It is slower than Parallel interface but simple and cheaper.
* Universal Serial Bus (USB) :- A widely used serial Interface that supports Plug and Play and hot-
swapping Connecting various devices like keyboard, mice and Storage devices.

* PCI (Peripheral component Interconnect) :- A Parallel interface that Connects internal Component like
Sound Cards and networks cards to the motherboard-
③ i/O Port
* A hardware interface though which data is sent. to and received from Peripheral device. Consists of data
register for. holding data, control register for holding control signals and status register for holding Status
Information about the crevice
i/o control methods:
* Programmed I/O : The (pu is involved in the clata transfer Process, constantly checking device status.
and reading / writing data... It is simple but waste CPO time..
* Interrupt Driven I0 : The CPU is interrupted by. the device when it is ready for data transfer, allowing
the (Pu. to Perform other tasks in meantime. Jl is more efficient than Programmed 110.1
Direct memory Access (DMA): A DMA: Controller. Direct takes over the data transfer Process; moving
data directly between memory and device without involving the CPU.
Disadvantage.
Complexity managing different types of interface. and control methods Can be complex. Cost Higher
Performance interface like. Parallel Interface and aduanced bus system can be expensive.