DIGITAL PRINCIPLES AND COMPUTER ORGANIZATION

UNIT III: INSTRUCTIONS

Introduction: Machine Language - Assembly language – Assembler - Programming
Arithmetic & Logic Operations – Input - Output Programming. Basic Computer
Organization and Design Instruction Codes - Computer Registers - Computer Instruction -
Timing & Control Instruction Cycles- Memory Reference Instruction.
I) Machine Language

• A program is list of instructions or statements for directing the computer to perform a

required data processing task.

• Programs written for a computer may be in one of the following categories:

1. Binary code. This is a sequence of instructions and operands in binary that list the exact
representation of instructions as they appear in computer memory.

2. Octal or hexadecimal code. This is an equivalent translation of the binary code to octal or
hexadecimal representation.

3. Symbolic code. The user employs symbols (letters, numerals, or special characters) for the
operation part, the address part, and other parts of the instruction code. Each symbolic instruction
can be translated into one binary coded instruction. This translation is done by a special program
called an assembler. Because an assembler translates the symbols, this type of symbolic program is
referred to as an assembly language program.

4. High-level programming languages. These are special languages developed to reflect the
procedures used in the solution of a problem rather than be concerned with the computer hardware
behaviour. An example of a high-level programming language is Fortran. It employs problem
oriented symbols and formats. The program is written in a sequence of statements in a form that
people prefer to think in when solving a problem.
Key Features of Machine Language:

1. Binary Code: Machine language instructions are written in binary (0s and 1s), as this is the
only language the CPU can understand.
2. CPU-Specific: The machine language is specific to a particular CPU architecture (e.g., x86,
ARM). Each type of CPU has its own machine language, meaning a program written in
machine language for one type of CPU won't work on another without modification or
emulation.
3. Instruction Set: The set of binary codes (opcodes) represents instructions such as "add",
"subtract", "load", "store", etc. These opcodes tell the CPU what operation to perform.
4. Memory Addressing: Machine language includes addresses for accessing memory
locations where data is stored. Instructions may include operands that refer to memory
locations or register values.

Structure of a Machine Language Instruction:

A typical machine language instruction may consist of the following components:

 Opcode: Specifies the operation to be performed (e.g., ADD, SUB).

 Operand(s): Refers to the data or memory addresses on which the operation will be
performed (e.g., register numbers or memory addresses).
 Addressing Modes: Specifies how to interpret the operands. This could refer to direct,
indirect, register, or immediate addressing.

Example:

For an x86 CPU, an instruction in machine language might look like this:

Copy
10111000 00000101

 10111000 is the opcode for the MOV (move) instruction.

 00000101 is the operand (in this case, the value 5 to be moved).

Importance of Machine Language in Computer Organization:

1. Closest to Hardware: Machine language is the closest you can get to the actual hardware,
and it allows you to perform operations directly on the CPU and memory.
 2. Efficiency: Code written in machine language is the most efficient in terms of execution
speed, as there’s no need for translation or interpretation by higher-level languages.
3. Foundation of Higher-Level Languages: All high-level programming languages (like C,
Java, Python) are ultimately translated into machine language by compilers or interpreters
so that the computer can execute them.

However, machine language is challenging for humans to work with due to its complexity and the
need for precise control over hardware operations. This is why higher-level programming languages
(like assembly language or C) are commonly used for practical software development.

II) Assembly Language

In computer organization, assembly language is a low-level programming language that
provides a symbolic representation of a computer's machine language. It serves as a bridge between
high-level programming languages (like C, Java, etc.) and machine language. Unlike machine
language, which uses binary code, assembly language uses human-readable mnemonics to represent
machine-level instructions.

Key Features of Assembly Language:

1. Symbolic Representation: Assembly language uses mnemonics (e.g., MOV, ADD, SUB) to
represent machine-level instructions. These mnemonics are easier for humans to understand
than binary code.
2. Architecture-Specific: Like machine language, assembly language is specific to a particular
CPU architecture. Each type of processor (e.g., x86, ARM, MIPS) has its own unique
assembly language syntax and instruction set.
3. Low-Level Control: Assembly provides direct control over hardware, such as memory and
registers, and allows manipulation of the CPU's internal components.
 4. Human-Readable: Assembly language is a step above machine language in terms of
readability. Instead of binary, assembly uses symbolic names for operations and data (e.g.,
AX for a register, 5 for an immediate value).
5. Direct Mapping to Machine Code: Assembly language instructions are directly translated
into machine code by an assembler, which is a tool that converts assembly code into the
binary code that the computer's CPU can execute.

Structure of an Assembly Language Program:

An assembly program consists of instructions, data, and sometimes macros. These instructions
typically follow a specific format, often in the form:

csharp
Copy
[label] instruction operands ; comment

 Label: Optional; a reference point to a specific location in memory.

 Instruction: The operation to be performed (e.g., MOV, ADD).
 Operands: Data for the operation (could be registers, memory addresses, or immediate
values).
 Comment: Optional; a description of what the instruction does, usually prefixed with a
semicolon (;).

Example of Assembly Language:

For an x86 processor, an assembly language program might look like this:

assembly
 Copy
MOV AX, 5 ; Move the value 5 into register AX
MOV BX, 10 ; Move the value 10 into register BX
ADD AX, BX ; Add the value in BX to AX

Here:

 MOV is the instruction to move data.

 AX and BX are registers in the CPU.
 The ADD instruction adds the value in BX to AX.

Types of Instructions in Assembly Language:

1. Data Movement Instructions: These transfer data between registers, memory, and I/O ports
(e.g., MOV, PUSH, POP).
2. Arithmetic and Logic Instructions: These perform mathematical or logical operations
(e.g., ADD, SUB, AND, OR).
3. Control Flow Instructions: These alter the flow of execution, like jumps and loops (e.g.,
JMP, CALL, RET).

4. Comparison Instructions: These compare values (e.g., CMP, TEST).

5. Input/Output Instructions: These manage I/O operations (e.g., IN, OUT).

Advantages of Assembly Language:

1. Efficient Execution: Assembly language programs tend to be very fast since they map
directly to machine code and allow for fine-grained control over the hardware.
2. Control Over Hardware: Programmers have complete control over memory and CPU
registers, which is important for systems programming, embedded systems, and
performance-critical applications.
3. Compact Code: Assembly language allows the programmer to write very efficient, compact
code, which can be crucial in environments with limited memory.

Disadvantages of Assembly Language:

1. Complexity: Writing code in assembly is error-prone and requires deep knowledge of the
hardware. It is much more complex than high-level languages.
 2. Portability: Programs written in assembly language are typically not portable. They are
specific to a particular CPU architecture, meaning the same program won't run on different
hardware without modification.
3. Maintainability: Assembly code is difficult to maintain, especially for large programs. It
can be hard to read and understand, even by experienced programmers.

Assembler:

The assembler is the tool used to translate assembly language code into machine code. It converts
mnemonics like MOV and ADD into binary machine instructions that the CPU can execute. Assemblers
may also provide additional features like macros, which allow for more complex instructions to be
written in a simplified form.

Example of a Simple Assembly Language Program:

Here’s an example of a simple program in assembly language that adds two numbers:

assembly
Copy
section .data
num1 db 5 ; First number (5)
num2 db 10 ; Second number (10)
result db 0 ; To store the result

section .text
global _start

_start:
mov al, [num1] ; Load num1 into register AL
add al, [num2] ; Add num2 to AL
mov [result], al ; Store the result in 'result'

; Exit program
mov eax, 1 ; Exit syscall number
xor ebx, ebx ; Return code 0
int 0x80 ; Interrupt to exit
This program:

 Loads num1 and num2 into the AL register.

 Adds the values together.
 Stores the result in the result variable.

III) Assembler
The Assembler is a Software that converts an assembly language code to machine code. It
takes basic Computer commands and converts them into Binary Code that Computer’s Processor
can use to perform its Basic Operations. These instructions are assembler language or assembly
language.

What is an Assembly Language?

An assembly language is a low-level language. It gives instructions to the processors for

different tasks. It is specific for any processor. The machine language only consists of 0s and 1s
therefore, it is difficult to write a program in it. On the other hand, the assembly language is close
to a machine language but has a simpler language and code.

We can create an assembly language code using a compiler or, a programmer can write it directly.
Mostly, programmers use high-level languages but, when more specific code is required, assembly
language is used. It uses opcode for the instructions. An opcode basically gives information about
the particular instruction. The symbolic representation of the opcode (machine level instruction) is
called mnemonics. Programmers use them to remember the operations in assembly language.

For example ADD A,B

Here, ADD is the mnemonic that tells the processor that it has to perform additional function.
Moreover, A and B are the operands. Also, SUB, MUL, DIVC, etc. are other mnemonics.

Types of Assembler

Assemblers generate instruction. On the basis of a number of phases used to convert to machine
code, assemblers have two types:

1. One-Pass Assembler
These assemblers perform the whole conversion of assembly code to machine code in one go.

2. Multi-Pass/Two-Pass Assembler

These assemblers first process the assembly code and store values in the opcode table and symbol
table. And then in the second step, they generate the machine code using these tables.

a) Pass 1

 Symbol table and opcode tables are defined.

 keep the record of the location counter.

 Also, processes the pseudo instructions.

b) Pass 2

 Finally, converts the opcode into the corresponding numeric opcode.

 Generates machine code according to values of literals and symbols.

Some Important Terms

 Opcode table: They store the value of mnemonics and their corresponding numeric
values.

 Symbol table: They store the value of programming language symbols used by the
programmer, and their corresponding numeric values.

 Location Counter: It stores the address of the location where the current instruction will
be stored.
IV) Programming in Arithmetic and logic Operation

ALU is responsible to perform the operation in the computer.

The basic operations are implemented in hardware level. ALU is having collection of two types
of operations:
1. Arithmetic operations
2. Logical operations
Consider an ALU having 4 arithmetic operations and 4 logical operation.

To identify any one of these four logical operations or four arithmetic operations, two control
lines are needed. Also to identify the any one of these two groups- arithmetic or logical, another
control line is needed. So, with the help of three control lines, any one of these eight operations
can be identified.

Consider an ALU is having four arithmetic operations. Addition, subtraction, multiplication and
division. Also consider that the ALU is having four logical operations: OR, AND, NOT & EX-
OR.

We need three control lines to identify any one of these operations. The input combination of
these control lines are shown below:

Control line is used to identify the group: logical or arithmetic, ie: arithmetic operation : logical
operation.
Control lines and are used to identify any one of the four operations in a group. One possible
combination is given here.
A decode is used to decode the instruction. The block diagram of the ALU is shown in figure
below.

The ALU has got two input registers named as A and B and one output storage register, named as
C. It performs the operation as:

C = A op B

The input data are stored in A and B, and according to the operation specified in the control lines,
the ALU perform the operation and put the result in register C.

As for example, if the contents of controls lines are, 000, then the decoder enables the addition
operation and it activates the adder circuit and the addition operation is performed on the data
that are available in storage register A and B . After the completion of the operation, the result is
stored in register C.

We should have some hardware implementations for basic operations. These basic operations can
be used to implement some complicated operations which are not feasible to implement directly
in hardware.

There are several logic gates exists in digital logic circuit. These logic gates can be used to
implement the logical operation.

Functions of ALU

The ALU is an essential component of the CPU. It majorly performs arithmetic and logical
operations on inputted data. The ALU has different electrical input and output connections that
enable the transmission of digital signals between the ALU and external electronic devices. Data
is provided to the ALU inputs by external circuits, and the ALU sends processed computational
results. Some of the key functionalities of the ALU are as −

 Arithmetic Operations − It includes addition, subtraction, multiplication, and division.

 Logical Operations − It includes AND, OR, NOT, XOR (exclusive OR), and bit-shifting
logical operations.
 Comparison Operations − The ALU also performs a comparison of numbers to
determine greater than, less than, or equal to.
 Bitwise Operations − These include operations that change individual bits inside a data
word, such as shifting them left or right and masking specific bits.
 Data flow into the ALU − ALU has direct access to the CPU controllers, primary
memory, and input/output devices. ALU takes input data from memory using the bus-like
electrical route.
 Applying functions − The internal components of the ALU are used to perform binary
calculations for a variety of functions.
 Provides Temporary Storage − The ALU commonly includes memory blocks to store
input operands, operands to be added, accumulated results, and shifted results.

Some of the common logic gates are mentioned here.

AND gate: The output is high if both the inputs are high. The AND gate and its truth table is
shown in Figure below

OR gate: The output is high if any one of the input is high. The OR gate and its truth table is
shown in Figure below.
EX-OR gate: The output is high if either of the input is high. The EX-OR gate and its truth table
is given in Figure below.

If we want to construct a circuit which will perform the AND operation on two 4-bit number, the
implementation of the 4-bit AND operation is shown in the Figure below.

Arithmetic Circuit
Binary Adder :
Binary adder is used to add two binary numbers.

In general, the adder circuit needs two binary inputs and two binary outputs. The input variables
designate the augends and addend bits; The output variables produce the sum and carry.

The binary addition operation of single bit is shown in the truth table

C: Carry Bit
S: Sum Bit
The simplified sum of products expressions are

The circuit implementation is

Binary Subtractor :
The subtraction operation can be implemented with the help of binary adder circuit, because
We know that 2’s complement representation of a number is treated as a negative number of the
given number.

We can get the 2’s complements of a given number by complementing each bit and adding 1 to
it.The circuit for subtracting A-B consist of an added with inverter placed between each data
input B and the corresponding input of the full adder. The input carry must be equal to 1 when
performing subtraction.

The operation thus performed becomes A , plus the 1’s complement of B , plus 1. This is equal to
A plus 2’s complement of B .

With this principle, a single circuit can be used for both addition and subtraction. The 4 bit adder
subtractor circuit is shown in the figure. It has got one mode ( M ) selection input line, which will
determine the operation,

If M=0 , then A+B , If M=1 then A-B=A+(-B)

 A+ 1’s complement of B+1

Figure : 4-bit adder subtractor

The circuit diagram of a 4-bit adder substractoris shown in the Figure .

The operation of OR gate:

V) Input and Output Programming

In the context of computer organization, Input and Output (I/O) refers to the processes of
receiving data from external devices (input) and sending data to external devices (output). These
operations are fundamental to interacting with a computer system, allowing communication with
the external world.

Input and Output in Computer Organization

 1. Input Devices:
o These are hardware components that allow data to be entered into the computer
system. Examples include keyboards, mice, scanners, microphones, and cameras.
2. Output Devices:
o These are hardware components that allow the computer to communicate
information to the user or another system. Examples include monitors, printers,
speakers, and external drives.

I/O Operations in Computer Organization

1. I/O Interfaces:

 The computer uses I/O interfaces to manage the flow of data between the processor and
external devices.
 These interfaces include ports like USB, serial ports, parallel ports, and even specialized
hardware interfaces like the PCI bus.

2. I/O System:

 I/O Controller: The I/O controller manages the communication between the computer
system and the external devices. It handles data transfer, data formatting, and error
checking.
 Direct Memory Access (DMA): This is a mechanism that allows peripherals to
communicate directly with the system's memory, bypassing the CPU to improve
efficiency.

3. I/O Ports:

 Physical ports (like USB or serial ports) through which the input and output devices are
connected to the system. These ports are controlled by I/O controllers that interface with
the CPU and memory.

4. Bus Systems:

 In computer systems, buses like the address bus, data bus, and control bus play a key
role in transferring data between the CPU, memory, and I/O devices.

5. I/O Operations (Polling, Interrupts):

  Polling: The CPU continually checks the status of an I/O device to see if it needs
attention. This can waste CPU time.
 Interrupts: An interrupt is a signal sent by an I/O device to the CPU, requesting
attention. The CPU can respond by pausing its current operations, handling the I/O
request, and then resuming its previous task.

Example: A Simple I/O Operation

Let’s look at a simplified flow of an input operation and an output operation:

Input Operation:

1. The user types something on the keyboard (input device).

2. The keyboard sends electrical signals (data) to the keyboard controller.
3. The keyboard controller sends the data to the CPU or the memory via the I/O interface
(bus).
4. The CPU processes the input and stores or displays the data accordingly.

Output Operation:

1. The CPU sends data to be displayed to the monitor (output device).

2. The data is passed to the video controller, which formats the information for display.
3. The video controller sends the data to the monitor via the output port.
4. The monitor displays the data as visual information.
VI) Basic computer organization and design
CONTENTS:

 Instruction Codes
 Computer Registers
 Computer Instructions
 Timing And Control
 Instruction Cycle
 Register – Reference Instructions
 Memory – Reference Instructions
 Input – Output And Interrupt

1. Instruction Codes:

 The organization of the computer is defined by its internal registers, the timing and
control structure, and the set of instructions that it uses.
 Internal organization of a computer is defined by the sequence of micro-operations it
performs on data stored in its registers.
 Computer can be instructed about the specific sequence of operations it must perform.
 User controls this process by means of a Program.
 Program: set of instructions that specify the operations, operands, and the sequence by
which processing has to occur.
 Instruction: a binary code that specifies a sequence of micro-operations for the
computer.
 The computer reads each instruction from memory and places it in a control register.
The control then interprets the binary code of the instruction and proceeds to execute it
by issuing a sequence of micro-operations. – Instruction Cycle
 Instruction Code: group of bits that instruct the computer to perform specific
operation.
 Instruction code is usually divided into two parts: Opcode and address(operand)

 Operation Code (opcode):

 group of bits that define the operation
  Eg: add, subtract, multiply, shift, complement.
 No. of bits required for opcode depends on no. of operations available in
computer.
 n bit opcode >= 2n (or less) operations
 Address (operand):
 specifies the location of operands (registers or memory words)
 Memory words are specified by their address
 Registers are specified by their k-bit binary code
 k-bit address >= 2k registers

Stored Program Organization:

 The ability to store and execute instructions is the most important property of a general-
purpose computer. That type of stored program concept is called stored program
organization.
 The simplest way to organize a computer is to have one processor register and an
instruction code format with two parts.
  Instructions are stored in one section of memory and data in another.
 For a memory unit with 4096 words we need 12 bits to specify an address since 212 =
4096.
 If we store each instruction code in one 16-bit memory word, we have available four bits
for the operation code (abbreviated opcode) to specify one out of 16 possible operations,
and 12 bits to specify the address of an operand.
 Accumulator (AC):
 Computers that have a single-processor register usually assign to it the name
accumulator and label it AC.
 The operation is performed with the memory operand and the content of AC.

Addressing of Operand:

 Sometimes convenient to use the address bits of an instruction code not as an address but
as the actual operand.
 When the second part of an instruction code specifies an operand, the instruction is said
to have an immediate operand.
 When the second part specifies the address of an operand, the instruction is said to have
a direct address.
 When second part of the instruction designate an address of a memory word in which the
address of the operand is found such instruction have indirect address.
 One bit of the instruction code can be used to distinguish between a direct and an
indirect address.
 The instruction code format shown in Fig. 5-2(a). It consists of a 3-bit operation code, a
12-bit address, and an indirect address mode bit designated by I. The mode bit is 0 for a
direct address and 1 for an indirect address.
 A direct address instruction is shown in Fig. 5-2(b).
 It is placed in address 22 in memory. The I bit is 0, so the instruction is recognized as a
direct address instruction. The opcode specifies an ADD instruction, and the address part
is the binary equivalent of 457.
 The control finds the operand in memory at address 457 and adds it to the content of AC.
 The instruction in address 35 shown in Fig. 5-2(c) has a mode bit I = 1.
 Therefore, it is recognized as an indirect address instruction.
 The address part is the binary equivalent of 300. The control goes to address 300 to find
the address of the operand. The address of the operand in this case is 1350.
 The operand found in address 1350 is then added to the content of AC.
 The effective address to be the address of the operand in a computation-type instruction
or the target address in a branch-type instruction.
 Thus the effective address in the instruction of Fig. 5-2(b) is 457 and in the instruction of
Fig 5-2(c) is 1350.
2. Computer Registers:

 What is the need for computer registers?

 The need of the registers in computer for
 Instruction sequencing needs a counter to calculate the address of the next
instruction after execution of the current instruction is completed (PC).
 Necessary to provide a register in the control unit for storing the
instruction code after it is read from memory (IR).
 Needs processor registers for manipulating data (AC and TR) and a
register for holding a memory address (AR).
 The above requirements dictate the register configuration shown in Fig. 5-3.
 The registers are also listed in Table 5.1 together with a brief description of their
function and the number of bits that they contain.
  The data register (DR) holds the operand read from memory.
 The accumulator (AC) register is a general purpose processing register.
 The instruction read from memory is placed in the instruction register (IR).
 The temporary register (TR) is used for holding temporary data during the processing.
 The memory address register (AR) has 12 bits since this is the width of a memory
address.
 The program counter (PC) also has 12 bits and it holds the address of the next
instruction to be read from memory after the current instruction is executed.
 Two registers are used for input and output.
 The input register (INPR) receives an 8-bit character from an input
device.
 The output register (OUTR) holds an 8-bit character for an output device.

Common Bus System:

 The basic computer has eight registers, a memory unit, and a control unit
 Paths must be provided to transfer information from one register to another and between
memory and registers.
 A more efficient scheme for transferring information in a system with many registers is to
use a common bus.
 The connection of the registers and memory of the basic computer to a common bus
system is shown in Fig. 5-4.
 The outputs of seven registers and memory are connected to the common bus
 The specific output that is selected for the bus lines at any given time is determined from
the binary value of the selection variables S2, S1, and S0.
 The number along each output shows the decimal equivalent of the required binary
selection.
 For example, the number along the output of DR is 3. The 16-bit outputs of DR are placed on
the bus lines when S2S1S0 = 011.

The lines from the common bus are connected to the inputs of each register and the data
inputs of the memory
 The particular register whose LD (load) input is enabled receives the data from the bus
during the next clock pulse transition.
 The memory receives the contents of the bus when its write input is activated.
 The memory places its 16-bit output onto the bus when the read input is activated and
S2S1S0 = 111.
 Two registers, AR and PC, have 12 bits each since they hold a memory address.
 When the contents of AR or PC are applied to the 16-bit common bus, the four most
significant bits are set to 0's.
 When AR or PC receives information from the bus, only the 12 least significant bits are
transferred into the register.
 The input register INPR and the output register OUTR have 8 bits each.
 They communicate with the eight least significant bits in the bus.
 INPR is connected to provide information to the bus but OUTR can only receive
information from the bus.
 This is because INPR receives a character from an input device which is then transferred
to AC.
 OUTR receives a character from AC and delivers it to an output device.
 Five registers have three control inputs: LD (load), INR (increment), and CLR (clear).
 This type of register is equivalent to a binary counter with parallel load and synchronous
clear.
 Two registers have only a LD input.
 The input data and output data of the memory are connected to the common bus, but the
memory address is connected to AR.
 Therefore, AR must always be used to specify a memory address.
 The 16 inputs of AC come from an adder and logic circuit. This circuit has three sets of
inputs.
o One set of 16-bit inputs come from the outputs of AC.
o Another set of 16-bit inputs come from the data register DR.
o The result of an addition is transferred to AC and the end carry-out of the addition
is transferred to flip-flop E (extended AC bit).
The content of any register can be applied onto the bus and an operation can be performed
in the adder and logic circuit during the same clock cycle.
 For example, the two microoperations DR AC and AC DR can be executed at the same
time.
 This can be done by placing the content of AC on the bus (with S2S1S0 = 100), enabling
the LD (load) input of DR, transferring the content of DR through the adder and logic
circuit into AC, and enabling the LD (load) input of AC, all during the same clock cycle.
3. Computer Instructions:

 The basic computer has three instruction code formats, as shown in Fig. 5-5. Each format
has 16 bits.

 The operation code (opcode) part of the instruction contains three bits and the meaning
of the remaining 13 bits depends on the operation code encountered.
 A memory-reference instruction uses 12 bits to specify an address and one bit to specify
the addressing mode I.
 I is equal to 0 for direct address and to 1 for indirect address.
 The register-reference instructions are recognized by the operation code 1.11 with a 0 in
the leftmost bit (bit 15) of the instruction.
 A register-reference instruction specifies an operation on the AC register. So an operand
from memory is not needed. Therefore, the other 12 bits are used to specify the operation
to be executed.
 An input—output instruction does not need a reference to memory and is recognized by
the operation code 111 with a 1 in the leftmost bit of the instruction.
 The remaining 12 bits are used to specify the type of input—output operation.
 The instructions for the computer are listed in Table 5-2.
  The symbol designation is a three-letter word and represents an abbreviation intended for
programmers and users.
 The hexadecimal code is equal to the equivalent hexadecimal number of the binary code
used for the instruction.

Instruction Set Completeness:

 A computer should have a set of instructions so that the user can construct machine
language programs to evaluate any function.
 The set of instructions are said to be complete if the computer includes a sufficient
number of instructions in each of the following categories:
o Arithmetic, logical, and shift instructions
o Data Instructions (for moving information to and from memory and processor
registers)
o Program control or Brach
o Input and output instructions
 There is one arithmetic instruction, ADD, and two related instructions, complement
AC(CMA) and increment AC(INC). With these three instructions we can add and
subtract binary numbers when negative numbers are in signed-2's complement
representation.
 The circulate instructions, CIR and CIL; can be used for arithmetic shifts as well as any
other type of shifts desired.
 There are three logic operations: AND, complement AC (CMA), and clear AC(CLA).
The AND and complement provide a NAND operation.
 Moving information from memory to AC is accomplished with the load AC (LDA)
instruction. Storing information from AC into memory is done with the store AC (STA)
instruction.
 The branch instructions BUN, BSA, and ISZ, together with the four skip instructions,
provide capabilities for program control and checking of status conditions.
 The input (INP} and output (OUT) instructions cause information to be transferred
between the computer and external devices.

4. Timing and Control:

 The timing for all registers in the basic computer is controlled by a master clock
generator.
 The clock pulses are applied to all flip-flops and registers in the system, including the
flip-flops and registers in the control unit.
 The clock pulses do not change the state of a register unless the register is enabled by a
 control signal.
 The control signals are generated in the control unit and provide control inputs for the
multiplexers in the common bus, control inputs in processor registers, and
microoperations for the accumulator.
 There are two major types of control organization:
o Hardwired control
o Microprogrammed control
 The differences between hardwired and microprogrammed control are
Hardwired control Microprogrammed
control
 The control logic is implemented with  The control information is stored in a
gates, flip-flops, decoders, and other control memory. The control memory
digital circuits. is programmed to initiate the required
sequence of microoperations.
 The advantage that it can be optimized  Compared with the hardwired control
to operation is slow.
produce a fast mode of operation.
 Requires changes in the wiring among  Required changes or modifications
the various components if the design can be done by updating the
has to be microprogram in
modified or changed. control memory.

 The block diagram of the hardwired control unit is shown in Fig. 5-6.
 It consists of two decoders, a sequence counter, and a number of control logic gates.
 An instruction read from memory is placed in the instruction register (IR). It is divided
into three parts: The I bit, the operation code, and bits 0 through 11.
 The operation code in bits 12 through 14 are decoded with a 3 x 8 decoder. The eight
outputs of the decoder are designated by the symbols D0 through D7.
 Bit 15 of the instruction is transferred to a flip-flop designated by the symbol I.
 Bits 0 through 11 are applied to the control logic gates.
 The 4-bit sequence counter can count in binary from 0 through 15.
 The outputs of the counter are decoded into 16 timing signals T0 through T15.
 The sequence counter SC can be incremented or cleared synchronously.
 The counter is incremented to provide the sequence of timing signals out of the 4 x 16
decoder.
 As an example, consider the case where SC is incremented to provide timing signals T0,
T1, T2, T3 and T4 in sequence. At time T4, SC is cleared to 0 if decoder output D3 is
active.
 This is expressed symbolically by the statement

D3T4: SC 0
 The timing diagram of Fig. 5-7 shows the time relationship of the control signals.
  The sequence counter SC responds to the positive transition of the clock.
 Initially, the CLR input of SC is active. The first positive transition of the clock clears
SC to 0, which in turn activates the timing signal T0 out of the decoder. T0 is active
during one clock cycle.
 SC is incremented with every positive clock transition, unless its CLR input is active.
 This produces the sequence of timing signals T0, T1, T2, T3, T4and so on, as shown in the
diagram.
 The last three waveforms in Fig.5-7 show how SC is cleared when D3T4 = 1.
 Output D3 from the operation decoder becomes active at the end of timing signal T2.
 When timing signal T4 becomes active, the output of the AND gate that implements the
control function D3T4 becomes active.
 This signal is applied to the CLR input of SC. On the next positive clock transition (the
one marked T4 in the diagram) the counter is cleared to 0.
 This causes the timing signal T0 to become active instead of T5 that would have been
active if SC were incremented instead of cleared.

5. Instruction Cycle:

 A program residing in the memory unit of the computer consists of a sequence of

instructions.
 The program is executed in the computer by going through a cycle for each instruction.
  Each instruction cycle in turn is subdivided into a sequence of sub cycles or phases.
 In the basic computer each instruction cycle consists of the following phases:
1. Fetch an instruction from memory.
2. Decode the instruction.
3. Read the effective address from memory if the instruction has an indirect
address.
4. Execute the instruction.
 Upon the completion of step 4, the control goes back to step 1 to fetch, decode, and
execute the next instruction.

Fetch and Decode:

 Initially, the program counter PC is loaded with the address of the first instruction in the
program.
 The sequence counter SC is cleared to 0, providing a decoded timing signal T0.
 The microoperations for the fetch and decode phases can be specified by the following
register transfer statements.
  Figure 5-8 shows how the first two register transfer statements are implemented in the
bus system.
 To provide the data path for the transfer of PC to AR we must apply timing signal T0 to
achieve the following connection:
o Place the content of PC onto the bus by making the bus selection inputs S2, S1, S0
equal to 010.
o Transfer the content of the bus to AR by enabling the LD input of AR.
 In order to implement the second statement it is necessary to use timing signal T1 to
provide the following connections in the bus system.
o Enable the read input of memory.
o Place the content of memory onto the bus by making S2S1S0=111.
o Transfer the content of the bus to IR by enabling the LD input of IR.
o Increment PC by enabling the INR input of PC.
 Multiple input OR gates are included in the diagram because there are other control
functions that will initiate similar operations.

Determine the Type of Instruction:

 The timing signal that is active after the decoding is T3.

 During time T3, the control unit determine the type of instruction that was read from the
memory.
 The flowchart of fig.5-9 shows the initial configurations for the instruction cycle and
also how the control determines the instruction cycle type after the decoding.
 Decoder output D7 is equal to 1 if the operation code is equal to binary 111.
 If D7=1, the instruction must be a register-reference or input-output type.
 If D7 = 0, the operation code must be one of the other seven values 000 through 110,
specifying a memory-reference instruction.

 Control then inspects the value of the first bit of the instruction, which is now available
in flip-flop I.
 If D7 = 0 and I = 1, indicates a memory-reference instruction with an indirect address.
So it is then necessary to read the effective address from memory.
 If D7 = 0 and I = 0, indicates a memory-reference instruction with a direct address.
 If D7 = 1 and I = 0, indicates a register-reference instruction.
 If D7 = 01and I = 1, indicates an input-output instruction.
 The three instruction types are subdivided into four separate paths.
 The selected operation is activated with the clock transition associated with timing signal
 T3.
 This can be symbolized as follows:
Register-Reference Instructions:

 Register-reference instructions are recognized by the control when D7 = 1 and I=0.

 These instructions use bits 0 through 11 of the instruction code to specify one of 12
instructions.
 These 12 bits are available in IR (0-11).
 The control functions and microoperations for the register-reference instructions are
listed in Table 5-3.
 These instructions are executed with the clock transition associated with timing variable
T3.
 Control function needs the Boolean relation D7I’T3, which we designate for convenience
by the symbol r.
 By assigning the symbol Bi to bit i of IR, all control functions can be simply denoted by
rBi.

 For example, the instruction CLA has the hexadecimal code 7800, which gives the
binary equivalent 0111 1000 0000 0000. The first bit is a zero and is equivalent to I’.
 The next three bits constitute the operation code and are recognized from decoder output
D7.
 Bit 11 in IR is 1 and is recognized from B11. The control function that initiates the
microoperation for this instruction is D7I’T3 B11 = rB11.
 The execution of a register-reference instruction is completed at time T3.
 The sequence counter SC is cleared to 0 and the control goes back to fetch the next
instruction with timing signal T0.
  The first seven register-reference instructions perform clear, complement, circular shift,
and increment microoperations on the AC or E registers.
 The next four instructions cause a skip of the next instruction in sequence when a stated
condition is satisfied. The skipping of the instruction is achieved by incrementing PC
once again.
 The condition control statements must be recognized as part of the control conditions.
 The AC is positive when the sign bit in AC(15) = 0; it is negative when AC(15) = 1. The
content of AC is zero (AC = 0) if all the flip-flops of the register are zero.
 The HLT instruction clears a start-stop flip-flop S and stops the sequence counter from
counting.

6. Memory-Reference Instructions:

 Table 5-4 lists the seven memory-reference instructions.

 The decoded output Di for i = 0, 1, 2, 3, 4, 5, and 6 from the operation decoder that
belongs to each instruction is included in the table.
 The effective address of the instruction is in the address register AR and was placed
there during timing signal T2 when I= 0, or during timing signal T3 when I = 1.
 The execution of the memory-reference instructions starts with timing signal T4.
 The symbolic description of each instruction is specified in the table in terms of register
transfer notation.
AND to AC:

 This is an instruction that performs the AND logic operation on pairs of bits in AC and
the memory word specified by the effective address.
 The result of the operation is transferred to AC.
 The microoperations that execute this instruction are:

ADD to AC:

 This instruction adds the content of the memory word specified by the effective address
to the value of AC.
 The sum is transferred into AC and the output carry Cout is transferred to the E (extended
accumulator) flip-flop.
 The microoperations needed to execute this instruction are

LDA: Load to AC

 This instruction transfers the memory word specified by the effective address to AC.
 The microoperations needed to execute this instruction are

STA: Store AC

 This instruction stores the content of AC into the memory word specified by the effective
address.

 Since the output of AC is applied to the bus and the data input of memory is connected to
the bus, we can execute this instruction with one microoperation.
BUN: Branch Unconditionally

 This instruction transfers the program to the instruction specified by the effective
address.
 The BUN instruction allows the programmer to specify an instruction out of sequence
and we say that the program branches (or jumps) unconditionally.
 The instruction is executed with one microoperation:

BSA: Branch and Save Return Address

 This instruction is useful for branching to a portion of the program called a subroutine or
procedure.
 When executed, the BSA instruction stores the address of the next instruction in
sequence (which is available in PC) into a memory location specified by the effective
address.
 The effective address plus one is then transferred to PC to serve as the address of the
first instruction in the subroutine.
 This operation was specified with the following register transfer:

 A numerical example that demonstrates how this instruction is used with a subroutine is
shown in Fig. 5-10.

 The BSA instruction is assumed to be in memory at address 20.

 The I bit is 0 and the address part of the instruction has the binary equivalent of 135.
  After the fetch and decode phases, PC contains 21, which is the address of the next
instruction in the program (referred to as the return address). AR holds the effective
address 135.
 This is shown in part (a) of the figure.
 The BSA instruction performs the following numerical operation:

 The result of this operation is shown in part (b) of the figure.

 The return address21 is stored in memory location 135 and control continues with the
subroutine program starting from address 136.
 The return to the original program (at address 21) is accomplished by means of an
indirect BUN instruction placed at the end of the subroutine.
 When this instruction is executed, control goes to the indirect phase to read the effective
address at location 135, where it finds the previously saved address 21.
 When the BUN instruction is executed, the effective address 21 is transferred to PC.
 The next instruction cycle finds PC with the value 21, so control continues to execute the
instruction at the return address.
 The BSA instruction must be executed with a sequence of two microoperations:

ISZ: Increment and Skip if Zero

 This instruction increment the word specified by the effective address, and if the
incremented value is equal to 0, PC is incremented by 1 to skip the next instruction in
the program.
 Since it is not possible to increment a word inside the memory, it is necessary to read the
word into DR, increment DR, and store the word back into memory.
 This is done with the following sequence of microoperations:
Control Flowchart:

 A flowchart showing all microoperations for the execution of the seven memory-
reference instructions is shown in Fig. 5.11.