Computer Organization and Architecture

Code: SEng3022
Set by :
Molla K.
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 Chapter Eight
Input-Output Organization

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 Out Lines
Peripheral Devices

Input-Output Interface

Asynchronous Data Transfer

Mode of Transfers

Priority Interrupts

Direct Memory Access(DMA)

Input-Output Processor(IOC)

Serial Communication
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 Peripheral Devices
 Input or output devices attached to the computer is know as peripherals. Example:
keyboard display unit and printers.
 A Peripherals device is a device that is connected to computer system but is not part
of the core computer system architecture.
 E.G. Keyboard, video monitor, display units and printers are common peripheral devices.
 The IO subsystem of a computer, provides an efficient mode of communication
between the central system and outside environment.
 Allows both input(from outside world to computer) as well as, output(from
computer to the outside world). Example: Touch screen
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 Cont’d
 An external device connected to an IO unit also called Interface is referred to as
peripheral devices or simply a peripheral.
 External devices can classified into three categories

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Cont’d

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 Cont’d

Fig: 1 Connection of CPU, IO module and peripheral devices 7

 Input-Output Interface
 Interface is a shared boundary between two separate components of the computer
system which can be used to attach two or more components to the system for
communication purposes.
Input output Interfaces provides method for transferring information between
internal storage and external IO devices.
 Peripheral connected to the computer needs special communication link for
interacting them with the central processing unit.
The purpose of communication link is to resolve the difference exist between the
central computer and each peripheral.
These components are called peripheral units. 8
 Input-Output Interface…..cont.
Input-Output Interface peripherals connected to a computer need special
communication links for interfacing with CPU.
In computer system, there are special hardware components between the
CPU and peripherals to control or manage the input-output transfers.
These components are called input-output interface units because they
provide communication links between processor bus and peripherals.
They provide a method for transferring information between internal
system and input-output devices.

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Input-Output Interface…..cont.

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 Asynchronous Data Transfer
Asynchronous data transfer is a method of data transmission where data is sent in a non-continuous, non-
synchronous manner.
This type of transfer is commonly used in computer networks and communication systems where data is
transferred between two or more devices. Two units are independent and each has its own private clock.
If the registers in the interface share a common clock with the CPU registers, the transfer between the two
units is said to be synchronous and which means at the same time and has common clock.
Asynchronous data transfer between two independent units requires that control signal be transmitted between
the communicating units to indicate the time at which data is being transmitted.
Two methods can achieve asynchronous data transfer :
 The strobe control: A strobe pulse is supplied by one unit to indicate to the other unit when the transfer is
occurred.
 Handshaking: this method is commonly used to attend each data item being transferred with a control signal that
indicates data in the bus. This unit receiving the data item responds with another signal to acknowledge receipt
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of data.
 Asynchronous Data Transfer
Two methods can achieve asynchronous data
transfer :
 The strobe control: A strobe pulse is supplied by
one unit to indicate to the other unit when the
transfer is occurred
 Handshaking: this method is commonly used to
attend each data item being transferred with a
control signal that indicates data in the bus. This
unit receiving the data item responds with
another signal to acknowledge receipt of data.
 The strobe pulse and handshaking method of
asynchronous data transfer is not restricted to
I/O transfer.
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 Mode of Transfers
 Modes of data transfer in COA refer to the different methods by which data can be
exchanged between the central processing unit (CPU) and peripheral devices.
 The binary information that is received from an external device is usually stored in the
memory unit.
 Mode of transfers is the way of transferring information from and to internal and
external storage.
 Three methods are possible for I/O operations or data transfer mode. They are:-
o Programmed I/O

o Interrupt driven /Interrupt-Initiated I/O

Direct Memory Access [DMA]
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 Programmed I/O
 With programmed I/O, data are exchanged between the processor and the I/O unit.
 It is due to the result of the I/O instructions that are written in the computer program.
 Usually the transfer is from a CPU register and memory
 The processor executes a program that gives it direct control of the I/O operation, including sensing device
status, sending a read or write command, and transferring the data.
 With both programmed and interrupt I/O, the processor is responsible for extracting data from main
memory for output and storing data in main memory for input.
 Both the methods programmed I/O and Interrupt-driven I/O require the active involvement of the
processor to transfer data between memory and the I/O unit, and any data transfer must transverse a path
through the processor.
 The alternative is known as direct memory access (DMA). In this mode, the I/O module and main
memory exchange data directly, without processor involvement.
 IO devices does not have direct access to memory all execution happens via CPU instruction. 15
Interrupts

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 Interrupt
 An interrupt is an event that alters the sequence in which the processor executes instructions.
 Interrupt is the method of creating a temporary halt during program execution and allows peripheral
devices to access the microprocessor.
 The process of interrupting the normal execution of the program to carry out the specific task is called
as an Interrupt.
 An interrupt is either a hardware generated CALL (externally derived from a hardware signal) or a
software generated CALL (internally derived from the execution of an instruction or by some other
internal event).
 Any type interrupts the program by calling an interrupt service procedure (ISP) or interrupt handler.
 The interrupts of the entire Intel family of microprocessors include two hardware pins that request
interrupts (INTR and NMI), and one hardware pin ( ) that acknowledges the interrupt requested
through INTR. 17
 Cont’d

Interrupt instructions include:-

Exit,
Signal,
 Call,
Return.
 Instructions that interrupt the flow of a program can cause the program to:

Skip to another part of the program marked by a label (SIGNAL)

Go temporarily to a subroutine either within the program or outside the
program (CALL or RETURN).
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 Hardware Interrupts
 The microprocessor has two hardware interrupt inputs: Non-maskable Interrupt (NMI) and
Interrupt Request (INTR).
 Whenever the NMI input is activated, a type 2 interrupt occurs because NMI is internally decoded.
 Hardware interrupts are those interrupts which are caused by any peripheral device by sending
a signal through a specified pin to the microprocessor.
 The NMI is an edge triggered input that requests an interrupt on the positive edge (0-to-1
transition).
 A hardware interrupt is an electronic alerting signal sent to the processor from an external
device, like a disk controller or an external peripheral.
 For example: when we press a key on the keyboard or move the mouse, they trigger hardware
interrupts which cause the processor to read the keystroke or mouse position.
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 Priority Interrupts
 A priority interrupt is a system that creates a priority over various sources to determine which condtion is to be
serviced first when two or more requests arrives simultaneously.
 The processor’s priority is usually programmed in a few bits of the processor status word.
 It can be changed by program instructions that write into the program status register (PS).
 These are privileged instructions, which can be executed only while the processor is running in the supervisor mode.
 The processor is in the supervisor mode only when executing operating system routines.
 It switches to the user mode before beginning to execute application program
 An attempt to execute a privileged instruction while in the user mode leads to a special type of interrupt called a
privilege exception .

 Data transfer between CPU and IO device is initiated by the CPU. How ever the CPU cannot start the transfer
unless the device is ready to communicate with the CPU.
 When two devices interrupt the computer at the same time, the computer services the devices with the higher
priority first.
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 Interrupt Driven I/O
 With interrupt driven IO, the CPU issue a command to IO module and it does not wait
until IO operation is complete but instead continues to execute other instructions.
 When IO module has completed its work it interrupt s the CPU
 Using Interrupt Driven IO method CPU issues read command.
 An interrupt is an exception condtion in a computer system caused by an event external
to the CPU.
 Interrupts enable transfer of control from one program to another to be initiated by an
event that is external to a computer.
 Execution of the interrupt program resumes after completion of execution of the
Interrupt Service Routine.
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 Interrupt Driven I/O
 An interrupt is an exception condition in a computer system caused by an event external to the
CPU.
 Interrupts are commonly used in IO operations by a device interface (or controller) to notify the
CPU that it has completed an IO operation.
 An interrupt is indicated by a signal sent by the device interface to the CPU via an interrupt
request line (on an external bus).
 In Interrupt-Driven I/O, the CPU initiates the I/O operation and then continues with
other tasks.
 When the I/O operation is complete, the I/O device generates an interrupt, causing the
CPU to suspend its current task and handle the interrupt by servicing the I/O operation.

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 Direct Memory Access[DMA]
 DMA allows peripheral devices to transfer data directly from and to memory without the intervention of the
CPU .
 The data transfer performs without intervention of CPU.
 The DMA controller is a piece of hardware that controls one or more peripheral devices.
 DMA controller allows devices to transfer data to or from the system's memory without the help of the
processor.
The DMA IO technique provides direct access to the memory while the CPU is temporarily disabled.
 A DMA controller temporarily borrows the address bus, data bus, and control bus from the CPU and transfers the
data bytes directly between an IO port and a series of memory locations.
 Two control signals are used to request and acknowledge a DMA transfer in the CPU based system.
 The HOLD signal is a bus request signal which asks the CPU to release control of the buses after the current
bus cycle.
 The HLDA signal is a bus grant signal which indicates that the CPU has certainly released control of its buses by
placing the buses at their high-impedance states. 23
 Cont’d

 Bus Request - We use bus requests in the DMA

controller to ask the CPU to resign the control
buses.
 Bus Grant : It is activated by the CPU to
inform the external DMA controller that the
buses are in high impedance state and the
requesting DMA can take control of the buses.
• Once the DMA has taken the control of the
buses it transfers the data.

 The DMA controller takes over the buses to manage the transfer directly between the I/O devices and
the memory unit.
 Input-Output Processor(IOC)
 An Input Output Processor is a hardware
component of a computer system responsible for
controlling the flow of data between the CPU and
peripheral devices such as keyboards, mice,
printers, scanners, and storage devices.
 The IOP is just like a CPU that handles the
details of I/O operations

 The IO Processor is a specialized processor which

loads and stores data into memory along with the
execution of I/O instructions.
 It acts as an interface between system and devices. It involves a sequence of events to executing I/O operations and
then store the results into the memory. 25
 Serial Communication
 Serial communication is the process of sequentially transferring the information/bits on the
same channel.
 The most outstanding difference between IO processor and data communication processor is
in the method processor communicate with the IO devices.
 An IO processor communicate with the peripherals through common IO bus that is consist
of of many data and control lines.
 All peripherals share common bus and use it to transfer information to and from IO
processor.
 A data communication processor communicates with each terminal through a single pairs
of wires.
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 Serial Communication
 The serial communication can either be asynchronous or synchronous.

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 Asynchronous or Synchronous
 Synchronous Transmission
o In synchronous Transmission , the data will be created with the
help of combining the groups of bits. That data will be
continuously sent in time with a master clock.
o It uses a synchronized clock frequency to operate the data of
sender or receiver.
o In synchronous communication, there is no need to use the gaps,
start bits and stop bits.
o On the basis of the timing being synced correctly between the
sender and receiver devices, the data accuracy is totally dependent.
o The synchronous serial transmission is more expensive as
compared to asynchronous serial transmission.
o data is sent in form of blocks or frames. This transmission is the
full-duplex type. 28
 Asynchronous Communication
o Asynchronous Transmission
In asynchronous Transmission , the groups of bits will be treated as
an independent unit, and these data bits will be sent at any point in
time.
 In order to make synchronization between sender and receiver, the
stop bits and start bits are used between the data bytes.
 These bits are useful to ensure that the data is correctly sent.
 The time taken by data bits of sender and receiver is not constant,
and the time between transmissions will be provided by the gaps.
Data is sent in form of byte or character. This transmission is the
half-duplex type transmission.
In asynchronous communication, we don't require harmonization between the sender and receiver devices,
which is the main advantage of asynchronous communication. 29
Serial Communication: Type of Transmission Mode
 On the basis of the data transfer rate and the type of transmission mode, serial communication
will take many forms.
 The transmission mode can be classified into simplex, half-duplex, and full-duplex.
 Each transmission mode contains the source, also known as sender or transmitter, and
destination, also known as the receiver.
 Simplex transmission Mode
 A simplex line carries information in one direction only.
 This mode is rarely used in data communication because
the receiver cannot communicate to the transmitter with
indicate the occurrence of error.
 Examples of simplex transmission are radio and television
broadcasting .
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 Serial Communication: Type of Transmission Mode
II. Half Duplex Mode
 Half duplex transmission system is one that have capable of
transmitting in both direction but, data can transmitted in
only one direction at a time.
 A pair of wire is needed for mode
III. Full Duplex Mode
 A full duplex transmission can send and receive data in both directions
simultaneously.
 This can be achieved by means of a four wire link, with a different
pair of wires dedicated to each direction of transmission.
 The communication lines, modems and other equipment used in the
transmission of information between two more stations is called data
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link .
Cont’d

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 Reading ASS.
 Types of DMA transfer using DMA controller

Parallel communication

 Difference between Serial communication and Parallel communication

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