Digital Lecture 8
Digital Lecture 8
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Combinational circuits
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Design procedure
1. Specification
•
Write a specification for the circuit if one is not already available
•
Specify/Label input and output
2. Formulation
• Derive a truth table or initial Boolean equations that define the required
relationships between the inputs and outputs, if not in the specification
3. Optimization
• Apply 2-level and multiple-level optimization (Boolean Algebra, K-Map,
software)
• Draw a logic diagram for the resulting circuit using ANDs, ORs, and inverters
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Design procedure
4. Technology Mapping
• Map the logic diagram to the implementation technology selected (e.g. map
into NAND gates)
5. Verification
• Verify the correctness of the final design manually or using simulation
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Example 1
Question: Design a circuit that has a 3-bit input and a single output (F)
specified as follows:
•
F=0, when the input is less than 5
•
F=1, otherwise
Solution:
Step 1 (Specification):
• Label the inputs (3 bits) as X, Y, Z
• X is the most significant bit, Z is the least significant bit
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Example 1
Step 2 (Formulation) Step 3 (Optimization):
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Example 2
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Example 2
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Example 2
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Example 2
B
A
D
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Example 2
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Arithmetic circuits
• Adders
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Binary Arithmetic: Addition
! Decimal Addition
1 1 Carry
5 5
+ 5 5
1 1 0
= Ten ≥ Base
Binary Addition
! Column Addition
Carrying 1 to a column
is equivalent to adding
1 to that column.
1 1 1 1 1 1
1 1 1 1 0 1 = 61
+ 1 0 1 1 1 = 23
0 1 0 1 0 0 = 84
1
≥ (2)10
Half Adder
• Design an Adder for 1-bit numbers?
1. Specification
• 2 inputs (X,Y)
• 2 outputs (C,S)
2. Formulation
c = m3 = XY
S = m1+m2 = x’y+xy’ = x xor y
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Half Adder
• This adder is called Half Adder, why?
• The half adder can add only two input bits (A and B) and has nothing
to do with the carry if there is any in the input.
• So if the input to a half adder have a carry, then it will be neglected it
and adds only the A and B bits. That means the binary addition
process is not complete and that’s why it is called a half adder.
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Full Adder
• A combinational circuit that adds 3 input bits to generate a Sum bit
and a Carry bit
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Full Adder = 2 Half Adders
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Full Adder = 2 Half Adders
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Bigger Adders
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Bigger Adders
X1X2X3X4
Y1Y2Y3Y4
X Y X Y X Y X Y
A A A A
C S C S C S C S
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Binary Parallel Adder
• To add n-bit numbers:
• Use n Full-Adders in parallel
• The carries propagates as in addition by hand
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