Design of A Two Stage Amplifier Using ACM Model 1740375315
Design of A Two Stage Amplifier Using ACM Model 1740375315
ECEN 607(ESS)
Courtesy of
Judy Amanour-Boadu
Contents
ACM model
Amplifier specifications
Extraction of parameters
Design of amplifier
Simulation results
Why ACM model?
Powerful tool for the simulation of MOS
transistors
Simple, precise equations to extract
physical parameters
Parameters describe effects particular to
newer small channel technologies
Valid for the efficient design of analog
circuits
Better match between simulations and
actual circuit performance
Amplifier Specifications
Specifications Value
Avo (DC gain) > 50 dB
GBW > 20 MHz
PM (Phase Margin) > 50o
SR (Slew Rate) > 1.7 V/us
CL 50pF
Cin <0.8 pF
In band noise (DC- <10μV
10MHz)
Supply 1V
Amplifier Specifications
Boundary conditions
𝑔𝑚1
• = 𝐺𝐵𝑊 > 20 𝑀𝐻𝑧……....(1)
𝐶𝑐
𝐼𝑡𝑎𝑖𝑙 1.7𝑉
• = 𝑆𝑙𝑒𝑤 𝑅𝑎𝑡𝑒 > ……....(2)
𝐶𝑐 𝜇𝑠
16𝐾𝑇 𝑔𝑚
• 𝑉𝑒𝑞 2𝑖𝑛 ≅ 1 + 8 …….…(3)
3𝑔𝑚1 𝑔𝑚1
𝐺𝐵𝑊 𝐺𝐵𝑊 𝐺𝐵𝑊
• 𝑃𝑀 = 180 − 𝑡𝑎𝑛−1 − 𝑡𝑎𝑛−1 − 𝑡𝑎𝑛−1 ….(4)
𝑤𝑝1 𝑤𝑝2 𝑤𝑧1
1
• Cancel zero by using 𝑅𝑧 =
𝑔𝑚8
𝜋
• Assume phase contribution of 𝑤𝑝1 is about and 𝑓𝑝2 > 80𝑀𝐻𝑧(from
2
(4) and amplifier specifications for phase margin > 60o)
𝑔𝑚8
• = 𝑓𝑝2 ⇒ 𝑔𝑚8 > 1𝑚𝑆
𝐶𝐿
• From (1) 𝑔𝑚1 > 240µ𝑆
• From (3), 𝐼𝑡𝑎𝑖𝑙 > 8.5µ𝐴
Parameter extraction for design(65nm)
[1] A.I.A. Cunha, Schneider, M.C.; Galup-Montoro C.; “An MOS transistor model for analog circuit design”. IEEE J.of Solid-State Circuits, Vol. 33, Issue 10, pp. 1510-1518, Oct.
1998.
Amplifier dimensions calculations
Choose if = 0.5,assume 𝑔𝑚1,8 = 1.5𝑚𝑆
Check intrinsic cutoff frequency of transistor at if =
0.5
𝜇∅𝑡
𝑓𝑇 = 2 1 + 𝑖𝑓 − 1 = 51.5GHz ≫ 20MHz—(5)
2𝜋𝐿2
1+ 1+𝑖𝑓
𝐼𝑑 = 𝑔𝑚 ∗ 𝑛 ∗ ∅𝑡 ≅ 50𝜇𝐴—(6)
2
𝑊 𝑔𝑚
= −(7)
𝐿 𝜇𝐶𝑜𝑥 𝛷𝑡 (−1+ 1+𝑖𝑓 )
𝑊 𝑊
(65𝑛𝑚) = 336 (65𝑛𝑚) = 1276
𝐿𝑁 𝐿𝑃
𝑉𝐷𝑆𝐴𝑇
≅ 1 + 𝑖𝑓 − 1 + 4 ⇒ 𝑉𝐷𝑆𝐴𝑇 ≅ 0.1𝑉
∅𝑡
Amplifier design (if=8)
Choose if = 8,choose 𝑔𝑚1,8 = 1.5𝑚𝑆
Check intrinsic cutoff frequency of
transistor at if = 8 using (5)
𝑓𝑇 =130GH𝑧 ≫ 20MHz
𝐼𝑑 ≅ 93𝜇𝐴
𝑊 𝑊
(65𝑛𝑚) = 4; 65𝑛𝑚 = 16
𝐿𝑁 𝐿𝑃
𝑉𝐷𝑆𝐴𝑇 ≅ 0.208𝑉
Amplifier design recap
First extract transistor parameters using ACM model and
test benches
First check if selected inversion level is adequate for your
design, this is done by calculating the ft of transistor, ft
>>3xGBW (5)
Use extracted parameters to calculate required
transconductances, saturation voltage, dimensions based
on specifications given as a first trial point
Bias your circuit properly and perform your simulations
Calculated values of M1, M2, M8 kept the same producing
relative same gm at selected currents when ACM model is
used (1)-(6).
Reevaluate operational points to obtain required
specifications
Example of results
Results
Parameter If=0.5 If=8
Gain (dB) 65 61
Phase margin (deg) 50 60
Power dissipation (µW) 409 558
Settling time (nsec) 180 130
PSRR (dB) 66.3 62.4
Slew rate (V/µsec) 8.4 17.3
Area estimation (µ2m2) 2400 100