0% found this document useful (0 votes)
6 views11 pages

Lab 9 Final......

The document outlines Lab 9 for the EE330-304 Digital Signal Processing course, focusing on sampling, quantization, and aliasing using the Texas Instruments DSK. It includes objectives, lab instructions, tasks related to audio processing, and detailed descriptions of the hardware and software involved. Students are required to complete lab tasks, submit reports, and explore audio effects through practical experiments with the DSK and MATLAB.

Uploaded by

afnanmirza106
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as DOCX, PDF, TXT or read online on Scribd
0% found this document useful (0 votes)
6 views11 pages

Lab 9 Final......

The document outlines Lab 9 for the EE330-304 Digital Signal Processing course, focusing on sampling, quantization, and aliasing using the Texas Instruments DSK. It includes objectives, lab instructions, tasks related to audio processing, and detailed descriptions of the hardware and software involved. Students are required to complete lab tasks, submit reports, and explore audio effects through practical experiments with the DSK and MATLAB.

Uploaded by

afnanmirza106
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as DOCX, PDF, TXT or read online on Scribd
You are on page 1/ 11

Department of Electrical Engineering

LAB INSTRUCTOR : SYED ZAIN UL HASSAN


SEMESTER : 6
DATE : 14 APRIL ,2025
SECTION : BEE 14 D

EE330-304 Digital Signal Processing


Lab9: Sampling, Quantization, Aliasing using
DSK
PLO4-CLO4 PLO5- PLO8- PLO9-
CLO5 CLO6 CLO7
Name Reg. No Viva / Analysis Modern Ethics Individual
Quiz / Lab of data Tool and and Team
Performa in Lab Usage Safety Work
nce Report

5 Marks 5 Marks 5 Marks 5 Marks 5 Marks

AFNAN MIRZA

MALIK NORAIZ
MASOOD

RAJA IBRAHIM
Lab9: Sampling, Quantization, Aliasing using DSK
Objectives
The objective in this lab is familiarization with audio processing using DSP starter Kit
 Familiarization with Real time Audio processing using DSK
 Sampling of Audio with DSK
 Quantization with DSK

Lab Instructions
 The students should perform and demonstrate each lab task separately for step-wise evaluation
(please ensure that course instructor/lab engineer has signed each step after ascertaining its
functional verification)
 Each group shall submit one lab report on LMS within 6 days after lab is conducted. Lab report
submitted via email will not be graded.
. Students are however encouraged to practice on their own in spare time for enhancing their
Lab Report Instructions
All questions should be answered precisely to get maximum credit. Lab report must ensure following
items:
 Lab objectives
 MATLAB/C codes
 Results (graphs/tables) duly commented and discussed
 Conclusion
 Sampling, Quantization, Aliasing using DSK
 Introduction
The hardware experiments in the DSP lab are carried out on the Texas Instruments TMS320C6713 DSP
Starter Kit (DSK), based on the TMS320C6713 floating point DSP running at 225 MHz. The basic clock
cycle instruction time is 1/(225 MHz)= 4.44 nanoseconds. During each clock cycle, up to eight
instructions can be carried out in parallel, achieving up to 8×225 = 1800 million instructions per second
(MIPS). The C6713 processor has 256KB of internal memory, and can potentially address 4GB of
external memory. The DSK board includes a 16MB SDRAM memory and a 512KB Flash ROM. It has an
on-board 16-bit audio stereo codec (the Texas Instruments AIC23B) that serves both as an A/D and a D/A
converter. There are four 3.5 mm audio jacks for microphone and stereo line input, and speaker and head-
phone outputs. The AIC23 codec can be programmed to sample audio inputs at the following sampling
rates:
fs = 8, 16, 24, 32, 44.1, 48, 96 kHz

The ADC part of the codec is implemented as a multi-bit third-order noise-shaping delta-sigma converter
that allows a variety of oversampling ratios that can realize the above choices of fs. The corresponding
oversampling decimation filters act as anti-aliasing prefilters that limit the spectrum of the input analog
signals effectively to the Nyquist interval [−fs/2,fs/2]. The DAC part is similarly implemented as a
whose oversampling interpolation filters act as almost ideal reconstruction filters with the Nyquist
interval as their passband.
The DSK also has four user-programmable DIP switches and four LEDs that can be used to control and
monitor programs running on the DSP.All features of the DSK are managed by the CCS, which is a
complete integrated development environment (IDE) that includes an optimizing C/C++ compiler,
assembler, linker, debugger, and program loader. The CCS communicates with the DSK via a USB
connection to a PC. In addition to facilitating all programming aspects of the C6713 DSP, the CCS can
also read signals stored on the DSP’s memory, or the SDRAM, and plot them in the time or frequency
domains. The following block diagram depicts the overall operations involved in all of the hardware
experiments in the DSP lab. Processing is interrupt-driven at the sampling rate fs, as explained below.

The AIC23 codec is configured (through CCS) to operate at one of the above sampling rates fs. Each
collected sample is converted to a 16-bit two’s complement integer (a short data type in C). The codec
actually samples the audio input in stereo, that is, it collects two samples for the left and right channels.At
each sampling instant, the codec combines the two 16-bit left/right samples into a single 32-bit unsigned
integer word (an unsigned int,or Uint32 data type in C), and ships it over to a 32-bit receive-register of the
multichannel buffered serial port (McBSP) of the C6713 processor, and then issues an interrupt to the
processor.
Upon receiving the interrupt, the processor executes an interrupt service routine (ISR) that implements a
desired sample processing algorithm programmed with the CCS (e.g., filtering, audio effects, etc.).
During the ISR, the following actions take place: the 32-bit input sample (denoted by x in the diagram) is
read from the McBSP, and sent into the sample processing algorithm that computes the corresponding 32-
bit output word (denoted by y), which is then written back into a 32-bit transmit-register of the McBSP,
from where it is transferred to the codec and reconstructed into analog format, and finally the ISR returns
from interrupt, and the processor begins waiting for the next interrupt, which will come at the next
sampling instant.
Clearly, all processing operations during the execution of the ISR must be completed in the time interval
between samples, that is, T = 1/fs. For example, if fs = 44.1 kHz, then, T= 1/fs = 22.68 μsec. With an
instruction cycle time of Tc = 4.44 nsec, this allows T/Tc = 5108 cycles to be executed during each
sampling instant, or, up to 8×5108 = 40864 instructions, or half of that per channel.

 Resources
Most of the hardware experiments in the DSP lab are based on C code from the text [1] adapted to the
CCS development environment. Additional experiments are based on the Chassaing-Reay text [2]. The
web page of the lab, http://www.ece.rutgers.edu/~orfanidi/ece348/, contains additional resources such
as tutorials and user guides. Some books on C and links to the GNU GCC C compiler are given in Ref. [5].
These will give you a pretty good idea of the TMS320C6000 architecture and features. The help file, C:\
CCStudio_v3.1\docs\hlp\c6713dsk.hlp, found in the CCS installation directory of each PC, contains very
useful information on the C6713 processor and DSK kit. The following pictures are from that help file:

You will hear what aliasing effects sound like (i.e., distortions arising from using the wrong sampling
rate). You will hear what quantization effects sound like (i.e., when you use too few bits for your audio
samples). You will find out how the stereo A/D converter packs the two 16-bit samples from the left and
right audio channels into a 32-bit word and sends it over to the processor, and how it gets unpacked into
the two individual 16-bit left/right words by the processor. You will also study panning between
speakers, and several nonlinear input/output functions.
 Lab Tasks
 Lab task 1: Importing project in CCS
 Close any open projects in CCS.
 Go to file import and you will see following figure

 Select CCS projects and click next


 Click browse and you will see following figure. Select the root folder of the which is sin8_buff
in our case.

5.Click finish and you should be able to see the and relevant files of the project in project view as
show below
 Lab Task 2

 Aliasing
This part demonstrates aliasing effects. The smallest sampling rate that can be defined is 8 kHz with a
Nyquist interval of [−4,4] kHz. Thus, if a sinusoidal signal is generated (e.g. with MATLAB) with
frequency outside this interval, e.g., f = 5 kHz, and played into the line-input of the DSK, one might
expect that it would be aliased with fa =f−fs =5−8 =−3kHz. However, this will not work because the
antialiasing oversampling decimation filters of the codec filter out any such out-of-band components
before they are sent to the processor.
An alternative is to decimate the signal by a factor of 2, i.e., dropping every other sample. If the codec
sampling rate is set to 8 kHz and every other sample is dropped, the effective sampling rate will be 4
kHz, with a Nyquist interval of [−2,2]kHz. A sinusoid whose frequency is outside the decimated Nyquist

filter and will be aliased. For example, if f =3kHz, the decimated sinusoid will be aliased with fa =3 −4
interval [−2,2]kHz, but inside the true Nyquist interval [−4,4]kHz, will not be cut off by the antialiasing

=−1kHz.

Copy the template programs to your working directory. Set the sampling rate to 8 kHz and select line-
input. Modify the template program to output every other sample, with zero values in-between. This can
be accomplished in different ways, but a simple one is to define a “sampling pulse” periodic signal whose
values alternate between 1 and 0, i.e., the sequence [1,0,1,0,1,0,... ] and multiply the input samples by that
sequence. The following simple code segment implements this idea:

Out_sample = pulse * in_sample;


pulse = (pulse==0);

where pulse must be globally initialized to 1 before main() and isr(). Why does this work? Next, rebuild
the new program with CCS.
Open MATLAB and generate three sinusoids of frequencies f1 = 1kHz, f2 = 3kHz, and f3 = 1kHz, each
of duration of 1 second, and concatenate them to form a 3-second signal. Then play this out of the PCs
sound card using the sound() function. For example, the following MATLAB code will do this:

fs = 8000; f1 = 1000; f2 = 3000; f3 = 1000;L = 8000; n = (0:L-1);A = 1/5; % adjust


playback volume
x1=A*
cos(2*pi*n*f1/fs);
x2=A*
cos(2*pi*n*f2/fs);
x3=A*
cos(2*pi*n*f3/fs);
sound([x1,x2,x3], fs);
Sinusoid generation in MATLAB:

//sine8_buf.c sine generation with output stored in buffer


#include "DSK6713_AIC23.h" //codec support
Uint32 fs=DSK6713_AIC23_FREQ_8KHZ; //set sampling rate
#define DSK6713_AIC23_INPUT_MIC 0x0015
#define DSK6713_AIC23_INPUT_LINE 0x0011
Uint16 inputsource=DSK6713_AIC23_INPUT_LINE; // select input
int pulse = 1;
interrupt void c_int11() //interrupt service routine
{
short out_sample;
short in_sample;
in_sample = input_left_sample()*gain;
out_sample = pulse * in_sample;
pulse = (pulse==0); //COMMENT OUT IN PART (a), NOT IN PART (b)
output_left_sample(out_sample);
return; //return from interrupt
}

void main()
{
comm_intr(); //initialise DSK
while(1); //infinite loop

a. Connect the sound card’s audio output to the line-input of the DSK and rebuild/run the CCS down-
sampling program after commenting out the line:

pulse = (pulse==0);

This disables the downsampling operation. Send the above concatenated sinusoids to the DSK input
and you should hear three distinct 1-sec segments, with the middle one having a higher frequency.
 Next, uncomment the above line so that down sampling takes place and rebuild/run the program.
Send the concatenated sinusoids to the DSK and you should hear all three segments as though they
have the same frequency (because the middle 3 kHz one is aliased with other ones at 1 kHz). You
may also play your favorite song to hear the aliasing distortions, e.g., out of tune vocals.
 Set the codec sampling rate to 44 kHz and repeat the previous two steps. What do you expect to hear
in this case?
Since the sampling rate has SIGNIFICANTLY increased greatly, in both steps with or without
decimation we do not hear any aliasing (mixing). THEREFORE no alaising

d. To confirm the antialiasing prefiltering action of the codec, replace the first two lines of the above
MATLAB code by the following two:

fs = 16000; f1 = 1000; f2 = 5000; f3 = 1000;L = 16000; n = (0:L-1);

Now, the middle sinusoid has frequency of 5 kHz and it should be cutoff by the antialiasing prefilter. Set
the sampling rate to 8 kHz, turn off the down sampling operation, rebuild and run your program, and send
this signal through the DSK, and describe what you hear.

The middle tone at 5kHz was suppressed totally and we were unable to hear it in the output. No output was
heared..

 Lab Task 3:

 Quantization
The DSK’s codec is a 16-bit ADC/DAC with each sample represented by a two’s complement integer.
Given the 16-bit representation of a sample, [b1b2 ···b16], the corresponding 16-bit integer is given by
−1 −2 −3 −16
x=−b12 +b22 +b32 +···+b162 (1.1)

The MSB bit b1 is the sign bit. The range of representable integers is: −32768 ≤ x ≤ 32767. As
discussed in Ch. 2 of Ref. [1], for high-fidelity audio at least 16 bits are required to match the dynamic
range of human hearing; for speech, 8 bits are sufficient. If the audio or speech samples are quantized to
less than 8 bits, quantization noise will become audible. The 16-bit samples can be requantized to fewer
bits by a right/left bit-shifting operation. For example, right shifting by 3 bits will knock out the last 3
bits, then left shifting by 3 bits will result in a 16-bit number whose last three bits are zero, that is, a 13-bit
integer. These operations are illustrated below:

[b1,b2, ..., b13,b14,b15,b16] ⇒ [0,0,0,b1,b2, ..., b13] ⇒ [b1,b2, ..., b13,0,0,0]

a. Modify the basic template program so that the output samples are requantized to B bits, where 1 ≤ B≤
16. This requires right/left shifting by L= 16 – B bits, and can be implemented very simply in C as
follows:

out_sample = (in_sample >> L) << L;

Start with B = 16, set the sampling rate to 8 kHz, and rebuild/run the program. Send a wave file as input
and listen to the output.
b. Repeat with the following values: B= 8,6,4,2,1, and listen to the gradual increase in the quantization
noise.

//sine8_buf.c sine generation with output stored in buffer

#include "DSK6713_AIC23.h" //codec support


Uint32 fs=DSK6713_AIC23_FREQ_8KHZ; //set sampling rate
#define DSK6713_AIC23_INPUT_MIC 0x0015
#define DSK6713_AIC23_INPUT_LINE 0x0011
Uint16 inputsource=DSK6713_AIC23_INPUT_LINE; // select input
int pulse = 1;
int B=16; //Change to 8, 6, 4, 2, 1 for part (b)
interrupt void c_int11() //interrupt service routine
{
short out_sample;
short in_sample;
in_sample = input_left_sample()*gain;
out_sample = pulse * in_sample;
pulse = (pulse==0);
output_left_sample(out_sample);
out_sample = (in_sample >> (16-B)) << (16-B);
return; //return from interrupt
}

void main()
{
comm_intr(); //initialise DSK
while(1); //infinite loop

Since the audio samples are being quantized at 8 or lesser bits,the quantization noise can only be
heard in the case of B = 8, 6, 4, 2 , 1 with it increasing as B is decreased. Showing inverse relation
and 16 bits is required for high fidelity.

CONCLUSION :

In this lab, we explored the effects of aliasing and quantization noise during the analog-to-digital
conversion process, focusing on both the sampling and quantization stages. We learned that for
accurate and effective audio or speech signal processing, certain conditions must be satisfied—such
as maintaining a sampling rate above the Nyquist frequency and ensuring appropriate bit resolution
during quantization. These conditions are critical to preserving signal integrity and ensuring the signal
can be reliably reconstructed after processing..

You might also like