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Tutorial 3

This document is a tutorial for a Logic Design course, focusing on various logic gates including inverters, AND, OR, NAND, NOR, and exclusive gates. It includes exercises requiring waveform drawings, truth tables, and Boolean expressions, as well as design problems for practical applications. The tutorial is structured into sections that guide students through understanding and applying logic gate concepts.

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0% found this document useful (0 votes)
8 views4 pages

Tutorial 3

This document is a tutorial for a Logic Design course, focusing on various logic gates including inverters, AND, OR, NAND, NOR, and exclusive gates. It includes exercises requiring waveform drawings, truth tables, and Boolean expressions, as well as design problems for practical applications. The tutorial is structured into sections that guide students through understanding and applying logic gate concepts.

Uploaded by

aqilmegat05
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© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as PDF, TXT or read online on Scribd
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FACULTY OF ENGINEERING AND

BUILT ENVIRONMENT

KEE1223 (LOGIC DESIGN)

TUTORIAL 3

Semester 2

NAME ……………………………………………………………………
ID ……………………………………………………………………
Chapter 3: Logic Gates

Section 3–1 The Inverter


1. The input waveform shown in Figure 1 is applied to a system of three inverters connected
in a series. Draw the output waveform across each inverter in proper relation to the input.

Figure 1

Section 3–2 The AND Gate


2. The waveforms in Figure 2 are applied to points A and B of a 2-input AND gate. Draw the
output waveform.

Figure 2

3. The input waveforms applied to a 4-input AND gate are as indicated in Figure 3. Draw the
net output waveform of this system.

Figure 3

Section 3–3 The OR Gate


4. Write the expression for a 4-input OR gate with inputs A, B, C, D, and output X.
5. Determine the output for a 2-input OR gate when the input waveforms are as in Figure 2
and draw a timing diagram.
6. Show the truth table for a system of a 3-input OR gate followed by an inverter.

2
Section 3–4 The NAND Gate
7. Determine the output waveform in Figure 4.

Figure 4

8. The two logic symbols shown in Figure 5 represent equivalent operations. The difference
between the two is strictly from a functional viewpoint. For the NAND symbol, look for
two HIGHs on the inputs to give a LOW output. For the negative-OR, look for at least one
LOW on the inputs to give a HIGH on the output. Using these two functional viewpoints,
show that each gate will produce the same output for the given inputs.

Figure 5

Section 3–5 The NOR Gate


9. Determine the output waveform in Figure 4 for a 2-input NOR gate.

10. The NAND and the negative-OR symbols represent equivalent operations, but they are
functionally different. For the NOR symbol, look for at least one HIGH on the inputs to
give a LOW on the output. For the negative-AND, look for two LOWs on the inputs to give
a HIGH output. Using these two functional points of view, show that both gates in Figure
6 will produce the same output for the given inputs.

Figure 6

3
Section 3–6 The Exclusive-OR and Exclusive-NOR Gates
11. How does an exclusive-OR gate differ from an OR gate in its logical operation?
12. Determine the output of an exclusive-NOR gate for the inputs shown in Figure 2 and draw
a timing diagram.

Section 3–7 Programmable Logic


13. In the simple programmed AND array with programmable links in Figure 7, determine the
Boolean output expressions.

Figure 7
14. Describe a 4-input AND gate using VHDL.

Design Problems
15. Design a circuit to fit in the beige block of Figure 8 that will cause the headlights of an
automobile to be turned off automatically 15 s after the ignition switch is turned off, if the
light switch is left on. Assume that a LOW is required to turn the lights off.

Figure 8
16. Design a circuit for an intrusion detection and alarm system. This system could be used for
three rooms in a home, whereby each room has two windows and a door. The sensors are
magnetic switches that produce a HIGH output when open and a LOW output when closed.

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