Basic Electronics Engineering (ES-201)

Assignment 1 Solutions

Submission Date: May 5, 2025

Note
The following solutions address the questions from Assignment 1 for Basic Electronics
Engineering (ES-201). Where figures (e.g., Fig. 1 to Fig. 14) are referenced but unavail-
able, assumptions based on standard semiconductor principles are made. For questions
requiring plots, qualitative descriptions are provided due to missing circuit diagrams.
Exact numerical results for some questions depend on figure data.

1 Question 1
A p-type silicon bar with electron injection from the left and hole injection from the
right has exponential carrier profiles, negligible at x = 2 ţm and x = 0, respectively.
Cross-sectional area is 1 ţm × 1 ţm. Determine the total current.
Solution: Total current is the sum of electron and hole diffusion currents:

Jtotal = Jn + Jp

Assume exponential profiles:

n(x) = n0 e−x/Ln , p(x) = p0 ex/Lp , Ln = Lp = 2 ţm.

Diffusion currents at x = 0:
n0 p0
Jn = qDn , Jp = −qDp .
Ln Lp

Total current:
I = Jtotal · A, A = 1 × 10−8 cm2 .
Without Fig. 1, exact n0 , p0 , Dn , Dp are unavailable. Typical values: Dn ≈ 36 cm2 s−1 ,
Dp ≈ 12 cm2 s−1 .
Note: Fig. 1 required for precise carrier concentrations.

2 Question 2
A pn junction with ND = 3 × 1016 cm−3 , NA = 2 × 1015 cm−3 , reverse bias VR = 1.6 V.

1
(a) Junction capacitance per unit area:
√
qϵs NA ND
Cj =
2(NA + ND )(Vbi + VR )
Parameters: q = 1.6 × 10−19 C, ϵs = 11.7 · 8.854 × 10−14 F cm−1 , ni = 1.5 × 1010 cm−3 ,
kT
q
= 0.0259 V.
( )
kT NA ND
Vbi = ln ≈ 0.74 V, Vbi + VR = 2.34 V.
q n2i
NA ND
≈ 1.875 × 1015 cm−3 .
NA + ND
Cj ≈ 8.15 × 10−9 F cm−2 = 8.15 nF cm−2 .
√
(b) To double Cj , since Cj ∝ NA ND
NA +ND
:
NA′
4≈ .
NA
Increase NA by a factor of 4.

3 Question 3
Undoped p-side, ND = 3 × 1016 cm−3 . Built-in potential at T = 300 K.
Solution: ( )
kT NA ND
Vbi = ln , NA ≈ ni ≈ 1.5 × 1010 cm−3 .
q n2i
Vbi ≈ 0.376 V.

4 Question 4
pn junction with ND = 5 × 1017 cm−3 , NA = 4 × 1016 cm−3 .
(a) Carrier concentrations:
n2i
• n-side: Majority (electrons) nn ≈ 5 × 1017 cm−3 , minority (holes) pn = ND
≈
4.5 × 102 cm−3 .
n2i
• p-side: Majority (holes) pp ≈ 4 × 1016 cm−3 , minority (electrons) np = NA
≈
5.625 × 103 cm−3 .
(b) Built-in potential: ( )
kT NA ND
Vbi = ln .
q n2i
• T = 250 K: ni ≈ 1 × 109 cm−3 , Vbi ≈ 1.24 V.
• T = 300 K: ni ≈ 1.5 × 1010 cm−3 , Vbi ≈ 0.834 V.
• T = 350 K: ni ≈ 1 × 1011 cm−3 , Vbi ≈ 1.53 V.
Trend: Vbi decreases with increasing ni , but exact trend depends on accurate ni .

2
5 Question 5
Two diodes in parallel with IS1 , IS2 .
(a) Prove exponential behavior:
( ) ( ) ( )
Itot = IS1 eVD /VT − 1 + IS2 eVD /VT − 1 = (IS1 + IS2 ) eVD /VT − 1 .

Equivalent to a diode with IS = IS1 + IS2 .

IS1 IS2
I1 = Itot , I2 = Itot .
IS1 + IS2 IS1 + IS2

6 Question 6
Variable capacitance per Fig. 3. Find NA , ND .
Solution: Requires Fig. 3 for capacitance vs. voltage data. Use:
√
qϵs NA ND
Cj = .
2(NA + ND )(Vbi + VR )

Note: Provide Fig. 3.

7 Question 7
Forward bias pn junction.
(a) For I = 1 mA, V = 750 mV:

1 × 10−3 A
IS = 0.75/0.0259
≈ 2.6 × 10−16 A.
e

(b) Area doubled, IS′ = 5.2 × 10−16 A:

8 Question 8
Two diodes in series. Find IB , VD1 , VD2 .
Solution: √
IB = IS1 IS2 eVB /VT ,
(√ ) (√ )
IS2 VB /2VT IS1 VB /2VT
VD1 = VT ln e , VD2 = VT ln e .
IS1 IS2

3
9 Question 9
Increase IB by 10 in Question 8.
Solution:
VB′ = VB + 0.0259 ln 100 ≈ VB + 0.119 V.

10 Question 10
Circuit with IS = 2 × 10−15 A. Find VD1 , IX .
Solution: Assume VX = VD1 :
• VX = 0.5 V: IX ≈ 0.478 ţA.
• VX = 0.8 V: IX ≈ 49 mA.
• VX = 1 V: IX ≈ 119 A.
• VX = 1.2 V: IX ≈ 2.9 × 105 A.
Note: High currents suggest Fig. 5 has a resistor.

11 Question 11
Circuit with VX = 1 V → IX = 0.2 mA, VX = 2 V → IX = 0.5 mA.
Solution:
R1 ≈ 3254 Ω, IS ≈ 2.8 × 10−10 A.

12 Question 12
Plot I/V characteristic for Fig. 7.
Solution: Assume diode circuit. Exponential increase for VX > 0, negligible current for
VX < 0.
Note: Need Fig. 7.

13 Question 13
For VX = V0 cos ωt, plot current vs. time.
Solution: Clipped exponential waveform, non-zero when VX > 0.
Note: Need Fig. 7.

14 Questions 14–25
These questions require plots for circuits in Fig. 8–14. Without figures, assume standard
diode circuits (e.g., rectifiers, clippers). Characteristics involve clipping based on diode
orientation and bias VB .

4
Note: Provide figures for precise plots.