Scribd
Upload
6 views9 pages

Freqresp

The document discusses the frequency response of amplifiers, focusing on the association of poles with nodes and the application of Miller's theorem. It provides examples of common-source, source follower, common-gate, and cascode stages, highlighting how the Miller effect influences input and output impedance. Additionally, it addresses the implications of zeros and poles in circuit design, particularly in the context of operational amplifiers.

Uploaded by

vanithakondini
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
6 views9 pages

Freqresp

The document discusses the frequency response of amplifiers, focusing on the association of poles with nodes and the application of Miller's theorem. It provides examples of common-source, source follower, common-gate, and cascode stages, highlighting how the Miller effect influences input and output impedance. Additionally, it addresses the implications of zeros and poles in circuit design, particularly in the context of operational amplifiers.

Uploaded by

vanithakondini
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
You are on page 1/ 9

EE215A B.

Razavi
Fall 14 HO #5

Frequency Response of Amplifiers


Association of Poles with Nodes

Example

Miller Effect

1
EE215A B. Razavi
Fall 14 HO #5

- Strictly speaking, the gain must be calculated at the frequency of


interest.
- Not every circuit lends itself to Miller decomposition.

 Example

Does the circuit have two poles?!

Common- Source Stage


(Also half circuit of a differential pair) Use of Miller’s Theorem:

If Rs is relatively large,

2
EE215A B. Razavi
Fall 14 HO #5

Exact Analysis:

The circuit has one zero and two poles even though there are three caps.

Dominant Pole Approximation:

Example

3
EE215A B. Razavi
Fall 14 HO #5

A few notes on CS response:

1. Second pole can also be found using the dominant pole appr.:

If CGS is large enough,

2. The zero arises from


the direct coupling
through CGD:

This right-half plane zero


causes trouble in two-
stage op amp design.

The zero can also be calculated by noting that

3. The input impedance can be estimated using


Miller’s Theorem:

Or more precisely:

4
EE215A B. Razavi
Fall 14 HO #5

If the frequency is low enough such that:

then Miller multiplication works. What happens if CGD is very large?

Source Follower

The zero is in the left-half plane (why?).


Can use dominant pole appr. to estimate
the poles (but in practice does not
happen often):

With Rs = 0,

- Input Impedance

5
EE215A B. Razavi
Fall 14 HO #5

Special cases:
1. At low freqs:

2. At high freqs:

- Output Impedance

Can we represent Zout with a passive RL network? Since Zout is of first


order, it can have only one inductor and no other storage element.
Considering the cases at f = o and f = ∞, we arrive at this equivalent
circuit:

The inductive behavior resulting from finite source impedance may


cause significant ringing or even oscillation in the presence of heavy
load capacitance.

6
EE215A B. Razavi
Fall 14 HO #5

Common-Gate Stage

(No Miller effect)

Input impedance in the presence of channel-length modulation:

Example:

Why does Zin become independent of CL at high frequencies?

7
EE215A B. Razavi
Fall 14 HO #5

Cascode Stage
Miller effect much less significant here.
Why?

Poles at X and Y:

Example:

Differential Pair

8
EE215A B. Razavi
Fall 14 HO #5

Diff pair with current-source loads:

Diff Pair with Active Load

Mirror pole is not very far, degrading


phase margin of op amps.

Comparison of fully-differential pair and circuit with active load:

Two poles: Three poles:


- Miller effect at input - Miller effect at Vin2
- Miller effect at input - Load cap at Vout
- Load cap at output - Time constant at X

You might also like