PUSB3FC4

10
ON
XS
Very low capacitance unidirectional ESD protection diode
array
18 September 2024 Product data sheet

1. General description
Extremely low capacitance unidirectional ElectroStatic Discharge (ESD) protection diode array, part
of the TrEOS protection family. This device is housed in a DFN2510-10 (SOT1165-3) leadless ultra
small Surface-Mounted Device (SMD) plastic package, designed to protect four signal lines from
the damage caused by ESD and other transients.

2. Features and benefits

• Unidirectional ESD protection for four signal lines
• VRWM = 3.3 V device
• Extremely low clamping voltage to protect sensitive I/Os
• IEC 61000-4-5 (surge): IPP = 7.9 A peak pulse (average measured)
• Extremely low diode capacitance Cd = 0.29 pF typical at 1.5 V
• ESD protection up to ±15 kV according to IEC 61000-4-2
• Leadless ultra small DFN2510-10 (SOT1165-3) surface mount package

3. Applications
• Cellular handsets and accessories
• Portable electronics
• Communication systems
• Computers and peripherals
• USB3.2 data lines

4. Quick reference data

Table 1. Quick reference data
Symbol Parameter Conditions Min Typ Max Unit
VRWM reverse standoff - - 3.3 V
voltage
Cd diode capacitance f = 1 MHz; VR = 1.5 V; Tamb = 25 °C - 0.29 0.34 pF
Nexperia PUSB3FC4
Very low capacitance unidirectional ESD protection diode array

5. Pinning information
Table 2. Pinning information
Pin Symbol Description Simplified outline Graphic symbol
1 CH1 channel 1 ESD protection CH1 CH3
1 10 CH2 CH4
2 CH2 channel 2 ESD protection
3 GND ground
4 CH3 channel 3 ESD protection GND
5 CH4 channel 4 ESD protection
6 n.c. not connected
7 n.c. not connected
=
8 GND ground
9 n.c. not connected 5 6
10 n.c. not connected
Transparent top view
aaa-016329
DFN2510-10 (SOT1165-3)

6. Ordering information
Table 3. Ordering information
Type number Package
Name Description Version
PUSB3FC4 DFN2510-10 plastic, leadless extremely thin small outline package; 10 SOT1165-3
terminals; 0.5 mm pitch; 2.5 mm x 1 mm x 0.5 mm body

7. Marking
Table 4. Marking codes
Type number Marking code
PUSB3FC4 A2A

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Very low capacitance unidirectional ESD protection diode array

8. Limiting values
Table 5. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol Parameter Conditions Min Max Unit
VRWM reverse standoff voltage - 3.3 V
IPPM rated peak pulse current tp = 8/20 µs [1] -7 7 A
Tstg storage temperature -65 150 °C
Tamb ambient temperature -40 125 °C
ESD maximum ratings
VESD electrostatic discharge IEC 61000-4-2; contact discharge [2] -15 15 kV
voltage IEC 61000-4-2; air discharge [2] -15 15 kV

[1] Non-repetitive current pulse 8/20 µs exponentially decaying waveform according to IEC 61000-4-5.
[2] Device stressed with ten non-repetitive ESD pulses.

001aaa630 IPP
120
100 %
IPP 100 % IPP; 8 µs 90 %
(%)

80
e-t

50 % IPP; 20 µs

40

10 %

0 tr = 0.6 ns to 1 ns t
0 10 20 30 40 30 ns
t (µs)
60 ns 001aaa631

Fig. 2. ESD pulse waveform according to

Fig. 1. 8/20 µs pulse waveform according to IEC 61000-4-2
IEC 61000-4-5

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Very low capacitance unidirectional ESD protection diode array

9. Characteristics
Table 6. Characteristics
Symbol Parameter Conditions Min Typ Max Unit
VBR breakdown voltage IR = 1 mA; Tamb = 25 °C 5.5 9 - V
VCL clamping voltage ITLP = 8 A; tp = 100 ns; Tamb = 25 °C [1] - 3.5 - V
ITLP = 16 A; tp = 100 ns; Tamb = 25 °C [1] - 5.5 - V
IPPM = 7 A; tp = 8/20 µs; Tamb = 25 °C [2] - 3.5 - V
IRM reverse leakage current VRWM = 3.3 V; Tamb = 25 °C - 1 100 nA
Rdyn dynamic resistance IR = 10 A; tp = 100 ns; Tamb = 25 °C [1] - 0.26 - Ω
IR = -10 A; tp = 100 ns; Tamb = 25 °C [1] - 0.26 - Ω
Cd diode capacitance f = 1 MHz; VR = 1.5 V; Tamb = 25 °C - 0.29 0.34 pF

[1] Non-repetitive current pulse, Transmission Line Pulse (TLP); square pulse; ANSI / ESD STM5.5.1-2008 on pin 2
[2] Device stressed with 8/20 μs exponential decay waveform according to IEC 61000-4-5.

aaa-039810 aaa-039275
1 1.2
S21dd
(dB) a
-1

0.8
-3

-5
0.4

-7

-9 0
107 108 109 1010 0 1 2 3 4
f (Hz) VR (V)

Fig. 3. Differential mode insertion loss; typical values

Fig. 4. Relative capacitance as a function of reverse

standoff voltage; typical values

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Very low capacitance unidirectional ESD protection diode array

aaa-039276 aaa-039277
25 0
IPP IPP
(A) (A)
20 -5

15 -10

10 -15

5 -20

0 -25
0 5 10 15 -15 -10 -5 0
VCL (V) VCL (V)

Transmission Line Pulse (TLP); Transmission Line Pulse (TLP);

tp = 100 ns; tr = 1 ns; pin 1 tp = 100 ns; tr = 1 ns; pin 1
Fig. 5. Dynamic resistance with positive clamping; Fig. 6. Dynamic resistance with negative clamping;
typical values typical values
aaa-039278 aaa-039279
80 0

IPP IPP
(A) (A)

60 -20

40 -40

20 -60

0 -80
0 5 10 15 20 25 -25 -20 -15 -10 -5 0
VCL (V) VCL (V)

Very Fast Transmission Line Pulse (VF-TLP); Very Fast Transmission Line Pulse (VF-TLP);
tp = 5 ns; tr = 600 ps; pin 1 tp = 5 ns; tr = 600 ps; pin 1
Fig. 7. Dynamic resistance with positive clamping; Fig. 8. Dynamic resistance with negative clamping;
typical values typical values

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Very low capacitance unidirectional ESD protection diode array

aaa-039280 aaa-039281
8 0

IPP IPP
(A) (A)

6 -2

4 -4

2 -6

0 -8
0 2 4 6 8 -8 -6 -4 -2 0
VCL (V) VCL (V)

IEC 61000-4-5; tp = 8/20 µs; positive pulse IEC 61000-4-5; tp = 8/20 µs; negative pulse
Fig. 9. Dynamic resistance with positive clamping; Fig. 10. Dynamic resistance with negative clamping;
typical values typical values

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Nexperia PUSB3FC4
Very low capacitance unidirectional ESD protection diode array

10. Application information

The device is designed for the protection of four unidirectional data or signal lines from surge
pulses and ESD damage.
The device uses an advanced clamping structure showing a negative dynamic resistance.
This snap-back behavior strongly reduces the clamping voltage to the system behind the ESD
protection during an ESD event. Do not connect unlimited DC current sources to the data lines to
avoid keeping the ESD protection device in snap-back state after exceeding breakdown voltage
(due to an ESD pulse for instance).

Circuit board layout and protection device placement

Circuit board layout is critical for the suppression of ESD, Electrical Fast Transient (EFT) and surge
transients. The following guidelines are recommended:
1. Place the device as close to the input terminal or connector as possible.
2. Minimize the path length between the device and the protected line.
3. Keep parallel signal paths to a minimum.
4. Avoid running protected conductors in parallel with unprotected conductors.
5. Minimize all Printed-Circuit Board (PCB) conductive loops including power and ground loops.
6. Minimize the length of the transient return path to ground.
7. Avoid using shared transient return paths to a common ground point.
8. Use ground planes whenever possible. For multilayer PCBs, use ground vias.

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Very low capacitance unidirectional ESD protection diode array

11. Package outline

DFN2510-10: plastic, leadless extremely thin small outline package; 10 terminals;
0.5 mm pitch; 2.5 mm x 1 mm x 0.5 mm body SOT1165-3

(8×) v C A B
b
w C
1 5

(10×) L

v C A B
10 6
(2×) w C
b2

e b1
(2×) v C A B
D2 w C

y1 C

A C

seating plane
A1 A3 y C
(10×)

D B A

pin 1
index area

u C

0 2.5 mm

Dimensions (mm are the original dimensions) scale

Unit A A1 A3 b b1 b2 D D2 E e L u v w y y1

max 0.55 0.05 0.25 0.45 0.30 0.45

0.15 2.50 2.00 1.00 0.5
mm nom 0.50 0.20 0.40 0.25 0.40 0.1 0.1 0.05 0.05 0.05
REF BSC BSC BSC BSC
min 0.45 0.15 0.35 0.20 0.35

sot1165-3_po

Outline References European

Issue date
version IEC JEDEC JEITA projection

SOT1165-3
24-08-23

Fig. 11. Package outline DFN2510-10 (SOT1165-3)

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Very low capacitance unidirectional ESD protection diode array

12. Soldering
Footprint information for reflow soldering of DFN2510-10 package SOT1165-3

2.8

2.5

0.5
0.1
(2×)

0.4
0.2
(2×)
0.32
(2×)

0.7 0.6 0.55

(10×) (10×) (10×)

0.1 0.2 1.3 1.4 1.6

0.2
0.5 0.2
(8×)
0.3
0.3
(8×)

2.2

recommended stencil thickness: 0.10 mm

occupied area solder resist

solder land solder paste

Dimensions in mm

24-03-08
Issue date sot1165-3_fr

Fig. 12. Reflow soldering footprint for DFN2510-10 (SOT1165-3)

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Very low capacitance unidirectional ESD protection diode array

13. Revision history

Table 7. Revision history
Data sheet ID Release date Data sheet status Change notice Supersedes
PUSB3FC4 v.4 20240918 Product data sheet - PUSB3FC4 v.3
Modifications: • Chapter "Package outline": Typo correction for w, y, y1
PUSB3FC4 v.3 20240523 Product data sheet - PUSB3FC4 v.2
PUSB3FC4 v.2 20240517 Objective data sheet - PUSB3FC4 v.1
PUSB3FC4 v.1 20240320 Objective data sheet - -

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Very low capacitance unidirectional ESD protection diode array
injury, death or severe property or environmental damage. Nexperia and its

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Quick reference data — The Quick reference data is an extract of the
Data sheet status product data given in the Limiting values and Characteristics sections of this
document, and as such is not complete, exhaustive or legally binding.
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Draft — The document is a draft version only. The content is still under the Absolute Maximum Ratings System of IEC 60134) will cause permanent
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Very low capacitance unidirectional ESD protection diode array

Contents
1. General description...................................................... 1
2. Features and benefits.................................................. 1
3. Applications.................................................................. 1
4. Quick reference data....................................................1
5. Pinning information......................................................2
6. Ordering information....................................................2
7. Marking.......................................................................... 2
8. Limiting values............................................................. 3
9. Characteristics.............................................................. 4
10. Application information............................................. 7
11. Package outline.......................................................... 8
12. Soldering..................................................................... 9
13. Revision history........................................................10
14. Legal information......................................................11

© Nexperia B.V. 2024. All rights reserved

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Date of release: 18 September 2024

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